Joseph L. Ganley

26 papers A 1C 1Misc 1Journal 15Unranked 7
YearRankTypeTitle / Venue / Authors
2008 — ch.
X Architecture Place and Route.
Handbook of Algorithms for Physical Design Automation
Steve Teig, Asmus Hetzel, Joseph L. Ganley, Jon Frankle, Aki Fujimura
2001 J jnl
The pagenumber of k-trees is O(k).
Discret. Appl. Math.
Joseph L. Ganley, Lenwood S. Heath
2000 J jnl
A new heuristic for rectilinear Steiner trees.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ion I. Mandoiu, Vijay V. Vazirani, Joseph L. Ganley
1999 A conf
A new heuristic for rectilinear Steiner trees.
ICCAD
Ion I. Mandoiu, Vijay V. Vazirani, Joseph L. Ganley
1999 J jnl
Computing Optimal Rectilinear Steiner Trees: A Survey and Experimental Evaluation.
Discret. Appl. Math.
Joseph L. Ganley
1999 — conf
Efficient solution of systems of orientation constraints.
ISPD
Joseph L. Ganley
1999 J jnl
Provably good moat routing.
Integr.
Joseph L. Ganley, James P. Cohoon
1998 J jnl
A Simple Approximation Algorithm for Two Problems in Circuit Design.
IEEE Trans. Computers
Tamra Carpenter, Steven Cosares, Joseph L. Ganley, Iraj Saniee
1998 J jnl
An Experimental Evaluation of Local Search Heuristics for Graph Partitioning.
Computing
Joseph L. Ganley, Lenwood S. Heath
1998 J jnl
Placement and Routing for Performance-Oriented FPGA Layout.
VLSI Design
Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, Gabriel Robins
1998 J jnl
The Power-p Steiner Tree Problem.
Nord. J. Comput.
Joseph L. Ganley, Jeffrey S. Salowe
1997 J jnl
Accuracy and fidelity of fast net length estimates.
Integr.
Joseph L. Ganley
1997 J jnl
Improved Computation of Optimal Rectilinear Steiner Minimal Trees.
Int. J. Comput. Geom. Appl.
Joseph L. Ganley, James P. Cohoon
1997 J jnl
Minimum-Congestion Hypergraph Embedding in a Cycle.
IEEE Trans. Computers
Joseph L. Ganley, James P. Cohoon
1996 — conf
A Provably Good Moat Routing Algorithm.
Great Lakes Symposium on VLSI
Joseph L. Ganley, James P. Cohoon
1996 J jnl
Optimal and approximate bottleneck Steiner trees.
Oper. Res. Lett.
Joseph L. Ganley, Jeffrey S. Salowe
1996 J jnl
Rectilinear Steiner trees on a checkerboard.
ACM Trans. Design Autom. Electr. Syst.
Joseph L. Ganley, James P. Cohoon
1995 — conf
Performance-oriented placement and routing for field-programmable gate arrays.
EURO-DAC
Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, Gabriel Robins
1995 Misc conf
The Multi-Weighted Spanning Tree Problem (Extended Abstract).
COCOON
Joseph L. Ganley, Mordecai J. Golin, Jeffrey S. Salowe
1995 — conf
Thumbnail rectilinear Steiner trees.
Great Lakes Symposium on VLSI
Joseph L. Ganley, James P. Cohoon
1994 — conf
A faster dynamic programming algorithm for exact rectilinear Steiner minimal trees.
Great Lakes Symposium on VLSI
Joseph L. Ganley, James P. Cohoon
1994 — conf
An architecture-independent approach to FPGA routing based on multi-weighted graphs.
EURO-DAC
Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, Gabriel Robins
1994 J jnl
Heuristics for laying out information graphs.
Computing
Joseph L. Ganley, Lenwood S. Heath
1994 — conf
Optimal Rectilinear Steiner Minimal Trees in O (n
CCCG
Joseph L. Ganley, James P. Cohoon
1994 J jnl
Optimal and Random Partitions of Random Graphs.
Comput. J.
Joseph L. Ganley, Lenwood S. Heath
1994 C conf
Routing a Multi-Terminal Critical Net: Steiner Tree Construction in the Presence of Obstacles.
ISCAS
Joseph L. Ganley, James P. Cohoon