Joseph J. Sharkey

20 papers A* 1A 4B 4C 2Misc 1Journal 5Unranked 3
YearRankTypeTitle / Venue / Authors
2008 C conf
Hiding Communication Delays in Clustered Microarchitectures.
SBAC-PAD
Robert J. LaDuca, Joseph J. Sharkey, Dmitry V. Ponomarev
2008 J jnl
Predicting and Exploiting Transient Values for Reducing Register File Pressure and Energy Consumption.
IEEE Trans. Computers
Deniz Balkan, Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose
2008 J jnl
Reducing register pressure in SMT processors through L2-miss-driven early register release.
ACM Trans. Archit. Code Optim.
Joseph J. Sharkey, Jason Loew, Dmitry V. Ponomarev
2008 J jnl
Selective Writeback: Reducing Register File Pressure and Energy Consumption.
IEEE Trans. Very Large Scale Integr. Syst.
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
2007 A conf
An L2-miss-driven early register deallocation for SMT processors.
ICS
Joseph J. Sharkey, Dmitry V. Ponomarev
2007 A conf
Evaluating design tradeoffs in on-chip power management for CMPs.
ISLPED
Joseph J. Sharkey, Alper Buyuktosunoglu, Pradip Bose
2007 J jnl
Exploiting Operand Availability for Efficient Simultaneous Multithreading.
IEEE Trans. Computers
Joseph J. Sharkey, Dmitry V. Ponomarev
2006 B conf
Adaptive reorder buffers for SMT processors.
PACT
Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev
2006 B conf
Address-Value Decoupling for Early Register Deallocation.
ICPP
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Aneesh Aggarwal
2006 B conf
Balancing ILP and TLP in SMT Architectures through Out-of-Order Instruction Dispatch.
ICPP
Joseph J. Sharkey, Dmitry Ponomarev
2006 A* conf
Efficient instruction schedulers for SMT processors.
HPCA
Joseph J. Sharkey, Dmitry V. Ponomarev
2006 J jnl
Instruction packing: Toward fast and energy-efficient instruction scheduling.
ACM Trans. Archit. Code Optim.
Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin
2006 B conf
SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency.
PACT
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
2006 A conf
Selective writeback: exploiting transient values for energy-efficiency and performance.
ISLPED
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
2006 Misc conf
Trade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors.
HiPC
Joseph J. Sharkey, Nayef Abu-Ghazeleh, Dmitry V. Ponomarev, Kanad Ghose, Aneesh Aggarwal
2005 — conf
Instruction Recirculation: Eliminating Counting Logic in Wakeup-Free Schedulers.
Euro-Par
Joseph J. Sharkey, Dmitry V. Ponomarev
2005 A conf
Instruction packing: reducing power and delay of the dynamic scheduling logic.
ISLPED
Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin
2005 — conf
Non-uniform Instruction Scheduling.
Euro-Par
Joseph J. Sharkey, Dmitry V. Ponomarev
2005 C conf
Power-Efficient Wakeup Tag Broadcast.
ICCD
Joseph J. Sharkey, Kanad Ghose, Dmitry V. Ponomarev, Oguz Ergin
2004 — conf
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization.
PACS
Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin