Josep M. Codina

18 papers A* 4A 4B 1C 1Journal 4Unranked 4
YearRankTypeTitle / Venue / Authors
2015 J jnl
Profiling Support for Runtime Managed Code: Next Generation Performance Monitoring Units.
IEEE Comput. Archit. Lett.
Enric Gibert, Raúl Martínez, Carlos Madriles, Josep M. Codina
2012 J jnl
A HW/SW Co-designed Programmable Functional Unit.
IEEE Comput. Archit. Lett.
Abhishek Deb, Josep M. Codina, Antonio González
2011 — conf
A Co-designed HW/SW Approach to General Purpose Program Acceleration Using a Programmable Functional Unit.
Interaction between Compilers and Computer Architectures
Abhishek Deb, Josep M. Codina, Antonio González
2011 C conf
A Power-Efficient Co-designed Out-of-Order Processor.
SBAC-PAD
Abhishek Deb, Josep M. Codina, Antonio González
2011 — conf
SoftHV: a HW/SW co-designed processor with horizontal and vertical fusion.
Conf. Computing Frontiers
Abhishek Deb, Josep M. Codina, Antonio González
2009 J jnl
AGAMOS: A Graph-Based Approach to Modulo Scheduling for Clustered Microarchitectures.
IEEE Trans. Computers
Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González, David R. Kaeli
2009 B conf
Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading.
PACT
Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González
2009 A* conf
Boosting single-thread performance in multi-core systems through fine-grain multi-threading.
ISCA
Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González
2008 A conf
A software-hardware hybrid steering mechanism for clustered microarchitectures.
IPDPS
Qiong Cai, Josep M. Codina, José González, Antonio González
2007 A conf
Heterogeneous Clustered VLIW Microarchitectures.
CGO
Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli
2007 A conf
Virtual Cluster Scheduling Through the Scheduling Graph.
CGO
Josep M. Codina, F. Jesús Sánchez, Antonio González
2005 A* conf
Demystifying on-the-fly spill code.
PLDI
Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli
2004 J jnl
Removing communications in clustered microarchitectures through instruction replication.
ACM Trans. Archit. Code Optim.
Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli
2003 A* conf
Instruction Replication for Clustered Microarchitectures.
MICRO
Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli
2002 A conf
A comparative study of modulo scheduling techniques.
ICS
Josep M. Codina, Josep Llosa, Antonio González
2002 — conf
Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning.
IEEE PACT
Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González, David R. Kaeli
2001 — conf
A Unified Modulo Scheduling and Register Allocation Technique for Clustered Processors.
IEEE PACT
Josep M. Codina, F. Jesús Sánchez, Antonio González
2001 A* conf
Graph-partitioning based instruction scheduling for clustered processors.
MICRO
Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González