Jorge Guilherme

39 papers A 1C 5Journal 9Unranked 24

Year	Rank	Type	Title / Venue / Authors
2022	C	`conf`	A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications. ISCAS Fábio Passos, Rafael Vieira, António Canelas, Ricardo Póvoa, Nuno Lourenço, Nuno Horta, Jorge Guilherme
2022	—	`conf`	Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling. SMACD Rafael Vieira, Fábio Passos, Ricardo Povoa, Ricardo Martins, Nuno Horta, Jorge Guilherme, Nuno Lourenço
2022	—	`conf`	Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient. SMACD Nuno Lourenço, Fábio Passos, Rafael Vieira, Ricardo Martins, Nuno Horta, Jorge Guilherme, Ricardo Póvoa
2020	J	`jnl`	FUZYE: A Fuzzy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. António Canelas, Ricardo Póvoa, Ricardo Martins, Nuno Lourenço, Jorge Guilherme, João Paulo Carvalho, Nuno Horta
2018	—	`conf`	11.7b Time-To-Digital Converter with 0.82ps resolution in 130nm CMOS Technology. PRIME Rodrigo Granja, Mauro Santos, Jorge Guilherme, Nuno Horta
2018	—	`conf`	A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications. SMACD António Canelas, Ricardo Povoa, Ricardo M. F. Martins, Nuno Lourenço, Jorge Guilherme, Nuno Horta
2018	—	`conf`	An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations. ICECS Jigme Zangpo, Ricardo Povoa, Jorge Guilherme, Nuno Horta
2018	J	`jnl`	Second-order compensation BGR with low TC and high performance for space applications. Integr. Jonathan Calvillo, Ricardo Póvoa, Jorge Guilherme, Nuno Horta
2017	A	`conf`	Automatic technology migration of analog IC designs using generic cell libraries. DATE Jose Cachaco, Nuno Machado, Nuno Lourenço, Jorge Guilherme, Nuno Horta
2017	—	`conf`	Design of a BGR Suitable for the Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C. NGCAS Jonathan Calvillo, Jorge Guilherme, Nuno Horta
2016	J	`jnl`	Logarithmic AD Converter With Selectable Transfer Characteristic. IEEE Trans. Circuits Syst. II Express Briefs Mauro Santos, Nuno Horta, Jorge Guilherme
2016	—	`conf`	SCALES: A high speed simulator tool for pipeline A/D converters. SMACD Carlos Silva, Jorge Guilherme, Nuno Horta
2015	C	`conf`	Thermal-aware floorplanning and layout generation of MOSFET power stages. ISCAS David Guilherme, João Pereira, Nuno Horta, Jorge Guilherme
2014	—	`conf`	A rad-hard DC-DC converter controller. ICECS Bruno Silva, Nuno Horta, Jorge Guilherme
2014	J	`jnl`	A survey on nonlinear analog-to-digital converters. Integr. Mauro Santos, Nuno Horta, Jorge Guilherme
2014	—	`conf`	Automatic layout generation of power MOSFET transistors in bulk CMOS. ICECS David Guilherme, Nuno Horta, Jorge Guilherme
2014	—	`conf`	Logarithmic AD conversion using latched comparators and a time-to-digital converter. ICECS Mauro Santos, Nuno Horta, Jorge Guilherme
2011	—	`conf`	Optimal OpAmp sizing based on a fuzzy-genetic kernel. GECCO (Companion) Pedro Sousa, Carla Duarte, Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2011	—	`conf`	Overcurrent detection circuit for integrated class-D amplifiers. ECCTD Frederico Cadete, David Guilherme, Jorge Guilherme, Nuno Horta
2010	J	`jnl`	Analog circuits optimization based on evolutionary computation techniques. Integr. Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2009	J	`jnl`	A 2.5 mW 80 dB DR 36 dB SNDR 22 MS/s Logarithmic Pipeline ADC. IEEE J. Solid State Circuits Jongwoo Lee, Joshua Jaeyoung Kang, Sunghyun Park, Jae-sun Seo, Jens Anders, Jorge Guilherme, Michael P. Flynn
2009	—	`conf`	A Low-cost EEG Stand-alone Device for Brain Computer Interface. BIODEVICES Alexandre Ribeiro, António Sirgado, João Aperta, Ana C. Lopes, Jorge Guilherme, Pedro D. F. Correia, Gabriel Pires, Urbano Nunes
2009	—	`conf`	Enhancing analog IC design optimization kernels with simple fuzzy models. ECCTD Pedro Sousa, Carla Duarte, Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2009	J	`jnl`	Reconfigurable multi-mode sigma-delta modulator for 4G mobile terminals. Integr. Artur Silva, Jorge Guilherme, Nuno Horta
2008	C	`conf`	A reconfigurable A/D converter for 4G wireless systems. ISCAS Artur Silva, Nuno Horta, Jorge Guilherme
2008	—	`conf`	Overview of radiation effects and design constraints off fully custom SMPS. APCCAS Mauro Santos, Carlos Pires, Jorge Guilherme, Nuno Horta
2007	—	`conf`	An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC design. ECCTD Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2007	—	`conf`	Design of a multimode reconfigurable sigma-delta converter for 4G wireless receivers. ECCTD Artur Silva, Nuno Horta, Jorge Guilherme
2007	—	`conf`	GA-SVM feasibility model and optimization kernel applied to analog IC design automation. ACM Great Lakes Symposium on VLSI Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2006	—	`conf`	GA-SVM Optimization Kernel applied to Analog IC Design Automation. ICECS Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2002	—	`conf`	A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dB. ICECS Jorge Guilherme, João C. Vital, José E. Franca
2001	—	`conf`	A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications. ISCAS (1) Jorge Guilherme, Pedro M. Figueiredo, Pedro Azevedo, Goncalo Minderico, Antonio Leal, João C. Vital, José E. Franca
2001	—	`conf`	A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction. ICECS Jorge Guilherme, João C. Vital, José E. Franca
2001	—	`conf`	Design considerations for high resolution pipeline ADCs in digital CMOS technology. ICECS Jorge Guilherme, Pedro M. Figueiredo, Pedro Azevedo, Goncalo Minderico, Antonio Leal, João C. Vital, José E. Franca
1998	—	`conf`	Symbolic synthesis of non-linear data converters. ICECS Jorge Guilherme, Nuno C. G. Horta, José E. Franca
1995	C	`conf`	New CMOS Logarithmic A/D Converters Employing Pipeline and Algorithmic Architectures. ISCAS Jorge Guilherme, José E. Franca
1995	J	`jnl`	Pushing Standard CMOS Technologies into Smart Power Conversion and Amplification. J. Circuits Syst. Comput. Saulo Finco, Frank Herman Behrens, Jorge Guilherme, Maria Inês Castro Simas, Mário Lança
1994	C	`conf`	Digitally-Controlled Analogue Signal Processing and Conversion Techniques Employing a Logarithmic Building Block. ISCAS Jorge Guilherme, José E. Franca
1993	J	`jnl`	A CMOS analog-digital audio processor for a portable radiotelephone. IEEE J. Solid State Circuits Jorge Guilherme, F. P. Martins, João C. Vital, José E. Franca