Jordi Madrenas

88 papers B 9C 11Misc 5Journal 27Unranked 35

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Analog VLSI Implementation of Subthreshold Spiking Neural Networks and Its Application to Reservoir Computing. IEEE Trans. Circuits Syst. I Regul. Pap. Satoshi Moriya, Masaya Ishikawa, Satoshi Ono, Hideaki Yamamoto, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas, Shigeo Sato
2025	J	`jnl`	Scalable hardware architecture for real-time execution of biomimetic spiking neural networks. Neuromorph. Comput. Eng. Mireya Zapata, Bernardo Vallejo Mancero, Jordi Madrenas
2024	J	`jnl`	A Fully Integrated x4 Voltage Converter for Monolithic Photodiode Light Harvesting. IEEE Access Sasan Nikseresht, Josep Maria Sánchez-Chiva, Daniel Fernández, Jordi Cosp-Vilella, Jordi Madrenas
2024	B	`conf`	Design of Mixed-Signal LSI with Analog Spiking Neural Network and Digital Inference Circuits for Reservoir Computing. IJCNN Satoshi Moriya, Hideaki Yamamoto, Masaya Ishikawa, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas, Shigeo Sato
2024	J	`jnl`	Real-time hardware emulation of neural cultures: A comparative study of in vitro, in silico and in duris silico models. Neural Networks Bernardo Vallejo Mancero, Sergio Faci-Lázaro, Mireya Zapata, Jordi Soriano, Jordi Madrenas
2023	—	`conf`	CMOS Adaptive Optical Wireless Receiver for Ultra-Low-Power IoT Applications. MWSCAS Sasan Nikseresht, Daniel Fernández, Jordi Cosp, Jordi Madrenas
2023	—	`conf`	Real-Time Adaptive Physical Sensor Processing with SNN Hardware. ICANN (5) Jordi Madrenas, Bernardo Vallejo Mancero, Josep Angel Oltra, Mireya Zapata, Jordi Cosp-Vilella, Robert Calatayud, Satoshi Moriya, Shigeo Sato
2022	B	`conf`	A Fully Analog CMOS Implementation of a Two-variable Spiking Neuron in the Subthreshold Region and its Network Operation. IJCNN Satoshi Moriya, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas
2022	—	`conf`	Real-Time Display of Spiking Neural Activity of SIMD Hardware Using an HDMI Interface. ICANN (3) Bernardo Vallejo Mancero, Clément Nader, Jordi Madrenas, Mireya Zapata
2022	—	`conf`	Real-Time Monitoring Tool for SNN Hardware Architecture. WIVACE Mireya Zapata, Vanessa Vargas, Ariel Cagua, Daniela Alvarez, Bernardo Vallejo Mancero, Jordi Madrenas
2021	—	`conf`	A Subthreshold Spiking Neuron Circuit Based on the Izhikevich Model. ICANN (5) Shigeo Sato, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto, Yoshihiko Horio, Yasushi Yuminaka, Jordi Madrenas
2021	J	`jnl`	A Test Setup for the Characterization of Lorentz-Force MEMS Magnetometers. IEEE Open J. Circuits Syst. Josep Maria Sánchez-Chiva, Juan Valle, Daniel Fernández, Jordi Madrenas
2021	C	`conf`	Hardware-Software Co-Design for Efficient and Scalable Real-Time Emulation of SNNs on the Edge. ISCAS Josep Angel Oltra, Jordi Madrenas, Mireya Zapata, Bernardo Vallejo Mancero, Diana Mata-Hernandez, Shigeo Sato
2021	J	`jnl`	Manufacturing Issues of BEOL CMOS-MEMS Devices. IEEE Access Juan Valle, Daniel Fernández, Olivier Gibrat, Jordi Madrenas
2020	J	`jnl`	A CMOS-MEMS BEOL 2-axis Lorentz-Force Magnetometer with Device-Level Offset Cancellation. Sensors Josep Maria Sánchez-Chiva, Juan Valle, Daniel Fernández, Jordi Madrenas
2020	—	`conf`	A test setup for the characterization of Lorentz-force MEMS magnetometers. ICECS Josep Maria Sánchez-Chiva, Daniel Fernández, Jordi Madrenas
2020	J	`jnl`	Resonant MEMS Pressure Sensor in 180 nm CMOS Technology Obtained by BEOL Isotropic Etching. Sensors Diana Mata-Hernandez, Daniel Fernández, Saoni Banerji, Jordi Madrenas
2020	—	`conf`	Towards Efficient and Adaptive Cyber Physical Spiking Neural Integrated Systems. ICECS Jordi Madrenas, Mireya Zapata, Daniel Fernández, Josep Maria Sánchez-Chiva, Juan Valle, Diana Mata-Hernandez, Josep Angel Oltra, Jordi Cosp-Vilella, Shigeo Sato
2019	—	`conf`	Axonal Delay Controller for Spiking Neural Networks Based on FPGA. AHFE (14) Mireya Zapata, Jordi Madrenas, Miroslava Zapata, Jorge Alvarez
2019	C	`conf`	Design Considerations for Analog LCMOS Harvest-Use Integrated Signal Processing. ISCAS Jordi Madrenas, Josep Maria Sánchez-Chiva, Daniel Fernández, Jordi Cosp
2019	J	`jnl`	LEGION-based image segmentation by means of spiking neural networks using normalized synaptic weights implemented on a compact scalable neuromorphic architecture. Neurocomputing Giovanny Sánchez, Jordi Madrenas, Jordi Cosp-Vilella
2018	—	`conf`	Efficient Configuration for a Scalable Spiking Neural Network Platform by means of a Synchronous Address Event Representation bus. AHS Mireya Zapata, Janio Jadán, Jordi Madrenas
2018	J	`jnl`	Experiments on MEMS Integration in 0.25 μm CMOS Process. Sensors Piotr Michalik, Daniel Fernández, Matthias Wietstruck, Mehmet Kaynak, Jordi Madrenas
2018	—	`conf`	Optimizing Power Consumption vs. Linearization in CMFB Amplifiers with Source Degeneration. ICECS C. Bauza, Josep Maria Sánchez-Chiva, Jordi Madrenas, Daniel Fernández
2018	J	`jnl`	SNAVA - A real-time multi-FPGA multi-model spiking neural network simulation architecture. Neural Networks T. A. Athul Sripad, Giovanny Sánchez, Mireya Zapata, Vito Pirrone, Taho Dorta, Salvatore Cambria, Albert Marti, Karthikeyan Krishnamourthy, Jordi Madrenas
2017	—	`conf`	Complexity Reduction of Neural Network Model for Local Motion Detection in Motion Stereo Vision. ICONIP (6) Hisanao Akima, Susumu Kawakami, Jordi Madrenas, Satoshi Moriya, Masafumi Yano, Koji Nakajima, Masao Sakuraba, Shigeo Sato
2017	—	`conf`	Self-adaptive hardware architecture with parallel processing capabilities and dynamic reconfiguration. ARM@Middleware Javier Soto Vargas, Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany
2016	J	`jnl`	AER-SRT: Scalable spike distribution by means of synchronous serial ring topology address event representation. Neurocomputing Taho Dorta, Mireya Zapata, Jordi Madrenas, Giovanny Sánchez
2016	J	`jnl`	CMOS Majority Circuit with Large Fan-In. IEICE Trans. Electron. Hisanao Akima, Yasuhiro Katayama, Masao Sakuraba, Koji Nakajima, Jordi Madrenas, Shigeo Sato
2016	—	`conf`	Compact Associative Memory for AER Spike Decoding in FPGA-Based Evolvable SNN Emulation. ICANN (1) Mireya Zapata, Jordi Madrenas
2016	J	`jnl`	Integration of GMR Sensors with Different Technologies. Sensors María-Dolores Cubells-Beltrán, Càndid Reig, Jordi Madrenas, Andrea De Marcellis, Joana Santos, Susana Cardoso, Paulo P. Freitas
2016	—	`conf`	Synfire Chain Emulation by Means of Flexible SNN Modeling on a SIMD Multicore Architecture. ICANN (1) Mireya Zapata, Jordi Madrenas
2016	—	`conf`	Temperature and pressure characterization of the quality factor in a CMOS-MEMS resonator. IEEE SENSORS Saoni Banerji, Jordi Madrenas, Daniel Fernández
2014	J	`jnl`	Quasi-digital front-ends for current measurement in integrated circuits with giant magnetoresistance technology. IET Circuits Devices Syst. Andrea De Marcellis, M.-Dolores Cubells-Beltrán, Càndid Reig Escriva, Jordi Madrenas, Boris Zadov, Eugene Paperno, Susana Cardoso, Paulo P. Freitas
2013	—	`conf`	A Novel Alternative Exponent-Weighted Fuzzy C-Means Algorithm. GreenCom/iThings/CPScom Renhao Fan, Xiang Wang, Jordi Madrenas
2013	C	`conf`	Spike-based analog-digital neuromorphic information processing system for sensor applications. ISCAS Giovanny Sánchez, Thomas Jacob Koickal, T. A. Athul Sripad, Luiz Carlos Gouveia, Alister Hamilton, Jordi Madrenas
2012	J	`jnl`	A Translinear, Log-Domain FPAA on Standard CMOS Technology. IEEE J. Solid State Circuits Daniel Fernández, Luís Martínez-Alvarado, Jordi Madrenas
2012	C	`conf`	LCMOS: Light-powered standard CMOS circuits. ISCAS Jordi Madrenas, Daniel Fernández, Chunyan Wang
2012	J	`jnl`	Pulsed Digital Oscillators for Electrostatic MEMS. IEEE Trans. Circuits Syst. I Regul. Pap. Sergi Gorreta, Daniel Fernández, Elena Blokhina, Joan Pons-Nin, Vicente Jimenez, Diarmuid O'Connell, Orla Feely, Jordi Madrenas, Manuel Domínguez Pumar
2012	—	`conf`	Sense/drive architecture for CMOS-MEMS accelerometers with relaxation oscillator and TDC. ICECS Piotr Michalik, Jordi Madrenas, Daniel Fernández
2011	J	`jnl`	A self-test and dynamics characterization circuit for MEMS electrostatic actuators. Microelectron. Reliab. Daniel Fernández, Jordi Madrenas, Jordi Cosp
2011	—	`conf`	Bioinspired Sensory Integration for Environment-Perception Embedded Systems. BIODEVICES Jordi Madrenas, Daniel Fernández, Jordi Cosp, Juan Manuel Moreno, Luís Martínez-Alvarado, Giovanny Sánchez
2011	C	`conf`	Continuous-time CMOS adaptive asynchronous ΣΔ modulator approximating low-ƒs low-inband-error on-chip wideband power amplifier. ISCAS Eduard Alarcón, Daniel Fernández, Albert Garcia-Tormo, Jordi Madrenas, Alberto Poveda
2010	—	`conf`	A low-voltage current sorting circuit based on 4-T min-max CMOS switch. ICECS Jordi Madrenas, Daniel Fernández, Jordi Cosp
2010	J	`jnl`	Experiments on the Release of CMOS-Micromachined Metal Layers. J. Sensors Daniel Fernández, Jordi Ricart, Jordi Madrenas
2010	—	`conf`	Implementation of a Power-Aware Dynamic Fault Tolerant Mechanism on the Ubichip Platform. ICES Kotaro Kobayashi, Juan Manuel Moreno, Jordi Madrenas
2010	—	`conf`	Performance Evaluation and Scaling of a Multiprocessor Architecture Emulating Complex SNN Algorithms. ICES Giovanny Sánchez, Jordi Madrenas, Juan Manuel Moreno
2009	B	`conf`	A reconfigurable architecture for emulating large-scale bio-inspired systems. IEEE Congress on Evolutionary Computation Juan Manuel Moreno, Jordi Madrenas
2009	—	`conf`	Implementation of a Dynamic Fault-Tolerance Scaling Technique on a Self-Adaptive Hardware Architecture. ReConFig Javier Soto Vargas, Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany
2009	B	`conf`	JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator. IEEE Congress on Evolutionary Computation Olivier Brousse, Jérémie Guillot, Thierry Gil, François Grize, Gilles Sassatelli, Juan Manuel Moreno, Jordi Madrenas, Alessandro E. P. Villa, Henri Volken, Michel Robert
2009	B	`conf`	SpiNDeK: An Integrated design tool for the multiprocessor emulation of complex bioinspired spiking neural networks. IEEE Congress on Evolutionary Computation Michael Hauptvogel, Jordi Madrenas, Juan Manuel Moreno
2009	—	`conf`	Strategies in SIMD Computing for Complex Neural Bioinspired Applications. AHS Jordi Madrenas, Juan Manuel Moreno
2009	—	`conf`	Synchronous Digital Implementation of the AER Communication Scheme for Emulating Large-Scale Spiking Neural Networks Models. AHS Juan Manuel Moreno, Jordi Madrenas, Lukasz Kotynia
2009	—	`conf`	Translinear signal processing circuits in standard CMOS FPAA. ICECS Luís Martínez-Alvarado, Jordi Madrenas, Daniel Fernández
2008	J	`jnl`	A MOSFET-Based Wide-Dynamic-Range Translinear Element. IEEE Trans. Circuits Syst. II Express Briefs Daniel Fernández, Jordi Madrenas
2008	—	`conf`	A reconfigurable translinear cell architecture for CMOS field-programmable analog arrays. ICECS Daniel Fernández, Jordi Madrenas, Piotr Michalik, Dominik Kapusta
2008	C	`conf`	An asynchronous finite state machine controller for integrated buck-boost power converters in wideband signal-tracking applications. ISCAS Daniel Fernández, Jordi Madrenas, Eduard Alarcón
2008	—	`conf`	BAF: A Bio-Inspired Agent Framework for Distributed Pervasive Applications. GEM Olivier Brousse, Gilles Sassatelli, Thierry Gil, Yoann Guillemenet, Michel Robert, François Grize, Eduardo Sanchez, Yann Thoma, Andres Upegui, Juan Manuel Moreno, Jordi Madrenas
2008	C	`conf`	Exponential-enhanced characteristic of MOS transistors and its application to log-domain circuits. ISCAS Daniel Fernández, Jordi Madrenas, Dominik Kapusta, Piotr Michalik
2008	C	`conf`	Implementation of compact VLSI FitzHugh-Nagumo neurons. ISCAS Jordi Cosp, Stéphane Binczak, Jordi Madrenas, Daniel Fernández
2008	C	`conf`	Position, damping and inertia control of parallel-plate electrostatic actuators. ISCAS Daniel Fernández, Jordi Madrenas, Jordi Cosp
2008	J	`jnl`	The PERPLEXUS bio-inspired hardware platform: A flexible and modular approach. Int. J. Knowl. Based Intell. Eng. Syst. Andres Upegui, Yann Thoma, Eduardo Sanchez, Andrés Pérez-Uribe, Juan Manuel Moreno, Jordi Madrenas, Gilles Sassatelli
2007	—	`conf`	A Novel Hardware Architecture for Self-adaptive Systems. AHS Jose Antonio Casas, Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany
2007	J	`jnl`	Improving the Performance of PieceWise Linear Separation Incremental Algorithms for Practical Hardware Implementations CoRR Alejandro Chinea Manrique De Lara, Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany
2007	—	`conf`	The Perplexus bio-inspired reconfigurable circuit. AHS Andres Upegui, Yann Thoma, Eduardo Sanchez, Andrés Pérez-Uribe, Juan Manuel Moreno, Jordi Madrenas
2006	J	`jnl`	Design and basic blocks of a neuromorphic VLSI analogue vision system. Neurocomputing Jordi Cosp, Jordi Madrenas, Daniel Fernández
2005	—	`conf`	Energy optimization of tapered buffers for CMOS on-chip switching power converters. ISCAS (5) Gerard Villar, Eduard Alarcón, Jordi Madrenas, Francesc Guinjoan, Alberto Poveda
2005	—	`ed.`	Evolvable Systems: From Biology to Hardware, 6th International Conference, ICES 2005, Sitges, Spain, September 12-14, 2005, Proceedings ICES Juan Manuel Moreno, Jordi Madrenas, Jordi Cosp
2005	—	`conf`	Mismatch-tolerant CMOS oscillator and excitatory synapse for bioinspired image segmentation. ISCAS (4) Daniel Fernández, Gerard Villar, Eva Vidal, Eduard Alarcón, Jordi Cosp, Jordi Madrenas
2005	—	`conf`	Selective similarity function for VLSI analog signal processing. ISCAS (4) Jordi Madrenas, Daniel Fernández, Jordi Cosp, Eduard Alarcón, Eva Vidal, Gerard Villar
2004	B	`conf`	BIOSEG: a bioinspired vlsi analog system for image segmentation. ESANN Jordi Madrenas, Jordi Cosp, Lucas Oscar, Eduard Alarcón, Eva Vidal, Gerard Villar
2004	J	`jnl`	Synchronization of nonlinear electronic oscillators for neural computation. IEEE Trans. Neural Networks Jordi Cosp, Jordi Madrenas, Eduard Alarcón, Eva Vidal, Gerard Villar
2003	J	`jnl`	Scene segmentation using neuromorphic oscillatory networks. IEEE Trans. Neural Networks Jordi Cosp, Jordi Madrenas
2001	B	`conf`	A microelectronic implementation of a bioinspired analog matrix for object segmentation of a visual scene. ESANN Jordi Cosp, Jordi Madrenas
2000	C	`conf`	Mixed-signal VLSI for neural and fuzzy sequential processors. ISCAS Jordi Madrenas, Eduard Alarcón, Jordi Cosp, Juan Manuel Moreno, Alberto Poveda, Joan Cabestany
1999	—	`conf`	Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration. Evolvable Hardware Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany, E. Cantó, Rafal Kielbik, Julio Faura, Josep Maria Insenser
1998	—	`conf`	Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices. ICES Juan Manuel Moreno, Jordi Madrenas, Julio Faura, E. Cantó, Joan Cabestany, Josep Maria Insenser
1997	C	`conf`	Analog Sequential Architecture for Neuro-Fuzzy Models VLSI Implementation. ICANN Juan Manuel Moreno, Jordi Madrenas, Eduard Alarcón, Joan Cabestany
1997	Misc	`conf`	Improving the Performance of Piecewise Linear Separation Incremental Algorithms for Practical Hardware Implementations. IWANN Alejandro Chinea Manrique De Lara, Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany
1997	—	`conf`	Practical Design Methodology for Commercial Automatic Coin Recognizers Based on Neural Decision Engines. ICONIP (1) Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany, J. R. Laúna
1997	Misc	`conf`	Synthesis and Optimization of a Bit-Serial Pipeline Kernel Processor. IWANN Jordi Madrenas, Gregorio Ruiz, Juan Manuel Moreno, Joan Cabestany
1997	Misc	`conf`	Using Classical and Evolutive Neural Models in Industrial Applications: A Case Study for an Automatic Coin Classifier. IWANN Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany, J. R. Laúna
1995	Misc	`conf`	A VLSI System for Neural Bayesian and LVQ Classification. IWANN Philippe Thissen, Michel Verleysen, Jean-Didier Legat, Jordi Madrenas, Jordi Domínguez
1995	B	`conf`	A deterministic method for establishing the initial conditions in the RCE algorithm. ESANN Juan Manuel Moreno, F. X. Vazquez, Francisco Castillo, Jordi Madrenas, Joan Cabestany
1995	B	`conf`	Derivation of a new criterion function based on an information measure for improving piecewise linear separation incremental algorithms. ESANN Josep Cugueró, Jordi Madrenas, Juan Manuel Moreno, Joan Cabestany
1995	Misc	`conf`	Digital Hardware Implementation of ROI Incremental Algorithms. IWANN Juan Manuel Moreno, Jordi Madrenas, S. San Anselmo, Francisco Castillo, Joan Cabestany
1994	J	`jnl`	An analog processor architecture for a neural network classifier. IEEE Micro Michel Verleysen, Philippe Thissen, Jean-Luc Voz, Jordi Madrenas
1994	J	`jnl`	An analog systolic neural processing architecture. IEEE Micro Juan Manuel Moreno, Francisco Castillo, Joan Cabestany, Jordi Madrenas, Andrzej Napieralski