Jordi Cortadella

205 papers A* 15A 34B 4C 10Misc 5Journal 68Unranked 66

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Area-driven Boolean bi-decomposition by function approximation. ACM Trans. Design Autom. Electr. Syst. Anna Bernasconi, Valentina Ciriani, Jordi Cortadella, Marco Costa, Tiziano Villa
2025	A	`conf`	Promise: Property Mining for Sequential Synthesis. ICCAD Jiahui Xu, Jordi Cortadella, Lana Josipovic
2024	J	`jnl`	Mix & Latch: Comparison With State-of-the-Art Retiming on a RISC-V Benchmark. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Lorenzo Lagostina, Filippo Minnella, Jordi Cortadella, Mario R. Casu, Mihai T. Lazarescu, Luciano Lavagno
2023	A	`conf`	Eliminating Excessive Dynamism of Dataflow Circuits Using Model Checking. FPGA Jiahui Xu, Emmet Murphy, Jordi Cortadella, Lana Josipovic
2023	J	`jnl`	Generation of synchronizing state machines from a transition system: A region-based approach. Int. J. Appl. Math. Comput. Sci. Viktor Teren, Jordi Cortadella, Tiziano Villa
2023	J	`jnl`	Mix & Latch: An Optimization Flow for High-Performance Designs With Single-Clock Mixed-Polarity Latches and Flip-Flops. IEEE Access Filippo Minnella, Jordi Cortadella, Mario R. Casu, Mihai T. Lazarescu, Luciano Lavagno
2023	C	`conf`	Seto: A Framework for the Decomposition of Petri Nets and Transition Systems. DSD Viktor Teren, Jordi Cortadella, Tiziano Villa
2022	J	`jnl`	Buffer Placement and Sizing for High-Performance Dataflow Circuits. ACM Trans. Reconfigurable Technol. Syst. Lana Josipovic, Shabnam Sheikhha, Andrea Guerrieri, Paolo Ienne, Jordi Cortadella
2022	C	`conf`	Decomposition of transition systems into sets of synchronizing Free-choice Petri Nets. DSD Viktor Teren, Jordi Cortadella, Tiziano Villa
2022	J	`jnl`	Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu
2021	J	`jnl`	CNN-on-AWS: Efficient Allocation of Multikernel Applications on Multi-FPGA Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu
2021	C	`conf`	Decomposition of transition systems into sets of synchronizing state machines. DSD Viktor Teren, Jordi Cortadella, Tiziano Villa
2021	J	`jnl`	Decomposition of transition systems into sets of synchronizing state machines. CoRR Viktor Teren, Jordi Cortadella, Tiziano Villa
2021	J	`jnl`	Multilevel Dataflow-Driven Macro Placement Guided by RTL Structure and Analytical Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit, Marc Galceran Oms, Ferran Martorell
2020	J	`jnl`	Automatic Safe Data Reuse Detection for the WCET Analysis of Systems With Data Caches. IEEE Access Juan Segarra, Jordi Cortadella, Ruben Gran Tejero, Víctor Viñals Yúfera
2020	A	`conf`	Buffer Placement and Sizing for High-Performance Dataflow Circuits. FPGA Lana Josipovic, Shabnam Sheikhha, Andrea Guerrieri, Paolo Ienne, Jordi Cortadella
2020	A	`conf`	Computing the full quotient in bi-decomposition by approximation. DATE Anna Bernasconi, Valentina Ciriani, Jordi Cortadella, Tiziano Villa
2020	J	`jnl`	Power-Optimal Mapping of CNN Applications to Cloud-Based Multi-FPGA Platforms. IEEE Trans. Circuits Syst. Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu
2020	J	`jnl`	Support-Reducing Decomposition for FPGA Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Lucas Machado, Jordi Cortadella
2020	C	`conf`	Transistor Placement for Automatic Cell Synthesis through Boolean Satisfiability. ISCAS Maicon Schneider Cardoso, Andrei A. O. Bubolz, Jordi Cortadella, Leomar Soares da Rosa Júnior, Felipe S. Marques
2019	J	`jnl`	Corrections to "Jutge.org: Characteristics and Experiences". IEEE Trans. Learn. Technol. Jordi Petit, Salvador Roura, Josep Carmona, Jordi Cortadella, Jordi Duch, Omer Giménez, Anaga Mani, Jan Mas, Enric Rodríguez-Carbonell, Enric Rubio, Enric de San Pedro, Divya Venkataramani
2019	A*	`conf`	Exact and Heuristic Allocation of Multi-kernel Applications to Multi-FPGA Platforms. DAC Junnan Shan, Mario R. Casu, Jordi Cortadella, Luciano Lavagno, Mihai T. Lazarescu
2019	—	`ch.`	From Nets to Circuits and from Circuits to Nets. Carl Adam Petri: Ideas, Personality, Impact Jordi Cortadella
2019	A	`conf`	RTL-Aware Dataflow-Driven Macro Placement. DATE Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit, Marc Galceran Oms, Ferran Martorell
2019	—	`conf`	Synthesis from Waveform Transition Graphs. ASYNC Alberto Moreno, Danil Sokolov, Jordi Cortadella
2018	J	`jnl`	Jutge.org: Characteristics and Experiences. IEEE Trans. Learn. Technol. Jordi Petit, Salvador Roura, Josep Carmona, Jordi Cortadella, Jordi Duch, Omer Giménez, Anaga Mani, Jan Mas, Enric Rodríguez-Carbonell, Enric Rubio, Enric de San Pedro, Divya Venkataramani
2018	—	`conf`	State Encoding of Asynchronous Controllers Using Pseudo-Boolean Optimization. ASYNC Alberto Moreno, Jordi Cortadella
2018	J	`jnl`	State-Based Encoding of Large Asynchronous Controllers. IEEE Access Alberto Moreno, Jordi Cortadella
2017	Misc	`conf`	A hierarchical mathematical model for automatic pipelining and allocation using elastic systems. ACSSC Jordi Cortadella, Jordi Petit
2017	—	`conf`	Boolean Decomposition for AIG Optimization. ACM Great Lakes Symposium on VLSI Lucas Machado, Jordi Cortadella
2017	—	`conf`	Process Windows. ACSD Andrey Mokhov, Jordi Cortadella, Alessandro de Gennaro
2017	—	`conf`	Synthesis of All-Digital Delay Lines. ASYNC Alberto Moreno, Jordi Cortadella
2017	—	`conf`	Under-the-Cell Routing to Improve Manufacturability. ACM Great Lakes Symposium on VLSI Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit
2017	—	`conf`	Voltage Noise Analysis with Ring Oscillator Clocks. ISVLSI Lucas Machado, Antoni Roca Perez, Jordi Cortadella
2017	—	`conf`	Waveform Transition Graphs: A Designer-Friendly Formalism for Asynchronous Behaviours. ASYNC Jordi Cortadella, Alberto Moreno, Danil Sokolov, Alex Yakovlev, David Lloyd
2016	J	`jnl`	A Fast and Retargetable Framework for Logic-IP-Internal Electromigration Assessment Comprehending Advanced Waveform Effects. IEEE Trans. Very Large Scale Integr. Syst. Palkesh Jain, Jordi Cortadella, Sachin S. Sapatnekar
2016	A	`conf`	Discovering Duplicate Tasks in Transition Systems for the Simplification of Process Models. BPM Javier de San Pedro, Jordi Cortadella
2016	Misc	`conf`	Mining structured petri nets for the visualization of process behavior. SAC Javier de San Pedro, Jordi Cortadella
2016	—	`conf`	Ring Oscillator Clocks and Margins. ASYNC Jordi Cortadella, Marc Lupon, Alberto Moreno, Antoni Roca, Sachin S. Sapatnekar
2016	—	`conf`	Specification Mining for Asynchronous Controllers. ASYNC Javier de San Pedro, Thomas Bourgeat, Jordi Cortadella
2015	—	`conf`	A retargetable and accurate methodology for logic-IP-internal electromigration assessment. ASP-DAC Palkesh Jain, Sachin S. Sapatnekar, Jordi Cortadella
2015	A	`conf`	Log-Based Simplification of Process Models. BPM Javier de San Pedro, Josep Carmona, Jordi Cortadella
2015	J	`jnl`	RTL Synthesis: From Logic Synthesis to Automatic Pipelining. Proc. IEEE Jordi Cortadella, Marc Galceran Oms, Michael Kishinevsky, Sachin S. Sapatnekar
2015	C	`conf`	Reactive clocks with variability-tracking jitter. ICCD Jordi Cortadella, Luciano Lavagno, Pedro Lopez, Marc Lupon, Alberto Moreno, Antoni Roca, Sachin S. Sapatnekar
2015	J	`jnl`	SafeRazor: Metastability-Robust Adaptive Clocking in Resilient Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Marco Cannizzaro, Salomon Beer, Jordi Cortadella, Ran Ginosar, Luciano Lavagno
2015	—	`conf`	Stochastic and topologically aware electromigration analysis for clock skew. IRPS Palkesh Jain, Sachin S. Sapatnekar, Jordi Cortadella
2014	J	`jnl`	A Boolean Rule-Based Approach for Manufacturability-Aware Cell Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jordi Cortadella, Jordi Petit, Sergio Gómez, Francesc Moll
2014	A	`conf`	A hierarchical approach for generating regular floorplans. ICCAD Javier de San Pedro, Jordi Cortadella, Antoni Roca
2014	A	`conf`	Hardware primitives for the synthesis of multithreaded elastic systems. DATE Giorgos Dimitrakopoulos, I. Seitanidis, Anastasios Psarras, K. Tsiouris, Pavlos M. Mattheakis, Jordi Cortadella
2014	—	`conf`	Metastability in Better-Than-Worst-Case Designs. ASYNC Salomon Beer, Marco Cannizzaro, Jordi Cortadella, Ran Ginosar, Luciano Lavagno
2014	J	`jnl`	Process Discovery Algorithms Using Numerical Abstract Domains. IEEE Trans. Knowl. Data Eng. Josep Carmona, Jordi Cortadella
2013	J	`jnl`	Architectural Exploration of Large-Scale Hierarchical Chip Multiprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nikita Nikitin, Javier de San Pedro, Jordi Cortadella
2013	J	`jnl`	Area-Optimal Transistor Folding for 1-D Gridded Cell Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jordi Cortadella
2013	J	`jnl`	Brownian Circuits: Fundamentals. ACM J. Emerg. Technol. Comput. Syst. Ferdinand Peper, Jia Lee, Josep Carmona, Jordi Cortadella, Kenichi Morita
2013	—	`conf`	Physical planning for the architectural exploration of large-scale chip multiprocessors. NOCS Javier de San Pedro, Nikita Nikitin, Jordi Cortadella, Jordi Petit
2013	—	`conf`	Physical-aware system-level design for tiled hierarchical chip multiprocessors. ISPD Jordi Cortadella, Javier de San Pedro, Nikita Nikitin, Jordi Petit
2012	—	`conf`	Analytical Performance Modeling of Hierarchical Interconnect Fabrics. NOCS Nikita Nikitin, Javier de San Pedro, Josep Carmona, Jordi Cortadella
2012	A	`conf`	Integrating formal verification in an online judge for e-Learning logic circuit design. SIGCSE Javier de San Pedro, Josep Carmona, Jordi Cortadella, Jordi Petit
2012	—	`conf`	Static Task Mapping for Tiled Chip Multiprocessors with Multiple Voltage Islands. ARCS Nikita Nikitin, Jordi Cortadella
2011	J	`jnl`	A Scheduling Strategy for Synchronous Elastic Designs. Fundam. Informaticae Josep Carmona, Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky
2011	J	`jnl`	Microarchitectural Transformations Using Elasticity. ACM J. Emerg. Technol. Comput. Syst. Marc Galceran Oms, Alexander Gotmanov, Jordi Cortadella, Michael Kishinevsky
2010	A	`conf`	Automatic microarchitectural pipelining. DATE Marc Galceran Oms, Jordi Cortadella, Dmitry Bufistov, Michael Kishinevsky
2010	C	`conf`	Elastic systems. MEMOCODE Jordi Cortadella, Marc Galceran Oms, Michael Kishinevsky
2010	J	`jnl`	New Region-Based Algorithms for Deriving Bounded Petri Nets. IEEE Trans. Computers Josep Carmona, Jordi Cortadella, Michael Kishinevsky
2010	J	`jnl`	On the Performance Evaluation of Multi-Guarded Marked Graphs with Single-Server Semantics. Discret. Event Dyn. Syst. Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky
2010	—	`conf`	Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing. NOCS Nikita Nikitin, Satrajit Chatterjee, Jordi Cortadella, Michael Kishinevsky, Ümit Y. Ogras
2010	—	`conf`	Process Mining Meets Abstract Interpretation. ECML/PKDD (1) Josep Carmona, Jordi Cortadella
2010	A	`conf`	Symbolic performance analysis of elastic systems. ICCAD Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky
2009	J	`jnl`	A Recursive Paradigm to Solve Boolean Relations. IEEE Trans. Computers David Bañeres, Jordi Cortadella, Michael Kishinevsky
2009	A	`conf`	A performance analytical model for Network-on-Chip with constant service time routers. ICCAD Nikita Nikitin, Jordi Cortadella
2009	A	`conf`	Divide-and-Conquer Strategies for Process Mining. BPM Josep Carmona, Jordi Cortadella, Michael Kishinevsky
2009	J	`jnl`	Elastic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Josep Carmona, Jordi Cortadella, Michael Kishinevsky, Alexander Taubin
2009	A*	`conf`	Enabling adaptability through elastic clocks. DAC Emre Tuncer, Jordi Cortadella, Luciano Lavagno
2009	—	`conf`	Genet: A Tool for the Synthesis and Mining of Petri Nets. ACSD Josep Carmona, Jordi Cortadella, Michael Kishinevsky
2009	J	`jnl`	Guest Editorial: Special Section on Asynchronous Circuits and Systems. IEEE Trans. Very Large Scale Integr. Syst. Jordi Cortadella, Alexander Taubin
2009	A	`conf`	Multi-level clustering for clock skew optimization. ICCAD Jonas Casanova, Jordi Cortadella
2009	A*	`conf`	Retiming and recycling for elastic systems with early evaluation. DAC Dmitry Bufistov, Jordi Cortadella, Marc Galceran Oms, Jorge Júlvez, Michael Kishinevsky
2009	—	`conf`	Scheduling Synchronous Elastic Designs. ACSD Josep Carmona, Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky
2009	A*	`conf`	Speculation in elastic systems. DAC Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky
2009	—	`conf`	Timing-driven N-way decomposition. ACM Great Lakes Symposium on VLSI David Bañeres, Jordi Cortadella, Michael Kishinevsky
2009	A	`conf`	Variable-latency design by function speculation. DATE David Bañeres, Jordi Cortadella, Michael Kishinevsky
2008	A	`conf`	A Region-Based Algorithm for Discovering Petri Nets from Event Logs. BPM Josep Carmona, Jordi Cortadella, Michael Kishinevsky
2008	B	`conf`	A Symbolic Algorithm for the Synthesis of Bounded Petri Nets. Petri Nets Josep Carmona, Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
2008	A	`conf`	Correct-by-construction microarchitectural pipelining. ICCAD Timothy Kam, Michael Kishinevsky, Jordi Cortadella, Marc Galceran Oms
2008	J	`jnl`	Elasticity and Petri Nets. Trans. Petri Nets Other Model. Concurr. Jordi Cortadella, Michael Kishinevsky, Dmitry Bufistov, Josep Carmona, Jorge Júlvez
2008	J	`jnl`	Encoding Large Asynchronous Controllers With ILP Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Josep Carmona, Jordi Cortadella
2008	J	`jnl`	Formal methods for the analysis and synthesis of nanometer-scale cellular arrays. ACM J. Emerg. Technol. Comput. Syst. Josep Carmona, Jordi Cortadella, Yousuke Takada, Ferdinand Peper
2008	—	`conf`	Hardware Synthesis for Asynchronous Communications Mechanisms. SCCC Kyller Costa Gorgônio, Jordi Cortadella
2008	A	`conf`	Performance optimization of elastic systems using buffer resizing and buffer insertion. ICCAD Dmitry Bufistov, Jorge Júlvez, Jordi Cortadella
2008	—	`conf`	Time elastic digital systems and Petri Nets. ACSD Michael Kishinevsky, Jordi Cortadella
2007	—	`conf`	A Compositional Method for the Synthesis of Asynchronous Communication Mechanisms. ICATPN Kyller Costa Gorgônio, Jordi Cortadella, Fei Xia
2007	A	`conf`	A general model for performance optimization of sequential systems. ICCAD Dmitry Bufistov, Jordi Cortadella, Michael Kishinevsky, Sachin S. Sapatnekar
2007	J	`jnl`	Automating Synthesis of Asynchronous Communication Mechanisms. Fundam. Informaticae Kyller Costa Gorgônio, Jordi Cortadella, Fei Xia, Alexandre Yakovlev
2007	J	`jnl`	Design Automation of Real-Life Asynchronous Devices and Systems. Found. Trends Electron. Des. Autom. Alexander Taubin, Jordi Cortadella, Luciano Lavagno, Alex Kondratyev, Ad M. G. Peeters
2007	A	`conf`	Layout-aware gate duplication and buffer insertion. DATE David Bañeres, Jordi Cortadella, Michael Kishinevsky
2007	A*	`conf`	Synchronous Elastic Circuits with Early Evaluation and Token Counterflow. DAC Jordi Cortadella, Michael Kishinevsky
2007	J	`jnl`	The octahedron abstract domain. Sci. Comput. Program. Robert Clarisó, Jordi Cortadella
2007	J	`jnl`	Verification of Concurrent Systems with Parametric Delays Using Octahedra. Fundam. Informaticae Robert Clarisó, Jordi Cortadella
2006	J	`jnl`	Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou
2006	—	`conf`	Dominator-based partitioning for delay optimization. ACM Great Lakes Symposium on VLSI David Bañeres, Jordi Cortadella, Michael Kishinevsky
2006	A	`conf`	From molecular interactions to gates: a systematic approach. ICCAD Josep Carmona, Jordi Cortadella, Yousuke Takada, Ferdinand Peper
2006	A	`conf`	Performance analysis of concurrent systems with early evaluation. ICCAD Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky
2006	A*	`conf`	State encoding of large asynchronous controllers. DAC Josep Carmona, Jordi Cortadella
2006	Misc	`conf`	Synchronous Elastic Circuits. CSR Michael Kishinevsky, Jordi Cortadella, Bill Grundmann, Sava Krstic, John O'Leary
2006	B	`conf`	Synchronous Elastic Networks. FMCAD Sava Krstic, Jordi Cortadella, Michael Kishinevsky, John O'Leary
2006	J	`jnl`	Synthesis of asynchronous controllers using integer linear programming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Josep Carmona, José Manuel Colom, Jordi Cortadella, Fernando García-Vallés
2006	A*	`conf`	Synthesis of synchronous elastic architectures. DAC Jordi Cortadella, Michael Kishinevsky, Bill Grundmann
2005	—	`conf`	Automating Synthesis of Asynchronous Communication Mechanisms. ACSD Jordi Cortadella, Kyller Costa Gorgônio, Fei Xia, Alexandre Yakovlev
2005	—	`conf`	Derivation of Non-structural Invariants of Petri Nets Using Abstract Interpretation. ICATPN Robert Clarisó, Enric Rodríguez-Carbonell, Jordi Cortadella
2005	J	`jnl`	Quasi-static scheduling of independent tasks for reactive systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe
2005	—	`conf`	Verification of Concurrent Systems with Parametric Delays Using Octahedra. ACSD Robert Clarisó, Jordi Cortadella
2004	A*	`conf`	A recursive paradigm to solve Boolean relations. DAC David Bañeres, Jordi Cortadella, Michael Kishinevsky
2004	—	`ed.`	Applications and Theory of Petri Nets 2004, 25th International Conference, ICATPN 2004, Bologna, Italy, June 21-25, 2004, Proceedings ICATPN Jordi Cortadella, Wolfgang Reisig
2004	Misc	`conf`	Boolean Decomposition Using Two-literal Divisors. VLSI Design Nilesh Modi, Jordi Cortadella
2004	Misc	`conf`	Bridging the Gap between Asynchronous Design and Designers. VLSI Design Peter A. Beerel, Jordi Cortadella, Alex Kondratyev
2004	C	`conf`	Coping with The Variability of Combinational Logic Delays. ICCD Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou
2004	A	`conf`	From Synchronous to Asynchronous: An Automatic Approach. DATE Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou
2004	—	`conf`	Handshake Protocols for De-Synchronization. ASYNC Ivan Blunno, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou
2004	J	`jnl`	Quasi-static Scheduling for Concurrent Architectures. Fundam. Informaticae Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Yosinori Watanabe
2004	B	`conf`	The Octahedron Abstract Domain. SAS Robert Clarisó, Jordi Cortadella
2004	—	`conf`	Verification of timed circuits with symbolic delays. ASP-DAC Robert Clarisó, Jordi Cortadella
2003	A	`conf`	ILP Models for the Synthesis of Asynchronous Control Circuits. ICCAD Josep Carmona, Jordi Cortadella
2003	—	`conf`	Quasi-Static Scheduling for Concurrent Architectures. ACSD Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe
2003	—	`conf`	Synthesis of Asynchronous Hardware from Petri Nets. Lectures on Concurrency and Petri Nets Josep Carmona, Jordi Cortadella, Victor Khomenko, Alexandre Yakovlev
2003	J	`jnl`	Timing-driven logic bi-decomposition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jordi Cortadella
2002	A	`conf`	A Case Study for the Verification of Complex Timed Circuits: IPCMOS. DATE Marco A. Peña, Jordi Cortadella, Alexander B. Smirnov, Enric Pastor
2002	J	`jnl`	A structural encoding technique for the synthesis of asynchronous circuits. Fundam. Informaticae Josep Carmona, Jordi Cortadella, Enric Pastor
2002	—	`conf`	Bi-Decomposition and Tree-Height Reduction for Timing Optimization. IWLS Jordi Cortadella
2002	—	`ed.`	Concurrency and Hardware Design, Advances in Petri Nets Concurrency and Hardware Design Jordi Cortadella, Alexandre Yakovlev, Grzegorz Rozenberg
2002	J	`jnl`	Design of Asynchronous Controllers with Delay Insensitive Interface. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alex Yakovlev, Takashi Nanya
2002	B	`conf`	Input/Output Compatibility of Reactive Systems. FMCAD Josep Carmona, Jordi Cortadella
2002	J	`jnl`	Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev
2002	—	`conf`	Logic Design of Asynchronous Circuits (Tutorial Abstract). ASP-DAC/VLSI Design Jordi Cortadella, Alexandre Yakovlev, Jim D. Garside
2002	—	`conf`	Quasi-Static Scheduling of Independent Tasksfor Reactive Systems. ICATPN Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe
2002	—	`conf`	Synthesis of Reactive Systems: Application to Asynchronous Circuit Design. Concurrency and Hardware Design Josep Carmona, Jordi Cortadella, Enric Pastor
2001	—	`conf`	A Multi-Radix Approach to Asynchronous Division. ASYNC Gianluca Cornetta, Jordi Cortadella
2001	—	`conf`	A structural encoding technique for the synthesis of asynchronous circuits. ACSD Josep Carmona, Jordi Cortadella, Enric Pastor
2001	—	`conf`	Asynchronous multipliers with variable-delay counters. ICECS Gianluca Cornetta, Jordi Cortadella
2001	J	`jnl`	Symbolic Analysis of Bounded Petri Nets. IEEE Trans. Computers Enric Pastor, Jordi Cortadella, Oriol Roig
2000	—	`conf`	A Relational View of Subgraph Isomorphism. RelMiCS Jordi Cortadella, Gabriel Valiente
2000	—	`conf`	Formal Verification of Safety Properties in Timed Circuits. ASYNC Marco A. Peña, Jordi Cortadella, Enric Pastor, Alex Kondratyev
2000	—	`conf`	Hardware and Petri Nets: Application to Asynchronous Circuit Design. ICATPN Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
2000	A*	`conf`	Task generation and compile-time scheduling for mixed data-control embedded software. DAC Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Marc Massot, Sandra Moral, Claudio Passerone, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli
1999	—	`conf`	A Radix-16 SRT Division Unit with Speculation of the Quotient Digits. Great Lakes Symposium on VLSI Gianluca Cornetta, Jordi Cortadella
1999	A*	`conf`	Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. DAC Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev
1999	—	`conf`	Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications. ASYNC Alexander Taubin, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno
1999	A*	`conf`	CAD Directions for High Performance Asynchronous Circuits. DAC Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken
1999	J	`jnl`	Decomposition and technology mapping of speed-independent circuits using Boolean relations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev
1999	J	`jnl`	Logic decomposition of speed-independent circuits. Proc. IEEE Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev
1999	J	`jnl`	Optimal exploration of the unrolling degree for software pipelining. J. Syst. Archit. Fermín Sánchez, Jordi Cortadella, Rosa M. Badia
1999	—	`conf`	Structural Methods to Improve the Symbolic Analysis of Petri Nets. ICATPN Enric Pastor, Jordi Cortadella, Marco A. Peña
1999	A	`conf`	Synthesis of asynchronous control circuits with automatically generated relative timing assumptions. ICCAD Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Ken S. Stevens
1999	A	`conf`	What is the cost of delay insensitivity? ICCAD Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev
1998	A*	`conf`	Asynchronous Interface Specification, Analysis and Synthesis. DAC Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev
1998	—	`conf`	Combining Structural and Symbolic Methods for the Verification of Concurrent Systems. ACSD Jordi Cortadella
1998	J	`jnl`	Deriving Petri Nets for Finite Transition Systems. IEEE Trans. Computers Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev
1998	A	`conf`	Efficient Encoding Schemes for Symbolic Analysis of Petri Nets. DATE Enric Pastor, Jordi Cortadella
1998	C	`conf`	Extension of the working-zone-encoding method to reduce the energy on the microprocessor data bus. ICCD Tomás Lang, Enric Musoll, Jordi Cortadella
1998	—	`conf`	Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings. ACSD Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev
1998	A	`conf`	Lazy transition systems: application to timing optimization of asynchronous circuits. ICCAD Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev
1998	J	`jnl`	Reducing Register Pressure in Software Pipelining. J. Inf. Sci. Eng. Fermín Sánchez, Jordi Cortadella
1998	J	`jnl`	Register-Transfer Level Transformations for Low-Power Data-Paths. Integr. Comput. Aided Eng. Enric Musoll, Jordi Cortadella
1998	J	`jnl`	Structural methods for the synthesis of speed-independent circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Enric Pastor, Jordi Cortadella, Alex Kondratyev, Oriol Roig
1998	J	`jnl`	The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems. J. Circuits Syst. Comput. Alex Kondratyev, Michael Kishinevsky, Alexander Taubin, Jordi Cortadella, Luciano Lavagno
1998	J	`jnl`	Working-zone encoding for reducing the energy in microprocessor address buses. IEEE Trans. Very Large Scale Integr. Syst. Enric Musoll, Tomás Lang, Jordi Cortadella
1997	J	`jnl`	A region-based theory for state assignment in speed-independent circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
1997	A*	`conf`	Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits. DAC Oriol Roig, Jordi Cortadella, Marco A. Peña, Enric Pastor
1997	—	`conf`	Coupling Asynchrony and Interrupts: Place Chart Nets. ICATPN Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev
1997	A	`conf`	Decomposition and technology mapping of speed-independent circuits using Boolean relations. ICCAD Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev
1997	A	`conf`	Exploiting the locality of memory references to reduce the address bus energy. ISLPED Enric Musoll, Tomás Lang, Jordi Cortadella
1997	—	`conf`	Partial order based approach to synthesis of speed-independent circuits. ASYNC Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella, Luciano Lavagno
1997	A*	`conf`	Synthesis of Speed-Independent Circuits from STG-Unfolding Segment. DAC Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella
1997	—	`conf`	Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis. ASYNC Alex Kondratyev, Michael Kishinevsky, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev
1997	—	`conf`	Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis. ED&TC Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
1996	—	`conf`	Combining process algebras and Petri nets for the specification and synthesis of asynchronous circuits. ASYNC Marco A. Peña, Jordi Cortadella
1996	—	`conf`	Complete state encoding based on the theory of regions. ASYNC Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alex Yakovlev
1996	A*	`conf`	Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis. DAC Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
1996	—	`conf`	Optimizing CMOS Circuits for Low Power Using Transistor Reordering. ED&TC Enric Musoll, Jordi Cortadella
1996	—	`conf`	RESIS: A New Methodology for Register Optimization in Software Pipelining. Euro-Par, Vol. II Fermín Sánchez, Jordi Cortadella
1996	—	`conf`	Structural Methods for the Synthesis of Speed-Independent Circuits. ED&TC Enric Pastor, Oriol Roig, Jordi Cortadella, Alex Kondratyev
1995	—	`conf`	A new look at the conditions for the synthesis of speed-independent circuits. Great Lakes Symposium on VLSI Enric Pastor, Jordi Cortadella, Oriol Roig
1995	—	`conf`	Checking signal transition graph implementability by symbolic BDD traversal. ED&TC Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Enric Pastor, Oriol Roig, Alexandre Yakovlev
1995	—	`conf`	Hierarchical gate-level verification of speed-independent circuits. ASYNC Oriol Roig, Jordi Cortadella, Enric Pastor
1995	—	`conf`	High-level synthesis techniques for reducing the activity of functional units. ISLPD Enric Musoll, Jordi Cortadella
1995	—	`conf`	Scheduling and resource binding for low power. ISSS Enric Musoll, Jordi Cortadella
1995	A	`conf`	Synthesizing Petri nets from state-based models. ICCAD Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev
1995	—	`conf`	Verification of Asynchronous Circuits by BDD-based Model Checking of Petri Nets. Application and Theory of Petri Nets Oriol Roig, Jordi Cortadella, Enric Pastor
1994	—	`conf`	Design and Prototyping of Digital Signal Processing (DSP) Systems: Introduction. HICSS (1) Jordi Cortadella, José A. B. Fortes, Edward A. Lee
1994	—	`conf`	Designing asynchronous circuits from behavioural specifications with internal conflicts. ASYNC Jordi Cortadella, Luciano Lavagno, Peter Vanbekbergen, Alex Yakovlev
1994	J	`jnl`	High-Radix Division and Square-Root with Speculation. IEEE Trans. Computers Jordi Cortadella, Tomás Lang
1994	—	`conf`	Petri Net Analysis Using Boolean Manipulation. Application and Theory of Petri Nets Enric Pastor, Oriol Roig, Jordi Cortadella, Rosa M. Badia
1993	C	`conf`	An Efficient Unique State Coding Algorithm for Signal Transition Graphs. ICCD Enric Pastor, Jordi Cortadella
1993	J	`jnl`	Chairmen's introduction. Microprocess. Microprogramming Mateo Valero, Jordi Cortadella, Antonio González
1993	C	`conf`	Division with speculation of quotient digits. IEEE Symposium on Computer Arithmetic Jordi Cortadella, Tomás Lang
1993	J	`jnl`	Glass: a graph-theoretical approach for global binding. Microprocess. Microprogramming Rosa M. Badia, Jordi Cortadella
1993	A	`conf`	Polynomial algorithms for the synthesis for hazard-free circuits from signal transition graphs. ICCAD Enric Pastor, Jordi Cortadella
1993	J	`jnl`	Resource-constrained pipelining based on loop transformations. Microprocess. Microprogramming Fermín Sánchez, Jordi Cortadella
1993	J	`jnl`	Session B2: Processor Architecture II. Microprocess. Microprogramming Jordi Cortadella
1992	J	`jnl`	Comments on 'Using cache mechanisms to exploit nonrefreshing DRAM's for on-chip memories'. IEEE J. Solid State Circuits Jordi Cortadella, Teodor Jové
1992	J	`jnl`	Evaluation of A + B = K Conditions Without Carry Propagation. IEEE Trans. Computers Jordi Cortadella, José M. Llabería
1991	J	`jnl`	Scheduling in a continuous area-time design space. Microprocessing and Microprogramming Jordi Cortadella, Rosa M. Badia, Eduard Ayguadé
1989	J	`jnl`	Reduced instruction buffer for RISC architectures. Microprocessing and Microprogramming Teodor Jové, Jordi Cortadella
1988	J	`jnl`	A mechanism for reducing the cost of branches in RISC architectures. Microprocess. Microprogramming Antonio González, José María Llabería, Jordi Cortadella
1988	J	`jnl`	Designing a branch target buffer for executing branches with zero time cost in a RISC processor. Microprocess. Microprogramming Jordi Cortadella, Teodor Jové
1988	J	`jnl`	Dynamic RAM for on-chip instruction caches. SIGARCH Comput. Archit. News Jordi Cortadella, Teodor Jové