Joon-Sung Yang

96 papers A* 16A 13C 5Misc 5Journal 44Unranked 13

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Variation Resilient Schemes and Approximation-Free Offset Compensation for Reliable ReRAM-Based DNN Accelerators. IEEE Trans. Emerg. Top. Comput. Je-Woo Jang, Junyong Oh, Sung-Hyuk Cho, Jae-Youn Hong, Muhammad Imran, Jaeyong Chung, Joon-Sung Yang
2025	J	`jnl`	AGD: Analytic Gradient Descent for Discrete Optimization in EDA and its Use to Gate Sizing. ACM Trans. Design Autom. Electr. Syst. Phuoc Pham, Tae-Min Park, Sung-Hyuk Cho, Tayyeb Mahmood, Joon-Sung Yang, Jaeyong Chung
2025	A*	`conf`	Accelerating Retrieval Augmented Language Model via PIM and PNM Integration. MICRO Je-Woo Jang, Junyong Oh, Youngbae Kong, Jae-Youn Hong, Sung-Hyuk Cho, Jeongyeol Lee, Hoeseok Yang, Joon-Sung Yang
2025	A*	`conf`	Bit-slice Architecture for DNN Acceleration with Slice-level Sparsity Enhancement and Exploitation. HPCA Insu Choi, Young-Seo Yoon, Joon-Sung Yang
2025	A*	`conf`	DBC: Drift-aware Binary Code for Drift-tolerant Deep Neural Networks. DAC Insu Choi, Jaeyong Chung, Joon-Sung Yang
2025	J	`jnl`	Reducing Errors and Powers in LPDDR for DNN Inference: A Compression and IECC-Based Approach. J. Syst. Archit. Jae-Youn Hong, Je-Woo Jang, Sung-Hyuk Cho, Youngbae Kong, Sungkyu Kim, Youngjung Kang, Jaehyung Ko, Jaeyong Chung, Joon-Sung Yang
2025	A	`conf`	Self-Error Detection and Correction Techniques for Reliable and Efficient Selector-Only Memory. ICCAD Hyunjun Lee, Joon-Sung Yang
2025	J	`jnl`	Survey and Evaluation of Converging Architecture in LLMs Based on Footsteps of Operations. IEEE Open J. Comput. Soc. Seongho Kim, Jihyun Moon, Juntaek Oh, Insu Choi, Joon-Sung Yang
2024	J	`jnl`	HYDRA: A Hybrid Resistance Drift Resilient Architecture for Phase Change Memory-Based Neural Network Accelerators. IEEE Trans. Computers Thai-Hoang Nguyen, Muhammad Imran, Jaehyuk Choi, Joon-Sung Yang
2024	A	`conf`	LOCo: LPDDR Optimization with Compression and IECC scheme for DNN Inference. ISLPED Jae-Youn Hong, Sungkyu Kim, Je-Woo Jang, Joon-Sung Yang
2024	J	`jnl`	Survey and Evaluation of Converging Architecture in LLMs based on Footsteps of Operations. CoRR Seongho Kim, Jihyun Moon, Juntaek Oh, Insu Choi, Joon-Sung Yang
2024	A*	`conf`	ViT-slice: End-to-end Vision Transformer Accelerator with Bit-slice Algorithm. DAC Dongjin Shin, Insu Choi, Joon-Sung Yang
2023	J	`jnl`	A convertible neural processor supporting adaptive quantization for real-time neural networks. J. Syst. Archit. Hongju Kal, Hyoseong Choi, Ipoom Jeong, Joon-Sung Yang, Won Woo Ro
2023	—	`conf`	Boosting Semi-Supervised Learning by bridging high and low-confidence predictions. ICCV (Workshops) Khanh-Binh Nguyen, Joon-Sung Yang
2023	J	`jnl`	Boosting Semi-Supervised Learning by bridging high and low-confidence predictions. CoRR Khanh-Binh Nguyen, Joon-Sung Yang
2023	J	`jnl`	CRAFT: Criticality-Aware Fault-Tolerance Enhancement Techniques for Emerging Memories-Based Deep Neural Networks. CoRR Thai-Hoang Nguyen, Muhammad Imran, Jaehyuk Choi, Joon-Sung Yang
2023	J	`jnl`	CRAFT: Criticality-Aware Fault-Tolerance Enhancement Techniques for Emerging Memories-Based Deep Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Thai-Hoang Nguyen, Muhammad Imran, Jaehyuk Choi, Joon-Sung Yang
2023	J	`jnl`	EUNNet: Efficient UN-Normalized Convolution Layer for Stable Training of Deep Residual Networks Without Batch Normalization Layer. IEEE Access Khanh-Binh Nguyen, Jaehyuk Choi, Joon-Sung Yang
2023	A*	`conf`	PIE-DRAM: Postponing IECC to Enhance DRAM performance with access table. DAC JaeHwa Jeon, Jae-Youn Hong, Sunghoon Kim, Insu Choi, Joon-Sung Yang
2023	A*	`conf`	RQ-DNN: Reliable Quantization for Fault-tolerant Deep Neural Networks. DAC Insu Choi, Jae-Youn Hong, JaeHwa Jeon, Joon-Sung Yang
2023	J	`jnl`	VECOM: Variation Resilient Encoding and Offset Compensation Schemes for Reliable ReRAM Based DNN Accelerator. CoRR Je-Woo Jang, Thai-Hoang Nguyen, Joon-Sung Yang
2023	A	`conf`	VECOM: Variation-Resilient Encoding and Offset Compensation Schemes for Reliable ReRAM-Based DNN Accelerator. ICCAD Je-Woo Jang, Thai-Hoang Nguyen, Joon-Sung Yang
2023	—	`conf`	VSCHH 2023: A Benchmark for the View Synthesis Challenge of Human Heads. ICCV (Workshops) Youngkyoon Jang, Jiali Zheng, Jifei Song, Helisa Dhamo, Eduardo Pérez-Pellitero, Thomas Tanay, Matteo Maggioni, Richard Shaw, Sibi Catley-Chandar, Yiren Zhou, Jiankang Deng, Ruijie Zhu, Jiahao Chang, Ziyang Song, Jiahuan Yu, Tianzhu Zhang, Khanh-Binh Nguyen, Joon-Sung Yang, Andreea Dogaru, Bernhard Egger, Heng Yu, Aarush Gupta, Joel Julin, László A. Jeni, Hyeseong Kim, Jungbin Cho, Dosik Hwang, Deukhee Lee, Doyeon Kim, Dongseong Seo, SeungJin Jeon, Youngdon Choi, Jun Seok Kang, Ahmet Cagatay Seker, Sang Chul Ahn, Ales Leonardis, Stefanos Zafeiriou
2022	J	`jnl`	ADAPT: A Write Disturbance-Aware Programming Technique for Scaled Phase Change Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Muhammad Imran, Taehyun Kwon, Joon-Sung Yang
2022	A*	`conf`	Bipolar vector classifier for fault-tolerant deep neural networks. DAC Suyong Lee, Insu Choi, Joon-Sung Yang
2022	J	`jnl`	CEnT: An Efficient Architecture to Eliminate Intra-Array Write Disturbance in PCM. IEEE Trans. Computers Muhammad Imran, Taehyun Kwon, Nur A. Touba, Joon-Sung Yang
2022	J	`jnl`	Checkerboard Dropout: A Structured Dropout With Checkerboard Pattern for Convolutional Neural Networks. IEEE Access Khanh-Binh Nguyen, Jaehyuk Choi, Joon-Sung Yang
2022	A	`conf`	DynaPAT: A Dynamic Pattern-Aware Encoding Technique for Robust MLC PCM-Based Deep Neural Networks. ICCAD Thai-Hoang Nguyen, Muhammad Imran, Joon-Sung Yang
2022	A	`conf`	Value-aware Parity Insertion ECC for Fault-tolerant Deep Neural Network. DATE Seo-Seok Lee, Joon-Sung Yang
2021	A*	`conf`	Low-Cost and Effective Fault-Tolerance Enhancement Techniques for Emerging Memories-Based Deep Neural Networks. DAC Thai-Hoang Nguyen, Muhammad Imran, Jaehyuk Choi, Joon-Sung Yang
2021	J	`jnl`	Reliability Enhanced Heterogeneous Phase Change Memory Architecture for Performance and Energy Efficiency. IEEE Trans. Computers Taehyun Kwon, Muhammad Imran, Joon-Sung Yang
2020	J	`jnl`	Cost-Effective Reliable MLC PCM Architecture Using Virtual Data Based Error Correction. IEEE Access Taehyun Kwon, Muhammad Imran, Joon-Sung Yang
2020	J	`jnl`	ER-TCAM: A Soft-Error-Resilient SRAM-Based Ternary Content-Addressable Memory for FPGAs. IEEE Trans. Very Large Scale Integr. Syst. Inayat Ullah, Joon-Sung Yang, Jaeyong Chung
2020	A	`conf`	Effective Write Disturbance Mitigation Encoding Scheme for High-density PCM. DATE Muhammad Imran, Taehyun Kwon, Joon-Sung Yang
2020	A*	`conf`	Factored Radix-8 Systolic Array for Tensor Processing. DAC Inayat Ullah, Kashif Inayat, Joon-Sung Yang, Jaeyong Chung
2020	A*	`conf`	PAIR: Pin-aligned In-DRAM ECC architecture using expandability of Reed-Solomon code. DAC Sangmok Jeong, SeungYup Kang, Joon-Sung Yang
2020	J	`jnl`	Pattern-Aware Encoding for MLC PCM Storage Density, Energy Efficiency, and Performance Enhancement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Taehyun Kwon, Muhammad Imran, Joon-Sung Yang
2020	A	`conf`	Reliable and Lightweight PUF-based Key Generation using Various Index Voting Architecture. DATE Jeong-Hyeon Kim, Ho-Jun Jo, Kyung-Kuk Jo, Sung-Hee Cho, Jaeyong Chung, Joon-Sung Yang
2020	J	`jnl`	Virtual-Tile-Based Flip-Flop Alignment Methodology for Clock Network Power Optimization. IEEE Trans. Very Large Scale Integr. Syst. Taehyun Kwon, Muhammad Imran, David Z. Pan, Joon-Sung Yang
2020	J	`jnl`	Virtualization-Based Efficient TSV Repair for 3-D Integrated Circuits. IEEE Access Muhammad Imran, Hyunseung Han, Jooho Kim, Taehyun Kwon, Jaeyong Chung, Joon-Sung Yang
2019	—	`conf`	Computation Offloading of Acoustic Model for Client-Edge-Based Speech-Recognition. CASES (work in progress) Young-Min Lee, Joon-Sung Yang
2019	A*	`conf`	DRIS-3: Deep Neural Network Reliability Improvement Scheme in 3D Die-Stacked Memory based on Fault Analysis. DAC Jae-San Kim, Joon-Sung Yang
2019	A	`conf`	Flipcy: Efficient Pattern Redistribution for Enhancing MLC PCM Reliability and Storage Density. ICCAD Muhammad Imran, Taehyun Kwon, Jung Min You, Joon-Sung Yang
2019	A*	`conf`	MRLoc: Mitigating Row-hammering based on memory Locality. DAC Jung Min You, Joon-Sung Yang
2019	J	`jnl`	Simplifying Deep Neural Networks for FPGA-Like Neuromorphic Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jaeyong Chung, Taehwan Shin, Joon-Sung Yang
2019	J	`jnl`	Weight Partitioning for Dynamic Fixed-Point Neuromorphic Computing Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yongshin Kang, Joon-Sung Yang, Jaeyong Chung
2018	A	`conf`	Bayesian theory based switching probability calculation method of critical timing path for on-chip timing slack monitoring. DATE Byung-Su Kim, Joon-Sung Yang
2018	J	`jnl`	Clock Network Optimization With Multibit Flip-Flop Generation Considering Multicorner Multimode Timing Constraint. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Taehee Lee, David Z. Pan, Joon-Sung Yang
2018	A	`conf`	Heterogeneous PCM array architecture for reliability, performance and lifetime enhancement. DATE Taehyun Kwon, Muhammad Imran, Jung Min You, Joon-Sung Yang
2018	J	`jnl`	Mitigating Observability Loss of Toggle-Based X-Masking via Scan Chain Partitioning. IEEE Trans. Computers Sae-Eun Kim, Jaeyong Chung, Joon-Sung Yang
2018	J	`jnl`	New library development method by FSM based cell pattern extraction. IEICE Electron. Express Byung-Su Kim, Tae Hee Han, Joon-Sung Yang, Jaeyong Chung
2018	A*	`conf`	Optimized I/O determinism for emerging NVM-based NVMe SSD in an enterprise system. DAC Seonbong Kim, Joon-Sung Yang
2018	J	`jnl`	READ: Reliability Enhancement in 3D-Memory Exploiting Asymmetric SER Distribution. IEEE Trans. Computers Hyunseung Han, Jaeyong Chung, Joon-Sung Yang
2018	—	`conf`	System level performance analysis and optimization for the adaptive clocking based multi-core processor. ASP-DAC Byung-Su Kim, Joon-Sung Yang
2018	A*	`conf`	Test cost reduction for DAC Hyunsu Chae, Joon-Sung Yang
2017	J	`jnl`	BIRA With Optimal Repair Rate Using Fault-Free Memory Region for Area Reduction. IEEE Trans. Circuits Syst. I Regul. Pap. Chang-Hyun Oh, Sae-Eun Kim, Joon-Sung Yang
2017	J	`jnl`	Enhancing Test Compression With Dependency Analysis for Multiple Expansion Ratios. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Taehee Lee, Nur A. Touba, Joon-Sung Yang
2017	J	`jnl`	Exploiting Unused Spare Columns and Replaced Columns to Enhance Memory ECC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hyunseung Han, Nur A. Touba, Joon-Sung Yang
2017	Misc	`conf`	Improving NVMe SSD I/O determinism with PCIe virtual channel: work-in-progress. CASES Seonbong Kim, Joon-Sung Yang
2017	A	`conf`	MVP ECC : Manufacturing process variation aware unequal protection ECC for memory reliability. DATE Seung-Yeob Lee, Joon-Sung Yang
2017	C	`conf`	Non-linear library characterization method for FinFET logic cells by L1-minimization. ISCAS Byung-Su Kim, Hyo-Sig Won, Tae Hee Han, Joon-Sung Yang
2017	A*	`conf`	PUFSec: Device fingerprint-based security architecture for Internet of Things. INFOCOM So-Yeon Park, Sunil Lim, Dahee Jeong, Jungjin Lee, Joon-Sung Yang, HyungJune Lee
2017	J	`jnl`	Physical-aware gating element insertion for thermal-safe scan shift operation. IEICE Electron. Express Taehee Lee, Joon-Sung Yang
2016	—	`conf`	A BIRA using fault-free memory region for area reduction. APCCAS Chang-Hyun Oh, Sae-Eun Kim, Joon-Sung Yang
2016	C	`conf`	AFSEM: Advanced frequent subcircuit extraction method by graph mining approach for optimized cell library developments. ISCAS Byung-Su Kim, Hyo-Sig Won, Tae Hee Han, Joon-Sung Yang
2016	J	`jnl`	Enhancing Superset X-Canceling Method With Relaxed Constraints on Fault Observation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Joon-Sung Yang, Jinsuk Chung, Nur A. Touba
2016	—	`conf`	Memory ECC architecutre utilizing memory column spares. ISOCC Jong Hyuk Park, Joon-Sung Yang
2016	C	`conf`	Multi-bit flip-flop generation considering multi-corner multi-mode timing constraint. ISCAS Taehee Lee, JongWon Yi, Joon-Sung Yang
2016	A*	`conf`	Reducing control bit overhead for X-masking/X-canceling hybrid architecture via pattern partitioning. DAC Jin-Hyun Kang, Nur A. Touba, Joon-Sung Yang
2016	J	`jnl`	Subthreshold 8T SRAM sizing utilizing short-channel V IEICE Electron. Express Ik Joon Chang, Joon-Sung Yang
2016	—	`conf`	System-level failure simulation and memory allocation scheme in 3D memory. APCCAS Jung-Jin Lee, Joon-Sung Yang
2016	J	`jnl`	Temperature and voltage droop-aware test scheduling during scan shift operation. IEICE Electron. Express Taehee Lee, YongJoon Kim, Joon-Sung Yang
2016	—	`conf`	eFuse based IC authentication architecture. ISOCC Seung-Yeob Lee, Joon-Sung Yang
2015	—	`conf`	Asymmetric ECC organization in 3D-memory via spare column utilization. DFTS Hyunseung Han, Joon-Sung Yang
2015	C	`conf`	Devil in a box: Installing backdoors in electronic door locks. PST Seongyeol Oh, Joon-Sung Yang, Andrea Bianchi, Hyoungshick Kim
2015	C	`conf`	Robust via-programmable ROM design based on 45nm process considering process variation and enhancement Vmin and yield. ISCAS Byung-Jun Jang, Chan-Ho Lee, Sung-Hun Sim, Kyu-won Choi, Do-Hun Byun, Yeon-Ho Jung, Ki-Man Park, Dong-Yeon Heo, Gyu-Hong Kim, Joon-Sung Yang
2014	J	`jnl`	3-D Probe: Low-Cost Variation Modeling Using Intertest-Item Correlations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jaeyong Chung, Yonghyun Kim, Joon-Sung Yang
2014	J	`jnl`	Communication-aware custom topology generation for VFI network-on-chip. IEICE Electron. Express Chang Lin Li, Jae Hoon Lee, Joon-Sung Yang, Tae Hee Han
2014	J	`jnl`	Low-power shared memory architecture power mode for mobile system-on-chip. IEICE Electron. Express Junghwa Kim, Jun-Ho Huh, Soo-Yong Kim, Suk Won Kim, Joon-Sung Yang
2014	J	`jnl`	Utilizing ATE Vector Repeat With Linear Decompressor for Test Vector Compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Joon-Sung Yang, Jinkyu Lee, Nur A. Touba
2013	Misc	`conf`	Dynamic Trace Signal Selection for Post-Silicon Validation. VLSI Design Kihyuk Han, Joon-Sung Yang, Jacob A. Abraham
2013	Misc	`conf`	Enhanced algorithm of combining trace and scan signals in post-silicon validation. VTS Kihyuk Han, Joon-Sung Yang, Jacob A. Abraham
2013	J	`jnl`	Improved Trace Buffer Observation via Selective Data Capture Using 2-D Compaction for Post-Silicon Debug. IEEE Trans. Very Large Scale Integr. Syst. Joon-Sung Yang, Nur A. Touba
2013	J	`jnl`	Robust Buffered Clock Tree Synthesis by Sensitivity Based Link Insertion. IEICE Trans. Electron. Joon-Sung Yang, Ik Joon Chang
2012	J	`jnl`	Bit-error rate improvement of TLC NAND Flash using state re-ordering. IEICE Electron. Express Ik Joon Chang, Joon-Sung Yang
2012	J	`jnl`	Efficient Trace Signal Selection for Silicon Debug by Error Transmission Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Joon-Sung Yang, Nur A. Touba
2012	J	`jnl`	Test Point Insertion with Control Points Driven by Existing Functional Flip-Flops. IEEE Trans. Computers Joon-Sung Yang, Nur A. Touba, Benoit Nadeau-Dostie
2012	J	`jnl`	X-Canceling MISR Architectures for Output Response Compaction With Unknown Values. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Joon-Sung Yang, Nur A. Touba
2011	—	`conf`	Efficient Function Mapping in Nanoscale Crossbar Architecture. DFT Joon-Sung Yang, Rudrajit Datta
2009	A	`conf`	An industrial case study for X-canceling MISR. ITC Joon-Sung Yang, Nur A. Touba, Shih-Yu Yang, T. M. Mak
2009	Misc	`conf`	Automated Selection of Signals to Observe for Efficient Silicon Debug. VTS Joon-Sung Yang, Nur A. Touba
2009	—	`conf`	Reducing Test Point Area for BIST through Greater Use of Functional Flip-Flops to Drive Control Points. DFT Joon-Sung Yang, Benoit Nadeau-Dostie, Nur A. Touba
2009	A	`conf`	Test point insertion using functional flip-flops to drive control points. ITC Joon-Sung Yang, Benoit Nadeau-Dostie, Nur A. Touba
2008	—	`conf`	Enhancing Silicon Debug via Periodic Monitoring. DFT Joon-Sung Yang, Nur A. Touba
2008	Misc	`conf`	Expanding Trace Buffer Observation Window for In-System Silicon Debug through Selective Capture. VTS Joon-Sung Yang, Nur A. Touba
2007	—	`conf`	Sensitivity Based Link Insertion for Variation Tolerant Clock Network Synthesis. ISQED Joon-Sung Yang, Anand Rajaram, Ninghy Shi, Jian Chen, David Z. Pan