Joo-Mi Cho

14 papers Journal 3Unranked 11
YearRankTypeTitle / Venue / Authors
2026 — conf
A 94.8%-Peak-Efficiency Double Step-Up SIBO Converter Achieving 88% Output Ripple Reduction for AMOLED Display.
ISSCC
Hyeon-Ji Choi, Joo-Mi Cho, Sang-Yun Nam, Sung-Wan Hong
2026 — conf
A Hybrid Bipolar-Output Isolated Converter with +15V/-5V Outputs for SiC Gate Drivers.
ISSCC
Joo-Mi Cho, Jeong-Hun Kim, Yong-Chan Lee, Sung-Wan Hong
2025 J jnl
A 0-to- 10μF Off-Chip Output Capacitor-Scalable Boost Converter Achieving 96.68% Peak Efficiency.
IEEE Solid State Circuits Lett.
Hyeon-Ji Choi, Joo-Mi Cho, Hyo-Jin Park, Seok-Jun Lee, Sung-Wan Hong
2024 — conf
8.8 A 97.18% Peak-Efficiency Asymmetrically Implemented Dual-phase (AID) Converter with a full Voltage-Conversion Ratio (VCR) between 0-and-1.
ISSCC
Hyo-Jin Park, Joo-Mi Cho, Chan-Ho Lee, Young-Ju Oh, Hyunwoo Jeong, Jun-Hyeok Yang, Jaeseung Lee, Sung-Wan Hong
2024 J jnl
A Simultaneous Energy Transferring SIBO Converter Achieving Low Ripple and High Efficiency for AMOLED Applications.
IEEE J. Solid State Circuits
Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Chan-Ho Lee, Young-Jun Jeon, Jeeyoung Shin, Woong Choi, Junwon Jeong, Sung-Wan Hong
2023 — conf
96.48% Peak-Efficiency Continuous-Current Step-Up Battery Charger (CC-SUBC) with Dual Energy-Harvesting Sources for Automotive Application.
VLSI Technology and Circuits
Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Chan-Ho Lee, Sung-Wan Hong
2023 — conf
A 1V 20.7μW Four-Stage Amplifier Capable of Driving a 4-to-12nF Capacitive Load with >1.07MHz GBW with an Improved Active Zero.
VLSI Technology and Circuits
Chan-Ho Lee, Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Young-Jun Jeon, Sung-Wan Hong
2023 — conf
A 2 A Maximum Load Current Capable 0-to-1 μF Off-chip Capacitor N-type LDO using Dual Dynamic Negative Feedback Loop and an Improved Error Amplifier.
ESSCIRC
Ho-Chan Ahn, Joo-Mi Cho, Hyeon-Ji Choi, Chan-Ho Lee, Chan-Kyu Lee, Sung-Wan Hong
2023 J jnl
An Ultra-Low Power Soft-Switching Self-Oscillating SIMO Converter for Implantable Stimulation Systems.
IEEE Trans. Ind. Electron.
Hyeon-Ji Choi, ChiSung Bae, Yeunhee Huh, Sang Joon Kim, Seungchul Jung, Kye-Seok Yoon, Joo-Mi Cho, Hyo-Jin Park, Chan-Ho Lee, Su-Min Park, Esun Baik, Young-Ju Oh, Ho-Chan Ahn, Chan-Kyu Lee, Sung-Wan Hong
2022 — conf
A High Slew-rate Wide-range Capacitive Load Driving Buffer Amplifier with Correlated Dual Positive Feedback Loops.
ISOCC
Young-Ju Oh, Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Su-Min Park, Chan-Ho Lee, Esun Baik, Chan-Kyu Lee, Ho-Chan Ahn, Sung-Wan Hong
2021 — conf
A 0.93-μW Single-Stage Rail-to-Rail Class AB Buffer Amplifier Improving DC gain and Slew-Rate with Different-Ratio Current-Mirrors and Positive-Feedback Loops.
VLSI Circuits
Joo-Mi Cho, Hyo-Jin Park, Sung-Wan Hong
2021 — conf
A 100-MHz 81.2% All-Paths Inductor-Connected Buck-Converter with Balanced Conduction-Losses and Continuous Path-Currents.
ESSCIRC
Joo-Mi Cho, Hyo-Jin Park, Hyunji Choi, Esun Baik, Jeeyoung Shin, Sung-Wan Hong
2021 — conf
A 18 µA Rail-to-Rail Class-AB Operational Amplifier with a High-Slew Miller Compensation (HSMC) Technique with 240% Settling Time Reduction in 0.18 µm.
ESSCIRC
Hyo-Jin Park, Joo-Mi Cho, Hyunji Choi, Esun Baik, Jeeyoung Shin, Sung-Wan Hong
2021 — conf
An Output Capacitor-less Low-dropout Regulator using a Wide-range Single-stage Gain-boosted Error Amplifier and a Frequency-dependent Buffer with a Total Compensation Capacitance of 2.5 pF in 0.5 µm CMOS.
A-SSCC
Hyeon-Ji Choi, Joo-Mi Cho, Hyo-Jin Park, Sung-Wan Hong