Jonghoon Jung - RankMe

11 papers Journal 3Unranked 8

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	15.3 An 8nm eMRAM for Auto-G1 with a 125MHz Read Speed at 0.6V and 19.94Mb/mm ISSCC Hyunjin Shin, Gyuseong Kang, Yeseul Kim, Dohui Kim, Kyuseong Kim, Sunkyu Lee, Hangil Lee, Sanggyeong Won, Mijoung Kim, Jaeho Lee, Seungpil Ko, Jaechul Shim, Shinhee Han, Kiseok Suh, Sohee Hwang, HyunChang Lee, Jonghoon Jung, Sanghoon Baek
2022	—	`conf`	3nm Gate-All-Around (GAA) Design-Technology Co-Optimization (DTCO) for succeeding PPA by Technology. CICC Taejoong Song, Hakchul Jung, Giyoung Yang, Hoyoung Tang, Hayoung Kim, Dongwook Seo, Hoonki Kim, Woojin Rim, Sanghoon Baek, Sangyeop Baeck, Jonghoon Jung
2022	J	`jnl`	A 3-nm Gate-All-Around SRAM Featuring an Adaptive Dual-Bitline and an Adaptive Cell-Power Assist Circuit. IEEE J. Solid State Circuits Taejoong Song, Hoonki Kim, Woojin Rim, Hakchul Jung, Changnam Park, Inhak Lee, Sanghoon Baek, Jonghoon Jung
2022	—	`conf`	Standard Cell Design Optimization with Advanced MOL Technology in 3nm GAA Process. VLSI Technology and Circuits Giyoung Yang, Hakchul Jung, Jinyoung Lim, Jaewoo Seo, Ingyum Kim, Jisu Yu, Hyeoungyu You, Jeongsoon Kong, Garoom Kim, Minjae Jeong, Chanhee Park, Sera An, Woojin Rim, Hayoung Kim, Dalhee Lee, Sanghoon Baek, Jonghoon Jung, Taejoong Song, Jongwook Kye
2021	—	`conf`	24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit. ISSCC Taejoong Song, Woojin Rim, Hoonki Kim, Keun Hwi Cho, Taeyeong Kim, Taejung Lee, Geumjong Bae, Dong-Won Kim, S. D. Kwon, Sanghoon Baek, Jonghoon Jung, Jongwook Kye, Hakchul Jung, HyungTae Kim, Soon-Moon Jung, Jaehong Park
2018	—	`conf`	A 7nm FinFET SRAM using EUV lithography with dual write-driver-assist circuitry for low-voltage applications. ISSCC Taejoong Song, Jonghoon Jung, Woojin Rim, Hoonki Kim, Yongho Kim, Changnam Park, Jeongho Do, Sunghyun Park, Sungwee Cho, Hyuntaek Jung, Bongjae Kwon, Hyun-Su Choi, Jaeseung Choi, Jong Shik Yoon
2017	—	`conf`	12.2 A 7nm FinFET SRAM macro using EUV lithography for peripheral repair analysis. ISSCC Taejoong Song, Hoonki Kim, Woojin Rim, Yongho Kim, Sunghyun Park, Changnam Park, Minsun Hong, Giyong Yang, Jeongho Do, Jinyoung Lim, Seungyoung Lee, Ingyum Kim, Sanghoon Baek, Jonghoon Jung, Daewon Ha, Hyungsoon Jang, Taejung Lee, Chul-Hong Park, Bongjae Kwon, Hyuntaek Jung, Sungwee Cho, Yongjae Choo, Jaeseung Choi
2017	J	`jnl`	A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization. IEEE J. Solid State Circuits Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim, Giyong Yang, Hoonki Kim, Sanghoon Baek, Jonghoon Jung, Bongjae Kwon, Sungwee Cho, Hyuntaek Jung, Yongjae Choo, Jaeseung Choi
2016	—	`conf`	17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization. ISSCC Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim, Jonghoon Jung, Giyong Yang, Sanghoon Baek, Jaeseung Choi, Bongjae Kwon, Yunwoo Lee, Sungbong Kim, Gyu-Hong Kim, Hyo-Sig Won, Ja-Hum Ku, Sunhom Steve Paak, E. S. Jung, Steve Sungho Park, Kinam Kim
2015	J	`jnl`	A 14 nm FinFET 128 Mb SRAM With V IEEE J. Solid State Circuits Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang, JaeHo Park, Sunghyun Park, Yongho Kim, Kang-Hyun Baek, Sanghoon Baek, Sang-Kyu Oh, Jinsuk Jung, Sungbong Kim, Gyu-Hong Kim, Jintae Kim, Young-Keun Lee, Sang-Pil Sim, Jong Shik Yoon, Kyu-Myung Choi, Hyo-Sig Won, Jaehong Park
2014	—	`conf`	13.2 A 14nm FinFET 128Mb 6T SRAM with VMIN-enhancement techniques for low-power applications. ISSCC Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang, JaeHo Park, Sunghyun Park, Kang-Hyun Baek, Sanghoon Baek, Sang-Kyu Oh, Jinsuk Jung, Sungbong Kim, Gyu-Hong Kim, Jintae Kim, Young-Keun Lee, Kee Sup Kim, Sang-Pil Sim, Jong Shik Yoon, Kyu-Myung Choi