Jonathan Saul

11 papers B 2C 5Misc 1Journal 1Unranked 2
YearRankTypeTitle / Venue / Authors
2001 J jnl
A High Speed Reconfigurable Firewall Based On Parameterizable FPGA-based Content Addressable Memories.
J. Supercomput.
Alistair A. McEwan, Jonathan Saul
1999 Misc conf
A High Speed Reconfigurable Firewall Based on Parameterization FPGA-Based Content Addressable Memories.
PDPTA
Alistair McEwan, Jonathan Saul, Andrew Bailey
1999 — conf
Hardware/Software Codesign for FPGA-based Systems.
HICSS
Jonathan Saul
1998 C conf
Re-synthesis in technology mapping for heterogeneous FPGAs.
ICCD
Maurice Kilavuka Inuani, Jonathan Saul
1997 B conf
Technology mapping of heterogeneous LUT-based FPGAs.
FPL
Maurice Kilavuka Inuani, Jonathan Saul
1996 B conf
Logic Synthesis for FPGAs Using A Mixed Exclusive-/Inclusive-OR Form.
FPL
Nigel Lester, Jonathan Saul
1995 C conf
An enhanced algorithm for the minimization of exclusive-OR sum-of-products for incompletely specified functions.
ICCD
Tomasz Kozlowski, Erik L. Dagless, Jonathan Saul
1994 — conf
An efficient verification algorithm for parallel controllers.
EURO-DAC
Krzysztof Bilinski, Erik L. Dagless, Jonathan Saul, Janusz Szajna
1994 C conf
Architecture Oriented Logic Optimization for Lookup Table Based FPGAs.
ICCD
Aiguo Lu, Jonathan Saul, Erik L. Dagless
1992 C conf
State Assignment Algorithms for Parallel Controller Synthesis.
ICCD
James Pardey, Tomasz Kozlowski, Jonathan Saul, Martin Bolton
1991 C conf
An Algorithm for the Multi-Level Minimazation of Reed-Muller Rpresentations.
ICCD
Jonathan Saul