Jonathan Chang

78 papers A* 4A 6B 1C 1Misc 1Journal 22Unranked 42

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A State-of-the-Art SQL Reasoning Model using RLVR. CoRR Alnur Ali, Ashutosh Baheti, Jonathan Chang, Ta-Chung Chi, Brandon Cui, Andrew Drozdov, Jonathan Frankle, Abhay Gupta, Pallavi Koppol, Sean Kulinski, Jonathan Li, Dipendra Misra, Krista Opsahl-Ong, Jose Javier Gonzalez Ortiz, Matei Zaharia, Yue Zhang
2025	J	`jnl`	Application of an attention-based CNN-BiLSTM framework for in vivo two-photon calcium imaging of neuronal ensembles: decoding complex bilateral forelimb movements from unilateral M1. CoRR Ghazal Mirzaee, Jonathan Chang, Shahrzad Latifi
2025	—	`conf`	Estimation of Product Lifetime with Highly Varying Die Temperature. IRPS Jae-Gyung Ahn, Md Malekkul Islam, Gamal Refai-Ahmed, Bhoomika Devaru Hedge, Guan-Yu Lin, Po-Chiao Chang, Ping-Chin Yeh, Jonathan Chang
2025	J	`jnl`	Simultaneous Multi-objective Alignment Across Verifiable and Non-verifiable Rewards. CoRR Yiran Shen, Yu Xia, Jonathan Chang, Prithviraj Ammanabrolu
2023	—	`conf`	A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture and Write-Assist Circuitry Scheme for High-Density and Low-VMIN Applications. VLSI Technology and Circuits Jonathan Chang, Yen-Huei Chen, Gary Chan, Kuo-Cheng Lin, Po-Sheng Wang, Yangsyu Lin, Sevic Chen, Peijiun Lin, Ching-Wei Wu, Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara, Atul Katoch, Robin Lee, Hung-Jen Liao, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li
2023	—	`conf`	High Density Embedded 3D Stackable Via RRAM in Advanced MCU Applications. VLSI Technology and Circuits Yao-Hung Huang, Yu-Cheng Hsieh, Yu-Cheng Lin, Yue-Der Chih, Eric Wang, Jonathan Chang, Ya-Chin King, Chrong Jung Lin
2022	—	`conf`	A 135.6Tbps/W 2R2W SRAM with 12T Logic Bit-cell with Vmin Down to 335mV Targeted for Machine-Learning Applications in 6nm FinFET CMOS Technology. VLSI Technology and Circuits Nail Etkin Can Akkaya, Gary Chan, Hung-Jen Liao, Yih Wang, Jonathan Chang
2022	A*	`conf`	Multitask Prompted Training Enables Zero-Shot Task Generalization. ICLR Victor Sanh, Albert Webson, Colin Raffel, Stephen H. Bach, Lintang Sutawika, Zaid Alyafeai, Antoine Chaffin, Arnaud Stiegler, Arun Raja, Manan Dey, M Saiful Bari, Canwen Xu, Urmish Thakker, Shanya Sharma Sharma, Eliza Szczechla, Taewoon Kim, Gunjan Chhablani, Nihal V. Nayak, Debajyoti Datta, Jonathan Chang, Mike Tian-Jian Jiang, Han Wang, Matteo Manica, Sheng Shen, Zheng Xin Yong, Harshit Pandey, Rachel Bawden, Thomas Wang, Trishala Neeraj, Jos Rozen, Abheesht Sharma, Andrea Santilli, Thibault Févry, Jason Alan Fries, Ryan Teehan, Teven Le Scao, Stella Biderman, Leo Gao, Thomas Wolf, Alexander M. Rush
2022	C	`conf`	Optimal Generic Attack Against Basic Boneh-Boyen Signatures. ISPEC Yen-Kang Fu, Jonathan Chang, David Jao
2022	—	`conf`	Reliability Analysis of Physically Unclonable Function by Using Aging Variability Simulation. IRPS Jae-Gyung Ahn, Jim Wesselkamper, Ryan S. W. Baek, Ping-Chin Yeh, Jonathan Chang, Jennifer Wong, Xin Wu
2021	J	`jnl`	2-adjoint equivalences in homotopy type theory. Log. Methods Comput. Sci. Daniel Carranza, Jonathan Chang, Chris Kapulkin, Ryan Sandford
2021	—	`conf`	A 16Kb Antifuse One-Time-Programmable Memory in 5nm High-K Metal-Gate Fin-FET CMOS Featuring Bootstrap High Voltage Scheme, Read Endpoint Detection and Pseudo-Differential Sensing. VLSI Circuits Shaun Chou, Gu-Huan Li, Shawn Chen, Jun-Hao Chang, Wan-Hsueh Cheng, Shao-Ding Wu, Philex Fan, Chia-En Huang, Yu-Der Chih, Yih Wang, Jonathan Chang
2021	—	`conf`	A 5nm [email protected] and [email protected] 4kb Standard-Cell- Based Two-Port Register File with a 16T Bitcell with No Half-Selection Issue. ISSCC Hidehiro Fujiwara, Yi-Hsin Nien, Chih-Yu Lin, Hsien-Yu Pan, Hao-Wen Hsu, Shin-Rung Wu, Yao-Yi Liu, Yen-Huei Chen, Hung-Jen Liao, Jonathan Chang
2021	J	`jnl`	A 7-nm Compute-in-Memory SRAM Macro Supporting Multi-Bit Input, Weight and Output and Achieving 351 TOPS/W and 372.4 GOPS. IEEE J. Solid State Circuits Mahmut E. Sinangil, Burak Erbagci, Rawan Naous, Kerem Akarvardar, Dar Sun, Win-San Khwa, Hung-Jen Liao, Yih Wang, Jonathan Chang
2021	—	`—`	Computational Framework for the Identification of Neural Circuits Underlying Psychiatric Disorders. Jonathan Chang
2021	J	`jnl`	Multitask Prompted Training Enables Zero-Shot Task Generalization. CoRR Victor Sanh, Albert Webson, Colin Raffel, Stephen H. Bach, Lintang Sutawika, Zaid Alyafeai, Antoine Chaffin, Arnaud Stiegler, Teven Le Scao, Arun Raja, Manan Dey, M. Saiful Bari, Canwen Xu, Urmish Thakker, Shanya Sharma, Eliza Szczechla, Taewoon Kim, Gunjan Chhablani, Nihal V. Nayak, Debajyoti Datta, Jonathan Chang, Mike Tian-Jian Jiang, Han Wang, Matteo Manica, Sheng Shen, Zheng Xin Yong, Harshit Pandey, Rachel Bawden, Thomas Wang, Trishala Neeraj, Jos Rozen, Abheesht Sharma, Andrea Santilli, Thibault Févry, Jason Alan Fries, Ryan Teehan, Stella Biderman, Leo Gao, Tali Bers, Thomas Wolf, Alexander M. Rush
2021	—	`conf`	Product Lifetime Estimation in 7nm with Large data of Failure Rate and Si-Based Thermal Coupling Model. IRPS Jae-Gyung Ahn, Rhesa Nathanael, I-Ru Chen, Ping-Chin Yeh, Jonathan Chang
2021	—	`conf`	SE1: What Technologies Will Shape the Future of Computing? ISSCC Hugh Mair, Shinichiro Shiratake, Eric Karl, Thomas Burd, Jonathan Chang, Debbie Marr, Samuel Naffziger, Henk Corporaal, Ken Takeuchi, Naresh R. Shanbhag
2021	—	`conf`	Session 24 Overview: Advanced Embedded Memories Memory Subcommittee. ISSCC Eric Karl, Shinichiro Shiratake, Jonathan Chang
2020	—	`conf`	15.1 A 5nm 135Mb SRAM in EUV and High-Mobility-Channel FinFET Technology with Metal Coupling and Charge-Sharing Write-Assist Circuitry Schemes for High-Density and Low-VMIN Applications. ISSCC Jonathan Chang, Yen-Huei Chen, Gary Chan, Hank Cheng, Po-Sheng Wang, Yangsyu Lin, Hidehiro Fujiwara, Robin Lee, Hung-Jen Liao, Ping-Wei Wang, Geoffrey Yeap, Quincy Li
2020	—	`conf`	15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications. ISSCC Qing Dong, Mahmut E. Sinangil, Burak Erbagci, Dar Sun, Win-San Khwa, Hung-Jen Liao, Yih Wang, Jonathan Chang
2020	—	`conf`	Estimation of Product Reliability using TDDB Simulation and Statistical EM Method. IRPS Jae-Gyung Ahn, Ping-Chin Yeh, Jonathan Chang
2019	J	`jnl`	A 290-mV, 7-nm Ultra-Low-Voltage One-Port SRAM Compiler Design Using a 12T Write Contention and Read Upset Free Bit-Cell. IEEE J. Solid State Circuits Mahmut E. Sinangil, Yen-Ting Lin, Hung-Jen Liao, Jonathan Chang
2019	—	`conf`	A 7nm 2.1GHz Dual-Port SRAM with WL-RC Optimization and Dummy-Read-Recovery Circuitry to Mitigate Read- Disturb-Write Issue. ISSCC Hidehiro Fujiwara, Chih-Yu Lin, Hsien-Yu Pan, Cheng-Han Lin, Po-Yi Huang, Kao-Cheng Lin, Jhon-Jhy Liaw, Yen-Huei Chen, Hung-Jen Liao, Jonathan Chang
2019	—	`conf`	A Reliable, Low-Cost, Low-Energy Physically Unclonable Function Circuit Through Effective Filtering. VLSI-DAT Shih-Lien Lu, Cheng-En Lee, Peter Noel, Saman Adham, Ted Wong, Jonathan Chang
2019	—	`conf`	Design-For-Reliability Flow in 7nm Products with Data Center and Automotive Applications. IRPS Jae-Gyung Ahn, I-Ru Chen, Ping-Chin Yeh, Jonathan Chang
2019	J	`jnl`	Dynamic pH Sensor with Embedded Calibration Scheme by Advanced CMOS FinFET Technology. Sensors Chien-Ping Wang, Ying-Chun Shen, Peng-Chun Liou, Yu-Lun Chueh, Yue-Der Chih, Jonathan Chang, Chrong Jung Lin, Ya-Chin King
2019	J	`jnl`	FinFET CMOS logic gates with non-volatile states for reconfigurable computing systems. Integr. Yu-Fan Chiang, Wei-Yu Chien, Yue-Der Chih, Jonathan Chang, Chrong Jung Lin, Ya-Chin King
2019	J	`jnl`	Learning Deep Parameterized Skills from Demonstration for Re-targetable Visuomotor Control. CoRR Jonathan Chang, Nishanth Kumar, Sean Hastings, Aaron Gokaslan, Diego Romeres, Devesh K. Jha, Daniel Nikovski, George Dimitri Konidaris, Stefanie Tellex
2018	—	`conf`	A 290MV Ultra-Low Voltage One-Port SRAM Compiler Design Using a 12T Write Contention and Read Upset Free Bit-Cell in 7NM FinFET Technology. VLSI Circuits Mahmut E. Sinangil, Yen-Ting Lin, Hung-Jen Liao, Jonathan Chang
2018	—	`conf`	A 5GHz 7nm L1 cache memory compiler for high-speed computing and mobile applications. ISSCC Michael Clinton, Rajinder Singh, Marty Tsai, Shayan Zhang, Bryan Sheffield, Jonathan Chang
2018	—	`conf`	Electromigration failure rate of redundant via. IRPS Jae-Gyung Ahn, Ping-Chin Yeh, Jonathan Chang
2018	—	`conf`	Joint Label Inference in Networks. WWW (Companion Volume) Deepayan Chakrabarti, Stanislav Funiak, Jonathan Chang, Sofus A. Macskassy
2018	—	`conf`	Session 11 overview: SRAM: Memory subcommittee. ISSCC Jonathan Chang, Chun Shiah, Leland Chang
2017	—	`conf`	12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications. ISSCC Jonathan Chang, Yen-Huei Chen, Wei-Min Chan, Sahil Preet Singh, Hank Cheng, Hidehiro Fujiwara, Jih-Yu Lin, Kao-Cheng Lin, John Hung, Robin Lee, Hung-Jen Liao, Jhon-Jhy Liaw, Quincy Li, Chih-Yung Lin, Mu-Chi Chiang, Shien-Yang Wu
2017	—	`conf`	12.3 A low-power and high-performance 10nm SRAM architecture for mobile applications. ISSCC Michael Clinton, Hank Cheng, Hung-Jen Liao, Robin Lee, Ching-Wei Wu, Johnny Yang, Hau-Tai Hsieh, Frank Wu, Jung-Ping Yang, Atul Katoch, Arun Achyuthan, Donald Mikan, Bryan Sheffield, Jonathan Chang
2017	—	`conf`	EE5: When will we stop driving our cars? ISSCC Martin Brox, Jonathan Chang, Howard C. Luong, Paul Liang, Riccardo Mariani
2017	J	`jnl`	Joint Label Inference in Networks. J. Mach. Learn. Res. Deepayan Chakrabarti, Stanislav Funiak, Jonathan Chang, Sofus A. Macskassy
2017	J	`jnl`	Learning Representations of Emotional Speech with Deep Convolutional Generative Adversarial Networks. CoRR Jonathan Chang, Stefan Scherer
2017	Misc	`conf`	Learning representations of emotional speech with deep convolutional generative adversarial networks. ICASSP Jonathan Chang, Stefan Scherer
2016	—	`conf`	A 16nm dual-port SRAM with partial suppressed word-line, dummy read recovery and negative bit-line circuitries for low VMIN applications. VLSI Circuits Yen-Huei Chen, Kao-Cheng Lin, Ching-Wei Wu, Wei-Min Chan, Jhon-Jhy Liaw, Hung-Jen Liao, Jonathan Chang
2016	—	`conf`	A 64-Kb 0.37V 28nm 10T-SRAM with mixed-Vth read-port and boosted WL scheme for IoT applications. A-SSCC Hidehiro Fujiwara, Yen-Huei Chen, Chih-Yu Lin, Wei-Cheng Wu, Dar Sun, Shin-Rung Wu, Hung-Jen Liao, Jonathan Chang
2015	—	`conf`	17.2 A 64kb 16nm asynchronous disturb current free 2-port SRAM with PMOS pass-gates for FinFET technologies. ISSCC Hidehiro Fujiwara, Li-Wen Wang, Yen-Huei Chen, Kao-Cheng Lin, Dar Sun, Shin-Rung Wu, Jhon-Jhy Liaw, Chih-Yung Lin, Mu-Chi Chiang, Hung-Jen Liao, Shien-Yang Wu, Jonathan Chang
2015	J	`jnl`	A 16 nm 128 Mb SRAM in High-κ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications. IEEE J. Solid State Circuits Yen-Huei Chen, Wei-Min Chan, Wei-Cheng Wu, Hung-Jen Liao, Kuo-Hua Pan, Jhon-Jhy Liaw, Tang-Hsuan Chung, Quincy Li, Chih-Yung Lin, Mu-Chi Chiang, Shien-Yang Wu, Jonathan Chang
2015	—	`conf`	F2: Memory trends: From big data to wearable devices. ISSCC Jonathan Chang, Leland Chang, Antoine Dupret, Chulwoo Kim, Fatih Hamzaoglu, Takefumi Yoshikawa
2015	J	`jnl`	Highlights of the IEEE ISSCC 2014 Processors, Digital, Memory, Biomedical & Next-Generation Systems Technologies, and Imagers, MEMS, Medical & Displays Sessions. IEEE J. Solid State Circuits Vivek De, Stephen Kosonocky, Jonathan Chang, Yogesh K. Ramadass, David Stoppa
2015	—	`conf`	Product-level reliability estimator with budget-based reliability management in 20nm technology. IRPS Jae-Gyung Ahn, Ming Feng Lu, Nitin Navale, Dawn Graves, Ping-Chin Yeh, Jonathan Chang, S. Y. Pai
2014	—	`conf`	13.5 A 16nm 128Mb SRAM in high-κ metal-gate FinFET technology with write-assist circuitry for low-VMIN applications. ISSCC Yen-Huei Chen, Wei-Min Chan, Wei-Cheng Wu, Hung-Jen Liao, Kuo-Hua Pan, Jhon-Jhy Liaw, Tang-Hsuan Chung, Quincy Li, George H. Chang, Chih-Yung Lin, Mu-Chi Chiang, Shien-Yang Wu, Sreedhar Natarajan, Jonathan Chang
2014	—	`conf`	A configurable 2-in-1 SRAM compiler with constant-negative-level write driver for low Vmin in 16nm Fin-FET CMOS. A-SSCC Ching-Wei Wu, Ming-Hung Chang, Chia-Cheng Chen, Robin Lee, Hung-Jen Liao, Jonathan Chang
2014	—	`conf`	F2: 3D stacking technologies for image sensors and memories. ISSCC Yusuke Oike, Makoto Ikeda, Albert Theuwissen, Johannes Solhusvik, Jonathan Chang, Tadahiro Kuroda
2014	A*	`conf`	Joint Inference of Multiple Label Types in Large Networks. ICML Deepayan Chakrabarti, Stanislav Funiak, Jonathan Chang, Sofus A. Macskassy
2014	J	`jnl`	Joint Inference of Multiple Label Types in Large Networks. CoRR Deepayan Chakrabarti, Stanislav Funiak, Jonathan Chang, Sofus A. Macskassy
2014	A	`conf`	The importance of DFX, a foundry perspective. ITC Saman Adham, Jonathan Chang, Hung-Jen Liao, John Hung, Ting-Hua Hsieh
2013	—	`conf`	A 20nm 112Mb SRAM in High-к metal-gate with assist circuitry for low-leakage and low-VMIN applications. ISSCC Jonathan Chang, Yen-Huei Chen, Hank Cheng, Wei-Min Chan, Hung-Jen Liao, Quincy Li, Stanley Chang, Sreedhar Natarajan, Robin Lee, Ping-Wei Wang, Shyue-Shyh Lin, Chung-Cheng Wu, Kuan-Lun Cheng, Min Cao, George H. Chang
2012	—	`conf`	A 28nm high-k metal-gate SRAM with Asynchronous Cross-Couple Read Assist (AC VLSIC Robin Lee, Jung-Ping Yang, Chia-En Huang, Chih-Chieh Chiu, Wei-Shuo Kao, Hong-Chen Cheng, Hong-Jen Liao, Jonathan Chang
2011	A	`conf`	Location3: How Users Share and Respond to Location-Based Data on Social. ICWSM Jonathan Chang, Eric Sun
2010	—	`conf`	A 1.2 TB/s on-chip ring interconnect for 45nm 8-core enterprise Xeon® processor. ISSCC Cheolmin Park, Roy W. Badeau, Larry L. Biro, Jonathan Chang, Tejpal Singh, Jim Vash, Bo Wang, Tom Wang
2010	J	`jnl`	A 45 nm 8-Core Enterprise Xeon¯ Processor. IEEE J. Solid State Circuits Stefan Rusu, Simon M. Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli, Sujal Vora
2010	—	`conf`	Gesture Recognition in the Haptic Creature. EuroHaptics (1) Jonathan Chang, Karon E. MacLean, Steve Yohanan
2010	—	`conf`	Not-So-Latent Dirichlet Allocation: Collapsed Gibbs Sampling Using Human Judgments. Mturk@HLT-NAACL Jonathan Chang
2010	A	`conf`	ePluribus: Ethnicity on Social Networks. ICWSM Jonathan Chang, Itamar Rosenn, Lars Backstrom, Cameron Marlow
2009	—	`conf`	A 45nm 8-core enterprise Xeon® processor. ISSCC Stefan Rusu, Simon M. Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli
2009	—	`conf`	Comparison of child-human and child-computer interactions based on manual annotations. WOCCI Matthew Black, Jeannette N. Chang, Jonathan Chang, Shrikanth S. Narayanan
2009	—	`conf`	Power reduction techniques for an 8-core xeon® processor. ESSCIRC Stefan Rusu, Simon M. Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli, Sujal Vora
2007	J	`jnl`	A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache. IEEE J. Solid State Circuits Stefan Rusu, Simon M. Tam, Harry Muljono, David Ayers, Jonathan Chang, Brian S. Cherkauer, Jason Stinson, John Benoit, Raj Varada, Justin Leung, Rahul Dilip Limaye, Sujal Vora
2007	J	`jnl`	Automatic Instruction-Level Software-Only Recovery. IEEE Micro George A. Reis, Jonathan Chang, David I. August
2007	J	`jnl`	The 65-nm 16-MB Shared On-Die L3 Cache for the Dual-Core Intel Xeon Processor 7100 Series. IEEE J. Solid State Circuits Jonathan Chang, Ming Huang, Jonathan Shoemaker, John Benoit, Szu-Liang Chen, Wei Chen, Siufu Chiu, Raghuraman Ganesan, Gloria Leong, Venkata Lukka, Stefan Rusu, Durgesh Srivastava
2007	J	`jnl`	UNISIM: An Open Simulation Environment and Library for Complex Architecture Design and Collaborative Development. IEEE Comput. Archit. Lett. David I. August, Jonathan Chang, Sylvain Girbal, Daniel Gracia Pérez, Gilles Mouchard, David A. Penry, Olivier Temam, Neil Vachharajani
2006	—	`conf`	A Dual-Core Multi-Threaded Xeon Processor with 16MB L3 Cache. ISSCC Stefan Rusu, Simon M. Tam, Harry Muljono, David Ayers, Jonathan Chang
2006	A	`conf`	Automatic Instruction-Level Software-Only Recovery. DSN Jonathan Chang, George A. Reis, David I. August
2006	B	`conf`	Selective Runtime Memory Disambiguation in a Dynamic Binary Translator. CC Bolei Guo, Youfeng Wu, Cheng Wang, Matthew J. Bridges, Guilherme Ottoni, Neil Vachharajani, Jonathan Chang, David I. August
2005	J	`jnl`	A 130-nm triple-V IEEE J. Solid State Circuits Jonathan Chang, Stefan Rusu, Jonathan Shoemaker, Simon Tam, Ming Huang, Mizan Haque, Siufu Chiu, Kevin Truong, Mesbah Karim, Gloria Leong, Kiran Desai, Richard Goe, Sandhya Kulkarni
2005	A*	`conf`	Design and Evaluation of Hybrid Fault-Detection Systems. ISCA George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee
2005	A	`conf`	SWIFT: Software Implemented Fault Tolerance. CGO George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August
2005	J	`jnl`	Software-controlled fault tolerance. ACM Trans. Archit. Code Optim. George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee
2004	A*	`conf`	RIFLE: An Architectural Framework for User-Centric Information-Flow Security. MICRO Neil Vachharajani, Matthew J. Bridges, Jonathan Chang, Ram Rangan, Guilherme Ottoni, Jason A. Blome, George A. Reis, Manish Vachharajani, David I. August
2003	—	`conf`	The Lutonium: A Sub-Nanojoule Asynchronous 8051 Microcontroller. ASYNC Alain J. Martin, Mika Nyström, Karl Papadantonakis, Paul I. Pénzes, Piyush Prakash, Catherine G. Wong, Jonathan Chang, Kevin S. Ko, Benjamin Lee, Elaine Ou, James Pugh, Eino-Ville Talvala, James T. Tong, Ahmet Tura
1996	A	`conf`	Analysis and Detection of Timing Failures in an Experimental Test Chip. ITC Piero Franco, Siyad C. Ma, Jonathan Chang, Yi-Chin Chu, Sanjay Wattal, Edward J. McCluskey, Robert L. Stokes, William D. Farwell