Jonas Bertels

12 papers B 1C 2Journal 9
YearRankTypeTitle / Venue / Authors
2026 J jnl
Area-Efficient LUT-Based Multipliers for AMD Versal FPGAs.
IACR Cryptol. ePrint Arch.
Zetao Miao, Xander Pottier, Jonas Bertels, Wouter Legiest, Ingrid Verbauwhede
2025 J jnl
A High Throughput Kyber NTT.
IACR Cryptol. ePrint Arch.
Jonas Bertels, Ingrid Verbauwhede
2025 J jnl
FINAL bootstrap acceleration on FPGA using DSP-free constant-multiplier NTTs.
IACR Cryptol. ePrint Arch.
Jonas Bertels, Hilder V. L. Pereira, Ingrid Verbauwhede
2025 J jnl
FINAL bootstrap acceleration on FPGA using DSP-free constant-multiplier NTTs.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Jonas Bertels, Hilder V. L. Pereira, Ingrid Verbauwhede
2025 J jnl
OPTIMSM: FPGA hardware accelerator for Zero-Knowledge MSM.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Xander Pottier, Thomas de Ruijter, Jonas Bertels, Wouter Legiest, Michiel Van Beirendonck, Ingrid Verbauwhede
2024 B conf
A Better Kyber Butterfly for FPGAs.
FPL
Jonas Bertels, Quinten Norga, Ingrid Verbauwhede
2024 J jnl
A Better Kyber Butterfly for FPGAs.
IACR Cryptol. ePrint Arch.
Jonas Bertels, Quinten Norga, Ingrid Verbauwhede
2024 C conf
Hardware Acceleration of the Prime-Factor and Rader NTT for BGV Fully Homomorphic Encryption.
ARITH
David Du Pont, Jonas Bertels, Furkan Turan, Michiel Van Beirendonck, Ingrid Verbauwhede
2024 J jnl
Hardware Acceleration of the Prime-Factor and Rader NTT for BGV Fully Homomorphic Encryption.
IACR Cryptol. ePrint Arch.
David Du Pont, Jonas Bertels, Furkan Turan, Michiel Van Beirendonck, Ingrid Verbauwhede
2024 J jnl
OPTIMSM: FPGA hardware accelerator for Zero-Knowledge MSM.
IACR Cryptol. ePrint Arch.
Xander Pottier, Thomas de Ruijter, Jonas Bertels, Wouter Legiest, Michiel Van Beirendonck, Ingrid Verbauwhede
2023 C conf
Hardware Acceleration of FHEW.
DDECS
Jonas Bertels, Michiel Van Beirendonck, Furkan Turan, Ingrid Verbauwhede
2023 J jnl
Hardware Acceleration of FHEW.
IACR Cryptol. ePrint Arch.
Jonas Bertels, Michiel Van Beirendonck, Furkan Turan, Ingrid Verbauwhede