John V. Arthur

45 papers A 2B 4C 4Journal 23Unranked 12

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A Scalable NorthPole System with End-to-End Vertical Integration for Low-Latency and Energy-Efficient LLM Inference. CoRR Michael V. DeBole, Rathinakumar Appuswamy, Neil McGlohon, Brian Taba, Steven K. Esser, Filipp Akopyan, John V. Arthur, Arnon Amir, Alexander Andreopoulos, Peter J. Carlson, Andrew S. Cassidy, Pallab Datta, Myron D. Flickner, Rajamohan Gandhasri, Guillaume J. Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Tapan K. Nayak, Carlos Ortega Otero, Hartmut Penner, William P. Risk, Jun Sawada, Jay Sivagnaname, Daniel F. Smith, Rafael Sousa, Ignacio Terrizzano, Takanori Ueda, Trent Gray-Donald, David D. Cox, Dharmendra S. Modha
2025	J	`jnl`	Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation. CoRR Andrew S. Cassidy, Guillaume Garreau, Jay Sivagnaname, Mike Grassi, Bernard Brezzo, John V. Arthur, Dharmendra S. Modha
2025	—	`conf`	The NorthPole Validator: A Cycle-Accurate Simulator for HW/SW Codesign of a Prescheduled Neural Inference Accelerator. HPEC Alexander Andreopoulos, Michael V. DeBole, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Tapan K. Nayak, Daniel F. Smith, Brian Taba, Filipp Akopyan, Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Carlos Ortega Otero, William P. Risk, Jun Sawada, Myron D. Flickner, Dharmendra S. Modha
2024	—	`conf`	11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm Chip. ISSCC Andrew S. Cassidy, John V. Arthur, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, William P. Risk, Kai Schleupen, Ben Shaw, Jay Sivagnaname, Daniel F. Smith, Ignacio Terrizzano, Takanori Ueda, Dharmendra S. Modha
2024	—	`conf`	Breakthrough Edge AI Inference Performance Using Northpole in 3U Vpx Form Factor. HPEC Filipp Akopyan, William P. Risk, John V. Arthur, Andrew S. Cassidy, Michael V. DeBole, Carlos Ortega Otero, Jun Sawada, Evan Colgan, Michael E. Criscolo, Phillip V. Mann, Heinz Baier, Kai Schleupen, Arnon Amir, Alexander Andreopoulos, Rathinakumar Appuswamy, Deepika Bablani, Peter J. Carlson, Pallab Datta, Steven K. Esser, Myron D. Flickner, Rajamohan Gandhasri, Guillaume J. Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Neil McGlohon, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, Jay Sivagnaname, Daniel F. Smith, Rafael Sousa, Brian Taba, Ignacio Terrizzano, Takanori Ueda, Dharmendra S. Modha
2024	—	`conf`	Breakthrough Low-Latency, High-Energy-Efficiency LLM Inference Performance Using NorthPole. HPEC Rathinakumar Appuswamy, Michael V. DeBole, Brian Taba, Steven K. Esser, Andrew S. Cassidy, Arnon Amir, Alexander Andreopoulos, Deepika Bablani, Pallab Datta, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Neil McGlohon, Jeffrey L. McKinstry, Tapan K. Nayak, Daniel F. Smith, Rafael Sousa, Ignacio Terrizzano, Filipp Akopyan, Peter J. Carlson, Rajamohan Gandhasri, Guillaume Garreau, Nelson M. Gonzalez, Megumi Ito, Jennifer L. Klamo, Yutaka Y. Nakamura, Carlos Ortega Otero, William P. Risk, Jun Sawada, Kai Schleupen, Jay Sivagnaname, Matthew Stallone, Takanori Ueda, Myron D. Flickner, John V. Arthur, Rameswar Panda, David D. Cox, Dharmendra S. Modha
2023	—	`conf`	IBM NorthPole Neural Inference Machine. HCS Dharmendra S. Modha, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, William P. Risk, Kai Schleupen, Ben Shaw, Jay Sivagnaname, Daniel F. Smith, Ignacio Terrizzano, Takanori Ueda
2019	—	`conf`	Discovering Low-Precision Networks Close to Full-Precision Networks for Efficient Inference. EMC2@NeurIPS Jeffrey L. McKinstry, Steven K. Esser, Rathinakumar Appuswamy, Deepika Bablani, John V. Arthur, Izzet B. Yildiz, Dharmendra S. Modha
2019	J	`jnl`	TrueNorth: Accelerating From Zero to 64 Million Neurons in 10 Years. Computer Michael V. DeBole, Brian Taba, Arnon Amir, Filipp Akopyan, Alexander Andreopoulos, William P. Risk, Jeff Kusnitz, Carlos Ortega Otero, Tapan K. Nayak, Rathinakumar Appuswamy, Peter J. Carlson, Andrew S. Cassidy, Pallab Datta, Steven K. Esser, Guillaume Garreau, Kevin L. Holland, Scott Lekuch, Michael Mastro, Jeffrey L. McKinstry, Carmelo di Nolfo, Brent Paulovicks, Jun Sawada, Kai Schleupen, Benjamin G. Shaw, Jennifer L. Klamo, Myron D. Flickner, John V. Arthur, Dharmendra S. Modha
2018	J	`jnl`	Discovering Low-Precision Networks Close to Full-Precision Networks for Efficient Embedded Inference. CoRR Jeffrey L. McKinstry, Steven K. Esser, Rathinakumar Appuswamy, Deepika Bablani, John V. Arthur, Izzet B. Yildiz, Dharmendra S. Modha
2018	J	`jnl`	Low Precision Policy Distillation with Application to Low-Power, Real-time Sensation-Cognition-Action Loop with Neuromorphic Computing. CoRR Jeffrey L. McKinstry, Davis R. Barch, Deepika Bablani, Michael DeBole, Steven K. Esser, Jeffrey A. Kusnitz, John V. Arthur, Dharmendra S. Modha
2017	J	`jnl`	Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor. IEEE Trans. Computers Wei-Yu Tsai, Davis R. Barch, Andrew S. Cassidy, Michael V. DeBole, Alexander Andreopoulos, Bryan L. Jackson, Myron D. Flickner, John V. Arthur, Dharmendra S. Modha, John Sampson, Vijaykrishnan Narayanan
2016	J	`jnl`	Convolutional Networks for Fast, Energy-Efficient Neuromorphic Computing. CoRR Steven K. Esser, Paul A. Merolla, John V. Arthur, Andrew S. Cassidy, Rathinakumar Appuswamy, Alexander Andreopoulos, David J. Berg, Jeffrey L. McKinstry, Timothy Melano, Davis R. Barch, Carmelo di Nolfo, Pallab Datta, Arnon Amir, Brian Taba, Myron D. Flickner, Dharmendra S. Modha
2016	J	`jnl`	Convolutional networks for fast, energy-efficient neuromorphic computing. Proc. Natl. Acad. Sci. USA Steven K. Esser, Paul A. Merolla, John V. Arthur, Andrew S. Cassidy, Rathinakumar Appuswamy, Alexander Andreopoulos, David J. Berg, Jeffrey L. McKinstry, Timothy Melano, Davis R. Barch, Carmelo di Nolfo, Pallab Datta, Arnon Amir, Brian Taba, Myron D. Flickner, Dharmendra S. Modha
2016	J	`jnl`	Deep neural networks are robust to weight binarization and other non-linear distortions. CoRR Paul Merolla, Rathinakumar Appuswamy, John V. Arthur, Steven K. Esser, Dharmendra S. Modha
2016	J	`jnl`	Mapping Generative Models onto a Network of Digital Spiking Neurons. IEEE Trans. Biomed. Circuits Syst. Bruno U. Pedroni, Srinjoy Das, John V. Arthur, Paul A. Merolla, Bryan L. Jackson, Dharmendra S. Modha, Kenneth Kreutz-Delgado, Gert Cauwenberghs
2016	C	`conf`	Real-time sensory information processing using the TrueNorth Neurosynaptic System. ISCAS Andreas G. Andreou, Andrew A. Dykman, Kate D. Fischl, Guillaume Garreau, Daniel R. Mendat, Garrick Orchard, Andrew S. Cassidy, Paul Merolla, John V. Arthur, Rodrigo Alvarez-Icaza, Bryan L. Jackson, Dharmendra S. Modha
2016	J	`jnl`	Structured Convolution Matrices for Energy-efficient Deep learning. CoRR Rathinakumar Appuswamy, Tapan K. Nayak, John V. Arthur, Steven K. Esser, Paul Merolla, Jeffrey L. McKinstry, Timothy Melano, Myron Flickner, Dharmendra S. Modha
2016	A	`conf`	Truenorth ecosystem for brain-inspired computing: scalable systems, software, and applications. SC Jun Sawada, Filipp Akopyan, Andrew S. Cassidy, Brian Taba, Michael V. DeBole, Pallab Datta, Rodrigo Alvarez-Icaza, Arnon Amir, John V. Arthur, Alexander Andreopoulos, Rathinakumar Appuswamy, Heinz Baier, Davis Barch, David J. Berg, Carmelo di Nolfo, Steven K. Esser, Myron Flickner, Thomas A. Horvath, Bryan L. Jackson, Jeff Kusnitz, Scott Lekuch, Michael Mastro, Timothy Melano, Paul A. Merolla, Steven E. Millman, Tapan K. Nayak, Norm Pass, Hartmut E. Penner, William P. Risk, Kai Schleupen, Benjamin G. Shaw, Hayley Wu, Brian Giera, Adam T. Moody, T. Nathan Mundhenk, Brian Van Essen, Eric X. Wang, David P. Widemann, Qing Wu, William E. Murphy, Jamie K. Infantolino, James A. Ross, Dale R. Shires, Manuel M. Vindiola, Raju Namburu, Dharmendra S. Modha
2015	—	`conf`	Backpropagation for Energy-Efficient Neuromorphic Computing. NIPS Steven K. Esser, Rathinakumar Appuswamy, Paul Merolla, John V. Arthur, Dharmendra S. Modha
2015	J	`jnl`	Gibbs Sampling with Low-Power Spiking Digital Neurons. CoRR Srinjoy Das, Bruno U. Pedroni, Paul Merolla, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Dharmendra S. Modha, Gert Cauwenberghs, Kenneth Kreutz-Delgado
2015	C	`conf`	Gibbs sampling with low-power spiking digital neurons. ISCAS Srinjoy Das, Bruno Umbria Pedroni, Paul Merolla, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Dharmendra S. Modha, Gert Cauwenberghs, Kenneth Kreutz-Delgado
2015	J	`jnl`	Mapping Generative Models onto Networks of Digital Spiking Neurons. CoRR Bruno U. Pedroni, Srinjoy Das, John V. Arthur, Paul Merolla, Bryan L. Jackson, Dharmendra S. Modha, Kenneth Kreutz-Delgado, Gert Cauwenberghs
2015	J	`jnl`	TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Filipp Akopyan, Jun Sawada, Andrew Cassidy, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Nabil Imam, Yutaka Y. Nakamura, Pallab Datta, Gi-Joon Nam, Brian Taba, Michael P. Beakes, Bernard Brezzo, Jente B. Kuang, Rajit Manohar, William P. Risk, Bryan L. Jackson, Dharmendra S. Modha
2015	J	`jnl`	Visual saliency on networks of neurosynaptic cores. IBM J. Res. Dev. Alexander Andreopoulos, Brian Taba, Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Myron Flickner, William P. Risk, Arnon Amir, Paul Merolla, John V. Arthur, David J. Berg, Jeffrey A. Kusnitz, Pallab Datta, Steven K. Esser, Rathinakumar Appuswamy, Davis Barch, Dharmendra S. Modha
2014	J	`jnl`	A Multicast Tree Router for Multichip Neuromorphic Systems. IEEE Trans. Circuits Syst. I Regul. Pap. Paul Merolla, John V. Arthur, Rodrigo Alvarez-Icaza, Jean-Marie Bussat, Kwabena Boahen
2014	J	`jnl`	Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations. Proc. IEEE Ben Varkey Benjamin, Peiran Gao, Emmett McQuinn, Swadesh Choudhary, Anand Chandrasekaran, Jean-Marie Bussat, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Kwabena Boahen
2014	A	`conf`	Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution. SC Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc González Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir, Steven K. Esser, Jeff Kusnitz, Rathinakumar Appuswamy, Chuck Haymes, Bernard Brezzo, Roger Moussalli, Ralph Bellofatto, Christian W. Baks, Michael Mastro, Kai Schleupen, Charles E. Cox, Ken Inoue, Steven E. Millman, Nabil Imam, Emmett McQuinn, Yutaka Y. Nakamura, Ivan Vo, Chen Guok, Don Nguyen, Scott Lekuch, Sameh W. Asaad, Daniel J. Friedman, Bryan L. Jackson, Myron Flickner, William P. Risk, Rajit Manohar, Dharmendra S. Modha
2013	B	`conf`	Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores. IJCNN Andrew S. Cassidy, Paul Merolla, John V. Arthur, Steven K. Esser, Bryan L. Jackson, Rodrigo Alvarez-Icaza, Pallab Datta, Jun Sawada, Theodore M. Wong, Vitaly Feldman, Arnon Amir, Daniel Ben Dayan Rubin, Filipp Akopyan, Emmett McQuinn, William P. Risk, Dharmendra S. Modha
2013	B	`conf`	Cognitive computing systems: Algorithms and applications for networks of neurosynaptic cores. IJCNN Steven K. Esser, Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Davis Barch, Arnon Amir, John V. Arthur, Andrew Cassidy, Myron Flickner, Paul Merolla, Shyamal Chandra, Nicola Basilico, Stefano Carpin, Tom Zimmerman, Frank Zee, Rodrigo Alvarez-Icaza, Jeffrey A. Kusnitz, Theodore M. Wong, William P. Risk, Emmett McQuinn, Tapan K. Nayak, Raghavendra Singh, Dharmendra S. Modha
2012	—	`conf`	A Digital Neurosynaptic Core Using Event-Driven QDI Circuits. ASYNC Nabil Imam, Filipp Akopyan, John V. Arthur, Paul Merolla, Rajit Manohar, Dharmendra S. Modha
2012	—	`conf`	A superposable silicon synapse with programmable reversal potential. EMBC Ben Varkey Benjamin, John V. Arthur, Peiran Gao, Paul Merolla, Kwabena Boahen
2012	B	`conf`	Building block of a programmable neuromorphic substrate: A digital neurosynaptic core. IJCNN John V. Arthur, Paul Merolla, Filipp Akopyan, Rodrigo Alvarez-Icaza, Andrew Cassidy, Shyamal Chandra, Steven K. Esser, Nabil Imam, William P. Risk, Daniel Ben Dayan Rubin, Rajit Manohar, Dharmendra S. Modha
2011	—	`conf`	A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm. CICC Paul Merolla, John V. Arthur, Filipp Akopyan, Nabil Imam, Rajit Manohar, Dharmendra S. Modha
2011	J	`jnl`	Silicon-Neuron Design: A Dynamical Systems Approach. IEEE Trans. Circuits Syst. I Regul. Pap. John V. Arthur, Kwabena A. Boahen
2010	J	`jnl`	The thermodynamic temperature of a rhythmic spiking network CoRR Paul Merolla, Tristan Ursell, John V. Arthur
2007	—	`conf`	An in-silico Neural Model of Dynamic Routing through Neuronal Coherence. NIPS Devarajan Sridharan, Brian Percival, John V. Arthur, Kwabena Boahen
2007	J	`jnl`	Corrections to "Expandable Networks for Neuromorphic Chips". IEEE Trans. Circuits Syst. I Regul. Pap. Paul Merolla, John V. Arthur, Bertram E. Shi, Kwabena A. Boahen
2007	J	`jnl`	Expandable Networks for Neuromorphic Chips. IEEE Trans. Circuits Syst. I Regul. Pap. Paul Merolla, John V. Arthur, Bertram E. Shi, Kwabena A. Boahen
2007	C	`conf`	Silicon Neurons that Inhibit to Synchronize. ISCAS John V. Arthur, Kwabena Boahen
2007	J	`jnl`	Synchrony in Silicon: The Gamma Rhythm. IEEE Trans. Neural Networks John V. Arthur, Kwabena A. Boahen
2006	C	`conf`	Silicon neurons that inhibit to synchronize. ISCAS John V. Arthur, Kwabena Boahen
2005	—	`conf`	Learning in Silicon: Timing is Everything. NIPS John V. Arthur, Kwabena Boahen
2005	J	`jnl`	Neuromorphic implementation of orientation hypercolumns. IEEE Trans. Circuits Syst. I Regul. Pap. Thomas Y. W. Choi, Paul Merolla, John V. Arthur, Kwabena A. Boahen, Bertram E. Shi
2004	B	`conf`	Recurrently connected silicon neurons with active dendrites for one-shot learning. IJCNN John V. Arthur, Kwabena Boahen