John McAllister

73 papers B 2C 1Misc 10Journal 26Unranked 31

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Efficient Parallel Compilation and Profiling of Quantum Circuits at Large Scales. CoRR Jane Moore, Michael Hart, John McAllister
2025	Misc	`conf`	Efficient Co-Approximate Parallel Compressive Depth Reconstruction on FPGA. ICASSP Yun Wu, John McAllister
2025	—	`conf`	Lightweight FPGA Classifiers using Tangled Program Graphs. SiPS Jarlath Warner, John McAllister, Karol Desnos
2024	—	`conf`	Message from the Conference Chairs: SiPS 2024. SiPS Joseph R. Cavallaro, John McAllister, Jari Nurmi, Jani Boutellier
2024	—	`conf`	Quantum Circuit Cutting Minimising Loss of Qubit Entanglement. CF Michael Hart, John McAllister
2024	—	`conf`	Reconstructing Cut Quantum Circuits Maximising Fidelity between Quantum States. CF Michael Hart, John McAllister
2023	J	`jnl`	Abusive adversarial agents and attack strategies in cyber-physical systems. CAAI Trans. Intell. Technol. Viraj Singh Gaur, Vishal Sharma, John McAllister
2023	J	`jnl`	Fault-Tolerant Neural Network Accelerators With Selective TMR. IEEE Des. Test Timoteo García Bertoa, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, John McAllister
2022	J	`jnl`	Abusive Adversaries in 5G and Beyond IoT. IEEE Consumer Electron. Mag. Vishal Sharma, Blesson Varghese, John McAllister, Saraju P. Mohanty
2022	J	`jnl`	Editorial. J. Signal Process. Syst. John McAllister
2022	—	`conf`	Optimised EMG pipeline for gesture classification. EMBC Jarlath Warner, Richard Gault, John McAllister
2021	J	`jnl`	Algorithms & Architectures at the Boundary of Signal Processing & Machine Learning. J. Signal Process. Syst. John McAllister
2021	B	`conf`	An Emulation of Quantum Error-Correction on an FPGA device. FPL Michael Hart, John McAllister, Leo Rogers, Charles Gillan
2021	J	`jnl`	Configurable Quasi-Optimal Sphere Decoding for Scalable MIMO Communications. IEEE Trans. Circuits Syst. I Regul. Pap. Yun Wu, John McAllister
2021	J	`jnl`	EMG Biometric Systems Based on Different Wrist-Hand Movements. IEEE Access Sumit A. Raurale, John McAllister, Jesús Martínez del Rincón
2021	—	`conf`	Energy-Efficient Adaptive Modulated Fixed-Complexity Sphere Decoder. SiPS Yun Wu, John McAllister
2021	J	`jnl`	The Applied Signal Processing Systems Technical Committee [In the Spotlight]. IEEE Signal Process. Mag. John McAllister, Mike Polley, Roozbeh Jafari
2020	J	`jnl`	Correction to: Guest Editorial: JSPS Special Issue on 2018 IEEE Signal Processing Systems (SiPS) Workshop. J. Signal Process. Syst. Tokunbo Ogunfunmi, John McAllister, Bevan M. Baas, Mrityunjoy Chakraborty
2020	—	`conf`	Graph Coordination for Compact Representation of Regular Dataflow Structures. SiPS John McAllister, Michael Davis
2020	J	`jnl`	Guest Editorial: JSPS Special Issue on 2018 IEEE Signal Processing Systems (SiPS) Workshop. J. Signal Process. Syst. Tokunbo Ogunfunmi, John McAllister, Bevan M. Baas, Mrityunjoy Chakraborty
2020	Misc	`conf`	Programmable Dataflow Accelerators: A 5G OFDM Modulation/Demodulation Case Study. ICASSP Yun Wu, Peng Wang, John McAllister
2020	J	`jnl`	Real-Time Embedded EMG Signal Analysis for Wrist-Hand Pose Identification. IEEE Trans. Signal Process. Sumit A. Raurale, John McAllister, Jesús Martínez del Rincón
2019	—	`conf`	Comparison of Exponentially Decreasing Vs. Polynomially Decreasing Objective Functions for Making Quantum Circuits Nearest Neighbour Compliant. SAMOS Leo Rogers, John McAllister
2019	Misc	`conf`	EMG Wrist-hand Motion Recognition System for Real-time Embedded Platform. ICASSP Sumit A. Raurale, John McAllister, Jesús Martínez del Rincón
2019	Misc	`conf`	On Modified Squared Givens Rotations for Sphere Decoder Preprocessing. ICASSP Yun Wu, John McAllister
2019	C	`conf`	Window Size Estimation for Nearest Neighbour Compliant Quantum Circuit Mapping. ISCAS Leo Rogers, John McAllister
2018	J	`jnl`	Architectural Synthesis of Multi-SIMD Dataflow Accelerators for FPGA. IEEE Trans. Parallel Distributed Syst. Yun Wu, John McAllister
2018	Misc	`conf`	Emg Acquisition and Hand Pose Classification for Bionic Hands from Randomly-Placed Sensors. ICASSP Sumit A. Raurale, John McAllister, Jesús Martínez del Rincón
2017	J	`jnl`	Bounded Selective Spanning With Extended Fast Enumeration for MIMO-OFDM Systems Detection. IEEE Trans. Circuits Syst. I Regul. Pap. Yun Wu, John McAllister
2017	Misc	`conf`	Multicore distributed dictionary learning: A microarray gene expression biclustering case study. ICASSP Stephen Laide, John McAllister
2016	J	`jnl`	Constructive Synthesis of Memory-Intensive Accelerators for FPGA From Nested Loop Kernels. IEEE Trans. Signal Process. Matthew Milford, John McAllister
2016	J	`jnl`	Guest Editorial: New Frontiers in Signal Processing Applications and Embedded Processing Technologies. J. Signal Process. Syst. John McAllister, Máire O'Neill, Maxime Pelcat
2016	J	`jnl`	Streaming Elements for FPGA Signal and Image Processing Accelerators. IEEE Trans. Very Large Scale Integr. Syst. Peng Wang, John McAllister
2015	J	`jnl`	Guest Editorial: Special Issue on Embedded Computer Systems: Architectures, Modeling and Simulation. Int. J. Parallel Program. John McAllister, David Guevorkian, Hartwig Jeschke, Mihai Sima
2014	—	`conf`	FPGA-based Tabu search for detection in large-scale MIMO systems. SiPS Yun Wu, John McAllister
2013	—	`conf`	Bounded selective spanning with extended fast enumeration for MIMO-OFDM systems detection. EUSIPCO Yun Wu, John McAllister
2013	—	`ch.`	FPGA-Based DSP. Handbook of Signal Processing Systems John McAllister
2013	J	`jnl`	Guest Editorial: Special Issue on 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XI). Int. J. Parallel Program. John McAllister, Luigi Carro, Skevos Evripidou
2013	—	`conf`	High performance real-time Pre-Processing for Fixed-Complexity Sphere Decoder. GlobalSIP Yun Wu, John McAllister, Peng Wang
2013	Misc	`conf`	Soft-core stream processing on FPGA: An FFT case study. ICASSP Peng Wang, John McAllister, Yun Wu
2013	—	`conf`	Soft-core stream processor for sliding window applications. SiPS Peng Wang, John McAllister
2013	—	`conf`	Software defined FFT architecture for IEEE 802.11ac. GlobalSIP Peng Wang, John McAllister, Yun Wu
2013	—	`conf`	Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE. Financial Cryptography Workshops Ciara Moore, Neil Hanley, John McAllister, Máire O'Neill, Elizabeth O'Sullivan, Xiaolin Cao
2012	—	`conf`	Automatic FPGA synthesis of memory intensive C-based kernels. ICSAMOS Matthew Milford, John McAllister
2012	—	`conf`	Memory-centric VDF graph transformations for practical FPGA implementation. ESTIMedia Matthew Milford, John McAllister
2012	—	`conf`	Preface. ICSAMOS John McAllister, Shuvra S. Bhattacharyya
2012	J	`jnl`	Software-Defined Sphere Decoding for FPGA-Based MIMO Detection. IEEE Trans. Signal Process. Xuezheng Chu, John McAllister
2012	Misc	`conf`	Valved dataflow for FPGA memory hierarchy synthesis. ICASSP Matthew Milford, John McAllister
2011	—	`conf`	A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection. ARC Xuezheng Chu, John McAllister, Roger F. Woods
2011	—	`conf`	A kernel interleaved scheduling method for streaming applications on soft-core vector processors. ICSAMOS Chengwei Zheng, John McAllister, Yun Wu
2011	J	`jnl`	QR Decomposition-Based Matrix Inversion for High Performance Embedded MIMO Receivers. IEEE Trans. Signal Process. Lei Ma, Kevin Dickson, John McAllister, John V. McCanny
2011	J	`jnl`	Real-Valued Fixed-Complexity Sphere Decoder for High Dimensional QAM-MIMO Systems. IEEE Trans. Signal Process. C. Zheng, Xuezheng Chu, John McAllister, Roger F. Woods
2011	—	`ed.`	Reconfigurable Computing: Architectures, Tools and Applications - 7th International Symposium, ARC 2011, Belfast, UK, March 23-25, 2011. Proceedings ARC Andreas Koch, Ram Krishnamurthy, John McAllister, Roger F. Woods, Tarek A. El-Ghazawi
2010	—	`conf`	FPGA based soft-core SIMD processing: A MIMO-OFDM Fixed-Complexity Sphere Decoder case study. FPT Xuezheng Chu, John McAllister
2010	—	`ch.`	FPGA-based DSP. Handbook of Signal Processing Systems John McAllister
2010	J	`jnl`	SoC Memory Hierarchy Derivation from Dataflow Graphs. J. Signal Process. Syst. Scott Fischaber, Roger F. Woods, John McAllister
2009	—	`conf`	Evolutionary requirements for next-generation dataflow-based FPGA system design. EUSIPCO John McAllister
2008	—	`conf`	Introduction to System Level Design for Heterogeneous Systems. SAMOS John McAllister
2008	—	`conf`	Memory-Centric Hardware Synthesis from Dataflow Models. SAMOS Scott Fischaber, John McAllister, Roger F. Woods
2008	Misc	`conf`	Modified givens rotations and their application to matrix inversion. ICASSP Lei Ma, Kevin Dickson, John McAllister, John V. McCanny
2008	B	`conf`	Power efficient DSP datapath configuration methodology for FPGA. FPL Stephen McKeown, Roger F. Woods, John McAllister
2008	—	`conf`	Power efficient dynamic-range utilisation for DSP on FPGA. SiPS Stephen McKeown, Roger F. Woods, John McAllister
2008	—	`conf`	Reduced-complexity MSGR-based matrix inversion. SiPS Lei Ma, Kevin Dickson, John McAllister, John V. McCanny, Mathini Sellathurai
2007	J	`jnl`	Design Methodology for Real-Time FPGA-Based Sound Synthesis. IEEE Trans. Signal Process. Erdem Motuk, Roger F. Woods, Stefan Bilbao, John McAllister
2007	J	`jnl`	Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms. J. Syst. Archit. John McAllister, Roger F. Woods, Scott Fischaber, E. Malins
2007	—	`conf`	SOC Memory Hierarchy Derivation from Dataflow Graphs. SiPS Scott Fischaber, Roger F. Woods, John McAllister
2006	—	`conf`	Muir Hardware Synthesis for Multimedia Applications. ESTIMedia Scott Fischaber, John McAllister, Roger F. Woods, E. Malins
2006	J	`jnl`	Multidimensional DSP Core Synthesis for FPGA. J. VLSI Signal Process. John McAllister, Roger F. Woods, Richard L. Walke, Darren Gerard Reilly
2005	Misc	`conf`	Core-Based Methodology: An Automated Approach for Implementing a Complete System from Algorithms to a Heterogeneous Network including FPGAs. FCCM Jasmine Lam, John McAllister, Jennifer Dudley
2005	—	`conf`	FPGA Core Network Implementation and Optimization: A Case Study. FPT Scott Fischaber, R. Hasson, John McAllister, Roger F. Woods
2005	—	`conf`	Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms. SAMOS John McAllister, Roger F. Woods, Darren Gerard Reilly, Scott Fischaber, R. Hasson
2005	—	`conf`	Rapid generation of hardware functionality in heterogeneous platforms [FPGA implementation applications]. ICASSP (5) Darren Gerard Reilly, Roger F. Woods, John McAllister, Richard L. Walke
2004	—	`conf`	Embedded Context Aware Hardware Component Generation for Dataflow System Exploration. SAMOS John McAllister, Roger F. Woods, Richard L. Walke