John K. DeBrosse

11 papers Journal 10Unranked 1
YearRankTypeTitle / Venue / Authors
2015 — conf
A fully-functional 90nm 8Mb STT MRAM demonstrator featuring trimmed, reference cell-based sensing.
CICC
John K. DeBrosse, Thomas M. Maffitt, Yutaka Nakamura, Guenole Jan, Po-Kang Wang
2006 J jnl
Design considerations for MRAM.
IBM J. Res. Dev.
Thomas M. Maffitt, John K. DeBrosse, John A. Gabric, Earl T. Gow, Mark C. Lamorey, John S. Parenteau, Dennis R. Willmott, Mark A. Wood, William J. Gallagher
2005 J jnl
A 16-Mb MRAM featuring bootstrapped write drivers.
IEEE J. Solid State Circuits
Dietmar Gogl, Christian Arndt, John C. Barwin, Alexander Bette, John K. DeBrosse, Earl T. Gow, Heinz Hoenigschmid, Stefan Lammers, Mark C. Lamorey, Yu Lu, Tom Maffitt, Kim Maloney, Werner Obermaier, Andre Sturm, Hans Viehmann, Dennis R. Willmott, Mark A. Wood, William J. Gallagher, Gerhard Mueller, Arkalgud R. Sitaram
2004 J jnl
A high-speed 128-kb MRAM core for future universal memory applications.
IEEE J. Solid State Circuits
John K. DeBrosse, Dietmar Gogl, Alexander Bette, Heinz Hoenigschmid, Raphael Robertazzi, Christian Arndt, Daniel Braun, D. Casarotto, Robert Havreluk, Stefan Lammers, Werner Obermaier, William R. Reohr, Hans Viehmann, William J. Gallagher, Gerhard Müller
2002 J jnl
Challenges and future directions for the scaling of dynamic random-access memory (DRAM).
IBM J. Res. Dev.
Jack A. Mandelman, Robert H. Dennard, Gary B. Bronner, John K. DeBrosse, Rama Divakaruni, Yujun Li, Carl J. Raden
2000 J jnl
A 7F
IEEE J. Solid State Circuits
Heinz Hoenigschmid, Alexander Frey, John K. DeBrosse, Toshiaki Kirihata, Gerhard Mueller, Daniel W. Storaska, Gabriel Daniel, Gerd Frankowsky, Kevin P. Guay, David R. Hanson, Louis Lu-Chen Hsu, Brian Ji, Dmitry G. Netis, Steve Panaroni, Carl Radens, Armin M. Reith, Hartmud Terletzki, Oliver Weinfurtner, Johann Alsmeier, Werner Weber, Matthew R. Wordeman
1998 J jnl
A 220-mm
IEEE J. Solid State Circuits
Toshiaki Kirihata, Martin Gall, Kohji Hosokawa, Jean-Marc Dortu, Hing Wong, Peter Pfefferl, Brian L. Ji, Oliver Weinfurtner, John K. DeBrosse, Hartmud Terletzki, Manfred Selz, Wayne Ellis, Matthew R. Wordeman, Oliver Kiehl
1997 J jnl
Flexible test mode approach for 256-Mb DRAM.
IEEE J. Solid State Circuits
Toshiaki Kirihata, Hing Wong, John K. DeBrosse, Yohji Watanabe, Takahiko Hara, Munehiro Yoshida, Matthew R. Wordeman, Shuso Fujii, Yoshiaki Asao, Bo Krsnik
1996 J jnl
A 286 mm
IEEE J. Solid State Circuits
Yohji Watanabe, Ring Wong, Toshiaki Kirihata, Daisuke Kato, John K. DeBrosse, Takahiko Rara, Munehiro Yoshida, Rideo Mukai, Khandker N. Quader, Takeshi Nagai, Peter Poechmueller, Peter Pfefferl, Matthew R. Wordeman, Shuso Fujii
1996 J jnl
Fault-tolerant designs for 256 Mb DRAM.
IEEE J. Solid State Circuits
Toshiaki Kirihata, Yohji Watanabe, Hing Wong, John K. DeBrosse, Munehiro Yoshida, Daisuke Kato, Shuso Fujii, Matthew R. Wordeman, Peter Poechmueller, Stephen A. Parke, Yoshiaki Asao
1995 J jnl
The evolution of IBM CMOS DRAM technology.
IBM J. Res. Dev.
Eric Adler, John K. DeBrosse, Stephen F. Geissler, Steven J. Holmes, Mark D. Jaffe, Jeffrey B. Johnson, Charles W. Koburger III, Jerome B. Lasky, Brian Lloyd, Glen L. Miles, James S. Nakos, Wendell P. Noble Jr., Steven H. Voldman, Michael Armacost, Richard Ferguson