John J. Granacki

14 papers A* 3A 2B 1C 3Unranked 5

Year	Rank	Type	Title / Venue / Authors
2014	—	`conf`	Implementing spiking neuron model and spike-timing-dependent plasticity with generalized Laguerre-Volterra models. EMBC Dong Song, Brian S. Robinson, John J. Granacki, Theodore W. Berger
2011	—	`conf`	Restorative encoding memory integrative neural device: "REMIND". EMBC Robert E. Hampson, Vasilis Z. Marmarelis, Dae C. Shin, Greg A. Gerhardt, Dong Song, Rosa H. M. Chan, A. J. Sweatt, John J. Granacki, Theodore W. Berger, Sam A. Deadwyler
2007	C	`conf`	A Novel Variable-Gain Micro-Power Band-Pass Auto-Zeroing CMOS Amplifier. ISCAS Chiu-Hsien Chan, Jack Wills, Jeff LaCoss, John J. Granacki, John Choma Jr.
2007	C	`conf`	Novel Charge-Metering Stimulus Amplifier for Biomimetic Implantable Prosthesis. ISCAS Xiang Fang, Jack Wills, John J. Granacki, Jeff LaCoss, Artak Arakelian, James D. Weiland
2006	—	`conf`	VLSI Implementation of a Nonlinear Neuronal Model: A "Neural Prosthesis" to Restore Hippocampal Trisynaptic Dynamics. EMBC Min-Chi Hsiao, Chiu-Hsien Chan, Vijay Srinivasan, Ashish Ahuja, Gopal Erinjippurath, Theodoros P. Zanos, Ghassan I. Gholmieh, Dong Song, Jack Wills, Jeff LaCoss, Spiros H. Courellis, Armand R. Tanguay, John J. Granacki, Vasilis Z. Marmarelis, Theodore W. Berger
2005	B	`conf`	Implantable biomimetic electronics as neural prostheses for lost cognitive function. IJCNN Theodore W. Berger, John J. Granacki, Vasilis Z. Marmarelis, Armand R. Tanguay Jr., Sam A. Deadwyler, Greg A. Gerhardt
2002	A	`conf`	The architecture of the DIVA processing-in-memory chip. ICS Jeffrey T. Draper, Jacqueline Chame, Mary W. Hall, Craig S. Steele, Tim Barrett, Jeff LaCoss, John J. Granacki, Jaewook Shin, Chun Chen, Chang Woo Kang, Ihn Kim Gokhan
1999	—	`conf`	DEFACTO: A Design Environment for Adaptive Computing Technology. IPPS/SPDP Workshops Kiran Bondalapati, Pedro C. Diniz, Phillip Duncan, John J. Granacki, Mary W. Hall, Rajeev Jain, Heidi E. Ziegler
1999	A	`conf`	Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture. SC Mary W. Hall, Peter M. Kogge, Jefferey G. Koller, Pedro C. Diniz, Jacqueline Chame, Jeff Draper, Jeff LaCoss, John J. Granacki, Jay B. Brockman, Apoorv Srivastava, William C. Athas, Vincent W. Freeh, Jaewook Shin, JoonSeok Park
1996	—	`conf`	Estimation of the number of routing layers and total wirelength in a PCB through wiring distribution analysis. EURO-DAC Ivan Hom, John J. Granacki
1988	C	`conf`	Representation of control and timing behavior with applications to interface synthesis. ICCD Sally A. Hayati, Alice C. Parker, John J. Granacki
1987	A*	`conf`	Phrasal Analysis of Long Noun Sequences. ACL Yigal Arens, John J. Granacki, Alice C. Parker
1985	A*	`conf`	The ADAM advanced design automation system: overview, planner and natural language interface. DAC John J. Granacki, David Knapp, Alice C. Parker
1983	A*	`conf`	The effect of register-transfer design tradeoffs on chip area and performance. DAC John J. Granacki, Alice C. Parker