Johannes Zeppenfeld

17 papers A 3C 4Unranked 6
YearRankTypeTitle / Venue / Authors
2012 C conf
A low-overhead monitoring ring interconnect for MPSoC parameter optimization.
DDECS
Abdelmajid Bouajila, Abdallah Lakhtel, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf
2011 C conf
An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors.
DDECS
Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf
2011 — ch.
Applying ASoC to Multi-core Applications for Workload Management.
Organic Computing
Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf
2011 — conf
Applying autonomic principles for workload management in multi-core systems on chip.
ICAC
Johannes Zeppenfeld, Andreas Herkersdorf
2011 — ch.
Autonomic System on Chip Platform.
Organic Computing
Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf
2011 — ch.
Combining Software and Hardware LCS for Lightweight On-chip Learning.
Organic Computing
Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel
2011 — ch.
Hardware Support for Efficient Resource Utilization in Manycore Processor Systems.
Multiprocessor System-on-Chip
Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld
2010 A conf
A rapid prototyping system for error-resilient multi-processor systems-on-chip.
DATE
Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich
2010 — conf
Autonomic Workload Management for Multi-core Processor Systems.
ARCS
Johannes Zeppenfeld, Andreas Herkersdorf
2010 — conf
Combining Software and Hardware LCS for Lightweight On-Chip Learning.
DIPES/BICC
Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel
2010 — conf
Towards Scalability and Reliability of Autonomic Systems on Chip.
ISORC Workshops
Johannes Zeppenfeld, Abdelmajid Bouajila, Andreas Herkersdorf, Walter Stechele
2008 — conf
Learning Classifier Tables for Autonomic Systems on Chip.
GI Jahrestagung (2)
Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf
2008 — conf
System Level Simulation of Autonomic SoCs with TAPES.
ARCS
Andreas Lankes, Thomas Wild, Johannes Zeppenfeld
2007 A conf
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration.
IPDPS
Christopher Claus, Florian Helmut Müller, Johannes Zeppenfeld, Walter Stechele
2007 C conf
Power Estimation of Time Variant SoCs with TAPES.
DSD
Andreas Lankes, Thomas Wild, Johannes Zeppenfeld
2007 A conf
Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system.
DATE
Christopher Claus, Johannes Zeppenfeld, Florian Helmut Müller, Walter Stechele
2006 C conf
Organic Computing at the System on Chip Level.
VLSI-SoC
Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel