Johann Knechtel

146 papers A* 5A 11C 8Misc 2Journal 90Unranked 29

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	Benchmarking Continual Learning on Netlists with Circuit-Targeted Graph Neural Networks. ASP-DAC Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu
2026	J	`jnl`	Focus Session: LLM4PQC - An Agentic Framework for Accurate and Efficient Synthesis of PQC Cores. CoRR Buddhi Perera, Zeng Wang, Weihua Xiao, Mohammed Nabeel, Ozgur Sinanoglu, Johann Knechtel, Ramesh Karri
2026	J	`jnl`	GUIDE: GenAI Units In Digital Design Education. CoRR Weihua Xiao, Jason Blocklove, Matthew DeLorenzo, Johann Knechtel, Ozgur Sinanoglu, Kanad Basu, Jeyavijayan Rajendran, Siddharth Garg, Ramesh Karri
2026	J	`jnl`	Graph Neural Networks for Integrated Circuit Design, Reliability, and Security: Survey and Tool. ACM Comput. Surv. Ziad El Sayed, Zeng Wang, Hana Selmani, Johann Knechtel, Ozgur Sinanoglu, Lilas Alrahis
2026	—	`conf`	Invited: From Evolutionary Algorithms to Analog Design, Electromigration, 3D Integration, and Beyond: On Jens Lienig's Contributions to Advance Physical Design. ISPD Johann Knechtel, Susann Rothe, Robert Fischbach, Matthias Thiele, Tilo Meister, Andreas Krinke
2026	—	`conf`	LLM-Driven Python-to-Rust Translation for Efficient and Safe Code for Neural Networks: llm4py2rs. ICISSP (2) Rupesh Raj Karn, Johann Knechtel, Siddharth Garg, Ramesh Karri, Ozgur Sinanoglu
2026	J	`jnl`	Synthesis-in-the-Loop Evaluation of LLMs for RTL Generation: Quality, Reliability, and Failure Modes. CoRR Weimin Fu, Zeng Wang, Minghao Shao, Ramesh Karri, Muhammad Shafique, Johann Knechtel, Ozgur Sinanoglu, Xiaolong Guo
2026	J	`jnl`	TroLLoc: Security Closure against Hardware Trojans by Logic Locking and Layout Hardening. J. Hardw. Syst. Secur. Fangzhou Wang, Qijing Wang, Lilas Alrahis, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Ozgur Sinanoglu, Tsung-Yi Ho, Evangeline F. Y. Young, Johann Knechtel
2026	J	`jnl`	TrojanGYM: A Detector-in-the-Loop LLM for Adaptive RTL Hardware Trojan Insertion. CoRR Saideep Sreekumar, Zeng Wang, Akashdeep Saha, Weihua Xiao, Minghao Shao, Muhammad Shafique, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel
2025	—	`conf`	Backdoor Attack Detection in Decision Tree Classifiers Using SHAP Explainability. CAI Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu
2025	J	`jnl`	DEFending Integrated Circuit Layouts. IEEE Trans. Inf. Forensics Secur. Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri
2025	C	`conf`	Educational Framework for Power Side-Channel Attacks on Neural Networks in Embedded Systems. ISCAS Rupesh Raj Karn, Prithwish Basu Roy, Johann Knechtel, Ozgur Sinanoglu
2025	Misc	`conf`	GLLaMoR: Graph-based Logic Locking by Large Language Models for Enhanced Robustness. VTS Akashdeep Saha, Prithwish Basu Roy, Johann Knechtel, Ramesh Karri, Ozgur Sinanoglu, Lilas Alrahis
2025	A*	`conf`	GlitchFHE: Attacking Fully Homomorphic Encryption Using Fault Injection. USENIX Security Symposium Lakshmi Likhitha Mankali, Mohammed Nabeel, Faiq Raees, Michail Maniatakos, Ozgur Sinanoglu, Johann Knechtel
2025	C	`conf`	LLM-Driven Code Generation for Neural Networks on FPGAs: Bridging Python and HLS. ICCD Rupesh Raj Karn, Johann Knechtel, Ramesh Karri, Ozgur Sinanoglu
2025	—	`conf`	Large Language Models (LLMs) for Electronic Design Automation (EDA) : Special Session Paper. SOCC Kangwei Xu, Denis Schwachhofer, Jason Blocklove, Ilia Polian, Peter Domanski, Dirk Pflüger, Siddharth Garg, Ramesh Karri, Ozgur Sinanoglu, Johann Knechtel, Zhuorui Zhao, Ulf Schlichtmann, Bing Li
2025	J	`jnl`	Large Language Models (LLMs) for Electronic Design Automation (EDA). CoRR Kangwei Xu, Denis Schwachhofer, Jason Blocklove, Ilia Polian, Peter Domanski, Dirk Pflüger, Siddharth Garg, Ramesh Karri, Ozgur Sinanoglu, Johann Knechtel, Zhuorui Zhao, Ulf Schlichtmann, Bing Li
2025	C	`conf`	LiCSPA: Lightweight Countermeasure against Static Power Side-Channel Attacks. ISCAS Jitendra Bhandari, Mohammed Nabeel, Likhitha Mankali, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel
2025	J	`jnl`	LockForge: Automating Paper-to-Code for Logic Locking with Multi-Agent Reasoning LLMs. CoRR Akashdeep Saha, Zeng Wang, Prithwish Basu Roy, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri
2025	J	`jnl`	Logic Encryption: This Time for Real. CoRR Rupesh Raj Karn, Lakshmi Likhitha Mankali, Zeng Wang, Saideep Sreekumar, Prithwish Basu Roy, Ozgur Sinanoglu, Lilas Alrahis, Johann Knechtel
2025	—	`conf`	Logic Locking for Random Forests: Securing HDL Design and FPGA Accelerator Implementation. ICISSP (2) Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu
2025	J	`jnl`	NetDeTox: Adversarial and Efficient Evasion of Hardware-Security GNNs via RL-LLM Orchestration. CoRR Zeng Wang, Minghao Shao, Akashdeep Saha, Ramesh Karri, Johann Knechtel, Muhammad Shafique, Ozgur Sinanoglu
2025	J	`jnl`	Netlist whisperer: extensive analysis of circuit leakage using LLMs. J. Cryptogr. Eng. Prithwish Basu Roy, Madhav Nair, Rajat Sadhukhan, Manaar Alam, Johann Knechtel, Hammond Pearce, Debdeep Mukhopadhyay, Ozgur Sinanoglu, Ramesh Karri
2025	A	`conf`	RTL-Breaker: Assessing the Security of LLMs Against Backdoor Attacks on HDL Code Generation. DATE Lakshmi Likhitha Mankali, Jitendra Bhandari, Manaar Alam, Ramesh Karri, Michail Maniatakos, Ozgur Sinanoglu, Johann Knechtel
2025	J	`jnl`	SALAD: Systematic Assessment of Machine Unlearing on LLM-Aided Hardware Design. CoRR Zeng Wang, Minghao Shao, Rupesh Raj Karn, Likhitha Mankali, Jitendra Bhandari, Ramesh Karri, Ozgur Sinanoglu, Muhammad Shafique, Johann Knechtel
2025	—	`conf`	SALAD: Systematic Assessment of Machine Unlearning on LLM-Aided Hardware Design. MLCAD Zeng Wang, Minghao Shao, Rupesh Raj Karn, Likhitha Mankali, Jitendra Bhandari, Ramesh Karri, Ozgur Sinanoglu, Muhammad Shafique, Johann Knechtel
2025	—	`ed.`	Security, Privacy, and Applied Cryptography Engineering - 14th International Conference, SPACE 2024, Kottayam, India, December 14-17, 2024, Proceedings SPACE Johann Knechtel, Urbi Chatterjee, Domenic Forte
2025	J	`jnl`	Targeted Wearout Attacks in Microprocessor Cores. CoRR Joshua Mashburn, Johann Knechtel, Florian Klemme, Hussam Amrouch, Ozgur Sinanoglu, Paul V. Gratz
2025	J	`jnl`	Trojan Insertion versus Layout Defenses for Modern ICs: Red-versus-Blue Teaming in a Competitive Community Effort. IACR Trans. Cryptogr. Hardw. Embed. Syst. Johann Knechtel, Mohammad Eslami, Peng Zou, Min Wei, Xingyu Tong, Binggang Qiu, Zhijie Cai, Guohao Chen, Benchao Zhu, Jiawei Li, Jun Yu, Jianli Chen, Chun-Wei Chiu, Min-Feng Hsieh, Chia-Hsiu Ou, Ting-Chi Wang, Bangqi Fu, Qijing Wang, Yang Sun, Qin Luo, Anthony W. H. Lau, Fangzhou Wang, Evangeline F. Y. Young, Shunyang Bi, Guangxin Guo, Haonan Wu, Zhengguang Tang, Hailong You, Cong Li, Ramesh Karri, Ozgur Sinanoglu, Samuel Pagliarini
2025	J	`jnl`	TrojanLoC: LLM-based Framework for RTL Trojan Localization. CoRR Weihua Xiao, Zeng Wang, Minghao Shao, Raghu Vamshi Hemadri, Ozgur Sinanoglu, Muhammad Shafique, Johann Knechtel, Siddharth Garg, Ramesh Karri
2025	—	`conf`	Unlearning in Decision Tree Classifiers and Microcontroller Implementations. CAI Rupesh Raj Karn, Prithwish Basu Roy, Johann Knechtel, Ozgur Sinanoglu
2025	J	`jnl`	VeriContaminated: Assessing LLM-Driven Verilog Coding for Data Contamination. CoRR Zeng Wang, Minghao Shao, Jitendra Bhandari, Likhitha Mankali, Ramesh Karri, Ozgur Sinanoglu, Muhammad Shafique, Johann Knechtel
2025	J	`jnl`	VeriLeaky: Navigating IP Protection vs Utility in Fine-Tuning for LLM-Driven Verilog Coding. CoRR Zeng Wang, Minghao Shao, Mohammed Nabeel, Prithwish Basu Roy, Likhitha Mankali, Jitendra Bhandari, Ramesh Karri, Ozgur Sinanoglu, Muhammed Shafique, Johann Knechtel
2025	J	`jnl`	VeriLoC: Line-of-Code Level Prediction of Hardware Design Quality from Verilog Code. CoRR Raghu Vamshi Hemadri, Jitendra Bhandari, Andre Nakkab, Johann Knechtel, Badri P. Gopalan, Ramesh Narayanaswamy, Ramesh Karri, Siddharth Garg
2025	J	`jnl`	Veritas: Deterministic Verilog Code Synthesis from LLM-Generated Conjunctive Normal Form. CoRR Prithwish Basu Roy, Akashdeep Saha, Manaar Alam, Johann Knechtel, Michail Maniatakos, Ozgur Sinanoglu, Ramesh Karri
2024	A	`conf`	ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search. ICCAD Jitendra Bhandari, Animesh Basak Chowdhury, Ozgur Sinanoglu, Siddharth Garg, Ramesh Karri, Johann Knechtel
2024	J	`jnl`	ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search. CoRR Jitendra Bhandari, Animesh Basak Chowdhury, Mohammed Nabeel, Ozgur Sinanoglu, Siddharth Garg, Ramesh Karri, Johann Knechtel
2024	J	`jnl`	Beware Your Standard Cells! On Their Role in Static Power Side-Channel Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jitendra Bhandari, Likhitha Mankali, Mohammed Nabeel, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel
2024	—	`conf`	Code-Based Cryptography for Confidential Inference on FPGAs: An End-to-End Methodology. ISQED Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu
2024	J	`jnl`	Coherence Attacks and Countermeasures in Interposer-based Chiplet Systems. ACM Trans. Archit. Code Optim. Gino A. Chacon, Charles Williams, Johann Knechtel, Ozgur Sinanoglu, Paul V. Gratz, Vassos Soteriou
2024	J	`jnl`	LLM-Aided Testbench Generation and Bug Detection for Finite-State Machines. CoRR Jitendra Bhandari, Johann Knechtel, Ramesh Narayanaswamy, Siddharth Garg, Ramesh Karri
2024	—	`conf`	LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust. ISVLSI Zeng Wang, Lilas Alrahis, Likhitha Mankali, Johann Knechtel, Ozgur Sinanoglu
2024	J	`jnl`	LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust. CoRR Zeng Wang, Lilas Alrahis, Likhitha Mankali, Johann Knechtel, Ozgur Sinanoglu
2024	J	`jnl`	Lightweight Masking Against Static Power Side-Channel Attacks. CoRR Jitendra Bhandari, Mohammed Thari Nabeel, Likhitha Mankali, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel
2024	C	`conf`	MCS-NTT: Multi-Chip System Design for NTT Acceleration. VLSI-SoC Mohammed Nabeel, Homer Gamil, Johann Knechtel, Michail Maniatakos
2024	J	`jnl`	NiLoPher: Breaking a Modern SAT-Hardened Logic-Locking Scheme via Power Analysis Attack. IACR Cryptol. ePrint Arch. Prithwish Basu Roy, Johann Knechtel, Akashdeep Saha, Saideep Sreekumar, Likhitha Mankali, Mohammed Thari Nabeel, Debdeep Mukhopadhyay, Ramesh Karri, Ozgur Sinanoglu
2024	C	`conf`	Obfuscation of FSMs for Secure Outsourcing of Neural Network Inference onto FPGAs. ISCAS Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu
2024	J	`jnl`	Progressive Learning With Recurrent Neural Network for Sequence Classification. IEEE Trans. Circuits Syst. II Express Briefs Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu
2024	J	`jnl`	RTL-Breaker: Assessing the Security of LLMs against Backdoor Attacks on HDL Code Generation. CoRR Lakshmi Likhitha Mankali, Jitendra Bhandari, Manaar Alam, Ramesh Karri, Michail Maniatakos, Ozgur Sinanoglu, Johann Knechtel
2024	—	`conf`	Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection. APCCAS Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri
2024	Misc	`conf`	Selective Forgetting in Task-Progressive Learning Through Machine Unlearning. ICMLC Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu
2024	C	`conf`	The Impact of Logic Synthesis and Technology Mapping on Logic Locking Security. VLSI-SoC Lilas Alrahis, Mohammed Thari Nabeel, Johann Knechtel, Ozgur Sinanoglu
2024	J	`jnl`	TroLLoc: Logic Locking and Layout Hardening for IC Security Closure against Hardware Trojans. CoRR Fangzhou Wang, Qijing Wang, Lilas Alrahis, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Ozgur Sinanoglu, Tsung-Yi Ho, Evangeline F. Y. Young, Johann Knechtel
2024	J	`jnl`	Trojan Insertion versus Layout Defenses for Modern ICs: Red-versus-Blue Teaming in a Competitive Community Effort. IACR Cryptol. ePrint Arch. Johann Knechtel, Mohammad Eslami, Peng Zou, Min Wei, Xingyu Tong, Binggang Qiu, Zhijie Cai, Guohao Chen, Benchao Zhu, Jiawei Li, Jun Yu, Jianli Chen, Chun-Wei Chiu, Min-Feng Hsieh, Chia-Hsiu Ou, Ting-Chi Wang, Bangqi Fu, Qijing Wang, Yang Sun, Qin Luo, Anthony W. H. Lau, Fangzhou Wang, Evangeline F. Y. Young, Shunyang Bi, Guangxin Guo, Haonan Wu, Zhengguang Tang, Hailong You, Cong Li, Ramesh Karri, Ozgur Sinanoglu, Samuel Pagliarini
2023	A*	`conf`	ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning. DAC Animesh Basak Chowdhury, Lilas Alrahis, Luca Collini, Johann Knechtel, Ramesh Karri, Siddharth Garg, Ozgur Sinanoglu, Benjamin Tan
2023	J	`jnl`	ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning. CoRR Animesh Basak Chowdhury, Lilas Alrahis, Luca Collini, Johann Knechtel, Ramesh Karri, Siddharth Garg, Ozgur Sinanoglu, Benjamin Tan
2023	—	`conf`	Benchmarking Advanced Security Closure of Physical Layouts: ISPD 2023 Contest. ISPD Mohammad Eslami, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri, Samuel Pagliarini
2023	J	`jnl`	Beware Your Standard Cells! On Their Role in Static Power Side-Channel Attacks. IACR Cryptol. ePrint Arch. Jitendra Bhandari, Likhitha Mankali, Mohammed Nabeel, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel
2023	J	`jnl`	DEFending Integrated Circuit Layouts. IACR Cryptol. ePrint Arch. Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ramesh Karri
2023	—	`conf`	Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICs. ASP-DAC Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
2023	—	`conf`	Security Closure of IC Layouts Against Hardware Trojans. ISPD Fangzhou Wang, Qijing Wang, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Lilas Alrahis, Ozgur Sinanoglu, Johann Knechtel, Tsung-Yi Ho, Evangeline F. Y. Young
2023	J	`jnl`	Titan: Security Analysis of Large-Scale Hardware Obfuscation Using Graph Neural Networks. IEEE Trans. Inf. Forensics Secur. Likhitha Mankali, Lilas Alrahis, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu
2023	C	`conf`	TrojanSAINT: Gate-Level Netlist Sampling-Based Inductive Learning for Hardware Trojan Detection. ISCAS Hazem Lashen, Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
2023	J	`jnl`	TrojanSAINT: Gate-Level Netlist Sampling-Based Inductive Learning for Hardware Trojan Detection. CoRR Hazem Lashen, Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
2023	—	`conf`	UN-SPLIT: Attacking Split Manufacturing Using Link Prediction in Graph Neural Networks. SPACE Lilas Alrahis, Likhitha Mankali, Satwik Patnaik, Abhrajit Sengupta, Johann Knechtel, Ozgur Sinanoglu
2023	J	`jnl`	VIGILANT: Vulnerability Detection Tool Against Fault-Injection Attacks for Locking Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Likhitha Mankali, Satwik Patnaik, Nimisha Limaye, Johann Knechtel, Ozgur Sinanoglu
2023	—	`conf`	X-Volt: Joint Tuning of Driver Strengths and Supply Voltages Against Power Side-Channel Attacks. ISPD Saideep Sreekumar, Mohammed Ashraf, Mohammed Thari Nabeel, Ozgur Sinanoglu, Johann Knechtel
2022	J	`jnl`	A New Paradigm in Split Manufacturing: Lock the FEOL, Unlock at the BEOL. Cryptogr. Abhrajit Sengupta, Mohammed Nabeel, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
2022	J	`jnl`	A Novel Attack Mode on Advanced Technology Nodes Exploiting Transistor Self-Heating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nikhil Rangarajan, Johann Knechtel, Nimisha Limaye, Ozgur Sinanoglu, Hussam Amrouch
2022	—	`conf`	Benchmarking Security Closure of Physical Layouts: ISPD 2022 Contest. ISPD Johann Knechtel, Jayanth Gopinath, Mohammed Ashraf, Jitendra Bhandari, Ozgur Sinanoglu, Ramesh Karri
2022	J	`jnl`	Concerted Wire Lifting: Enabling Secure and Cost-Effective Split Manufacturing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Satwik Patnaik, Mohammed Ashraf, Haocheng Li, Johann Knechtel, Ozgur Sinanoglu
2022	J	`jnl`	Design-time exploration of voltage switching against power analysis attacks in 14 nm FinFET technology. Integr. Johann Knechtel, Tarek Ashraf, Natascha Fernengel, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Ozgur Sinanoglu, Hussam Amrouch
2022	J	`jnl`	GNN-RE: Graph Neural Networks for Reverse Engineering of Gate-Level Netlists. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Lilas Alrahis, Abhrajit Sengupta, Johann Knechtel, Satwik Patnaik, Hani Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu
2022	J	`jnl`	GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation. CoRR Lilas Alrahis, Johann Knechtel, Florian Klemme, Hussam Amrouch, Ozgur Sinanoglu
2022	J	`jnl`	GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Lilas Alrahis, Johann Knechtel, Florian Klemme, Hussam Amrouch, Ozgur Sinanoglu
2022	J	`jnl`	Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICs. CoRR Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
2022	J	`jnl`	Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems. IEEE Comput. Archit. Lett. Gino A. Chacon, Charles Williams, Johann Knechtel, Ozgur Sinanoglu, Paul V. Gratz
2022	J	`jnl`	Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems. CoRR Gino A. Chacon, Charles Williams, Johann Knechtel, Ozgur Sinanoglu, Paul V. Gratz
2022	J	`jnl`	IsoLock: Thwarting Link-Prediction Attacks on Routing Obfuscation by Graph Isomorphism. IACR Cryptol. ePrint Arch. Shaza Elsharief, Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
2022	J	`jnl`	Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices. IEEE Trans. Emerg. Top. Comput. Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ramesh Karri, Ozgur Sinanoglu, Shaloo Rakheja
2022	—	`conf`	SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture. ISVLSI Nikhil Rangarajan, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Shubham Rai, Gopal Raut, Heba Abunahla, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar, Johann Knechtel, Ozgur Sinanoglu
2022	J	`jnl`	Security Closure of IC Layouts Against Hardware Trojans. CoRR Fangzhou Wang, Qijing Wang, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Lilas Alrahis, Ozgur Sinanoglu, Johann Knechtel, Tsung-Yi Ho, Evangeline F. Y. Young
2022	J	`jnl`	Security Promises and Vulnerabilities in Emerging Reconfigurable Nanotechnology-Based Circuits. IEEE Trans. Emerg. Top. Comput. Shubham Rai, Satwik Patnaik, Ansh Rupani, Johann Knechtel, Ozgur Sinanoglu, Akash Kumar
2022	J	`jnl`	SuperVAULT: Superparamagnetic Volatile Auxiliary Tamper-Proof Storage. IEEE Embed. Syst. Lett. Nikhil Rangarajan, Johann Knechtel, Dinesh Rajasekharan, Ozgur Sinanoglu
2022	J	`jnl`	X-Volt: Joint Tuning of Driver Strengths and Supply Voltages Against Power Side-Channel Attacks. CoRR Saideep Sreekumar, Mohammed Ashraf, Mohammed Nabeel, Ozgur Sinanoglu, Johann Knechtel
2021	J	`jnl`	A Modern Approach to IP Protection and Trojan Prevention: Split Manufacturing for 3D ICs and Obfuscation of Vertical Interconnects. IEEE Trans. Emerg. Top. Comput. Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
2021	J	`jnl`	Deep Learning Analysis for Split-Manufactured Layouts With Routing Perturbation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Haocheng Li, Satwik Patnaik, Mohammed Ashraf, Haoyu Yang, Johann Knechtel, Bei Yu, Ozgur Sinanoglu, Evangeline F. Y. Young
2021	—	`conf`	Hardware Security for and beyond CMOS Technology. ISPD Johann Knechtel
2021	J	`jnl`	Interposer-Based Root of Trust. CoRR Tapojyoti Mandal, Gino Chacon, Johann Knechtel, Ozgur Sinanoglu, Paul Gratz, Vassos Soteriou
2021	A	`conf`	Security Closure of Physical Layouts ICCAD Special Session Paper. ICCAD Johann Knechtel, Jayanth Gopinath, Jitendra Bhandari, Mohammed Ashraf, Hussam Amrouch, Shekhar Borkar, Sung Kyu Lim, Ozgur Sinanoglu, Ramesh Karri
2021	A	`conf`	Toward Security Closure in the Face of Reliability Effects ICCAD Special Session Paper. ICCAD Jens Lienig, Susann Rothe, Matthias Thiele, Nikhil Rangarajan, Mohammed Ashraf, Mohammed Nabeel, Hussam Amrouch, Ozgur Sinanoglu, Johann Knechtel
2021	J	`jnl`	UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking. IEEE Trans. Inf. Forensics Secur. Lilas Alrahis, Satwik Patnaik, Johann Knechtel, Hani Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu
2020	J	`jnl`	2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets. CoRR Mohammed Nabeel, Mohammed Ashraf, Satwik Patnaik, Vassos Soteriou, Ozgur Sinanoglu, Johann Knechtel
2020	J	`jnl`	2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets. IEEE Trans. Computers Mohammed Nabeel, Mohammed Ashraf, Satwik Patnaik, Vassos Soteriou, Ozgur Sinanoglu, Johann Knechtel
2020	J	`jnl`	Attacking Split Manufacturing from a Deep Learning Perspective. CoRR Haocheng Li, Satwik Patnaik, Abhrajit Sengupta, Haoyu Yang, Johann Knechtel, Bei Yu, Evangeline F. Y. Young, Ozgur Sinanoglu
2020	—	`conf`	Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges. ISPD Johann Knechtel
2020	J	`jnl`	Hardware Security for and beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges. CoRR Johann Knechtel
2020	J	`jnl`	Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging. CoRR Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
2020	J	`jnl`	Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
2020	J	`jnl`	Power Side-Channel Attacks in Negative Capacitance Transistor (NCFET). CoRR Johann Knechtel, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Yogesh Singh Chauhan, Jörg Henkel, Ozgur Sinanoglu, Hussam Amrouch
2020	J	`jnl`	Power Side-Channel Attacks in Negative Capacitance Transistor. IEEE Micro Johann Knechtel, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Yogesh Singh Chauhan, Jörg Henkel, Ozgur Sinanoglu, Hussam Amrouch
2020	J	`jnl`	SMART: A Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory. IEEE Access Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
2020	J	`jnl`	Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
2020	A	`conf`	Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. DATE Johann Knechtel, Elif Bilge Kavun, Francesco Regazzoni, Annelie Heuser, Anupam Chattopadhyay, Debdeep Mukhopadhyay, Soumyajit Dey, Yunsi Fei, Yaacov Belenky, Itamar Levi, Tim Güneysu, Patrick Schaumont, Ilia Polian
2020	J	`jnl`	Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. CoRR Johann Knechtel, Elif Bilge Kavun, Francesco Regazzoni, Annelie Heuser, Anupam Chattopadhyay, Debdeep Mukhopadhyay, Soumyajit Dey, Yunsi Fei, Yaacov Belenky, Itamar Levi, Tim Güneysu, Patrick Schaumont, Ilia Polian
2020	J	`jnl`	UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking. CoRR Lilas Alrahis, Satwik Patnaik, Johann Knechtel, Hani Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu
2019	C	`conf`	3D Integration: Another Dimension Toward Hardware Security. IOLTS Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
2019	J	`jnl`	3D Integration: Another Dimension Toward Hardware Security. CoRR Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
2019	J	`jnl`	A Modern Approach to IP Protection and Trojan Prevention: Split Manufacturing for 3D ICs and Obfuscation of Vertical Interconnects. CoRR Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
2019	A	`conf`	A New Paradigm in Split Manufacturing: Lock the FEOL, Unlock at the BEOL. DATE Abhrajit Sengupta, Mohammed Nabeel, Johann Knechtel, Ozgur Sinanoglu
2019	J	`jnl`	A New Paradigm in Split Manufacturing: Lock the FEOL, Unlock at the BEOL. CoRR Abhrajit Sengupta, Mohammed Thari Nabeel, Johann Knechtel, Ozgur Sinanoglu
2019	J	`jnl`	An Interposer-Based Root of Trust: Seize the Opportunity for Secure System-Level Integration of Untrusted Chiplets. CoRR Mohammed Nabeel, Mohammed Ashraf, Satwik Patnaik, Vassos Soteriou, Ozgur Sinanoglu, Johann Knechtel
2019	A*	`conf`	Attacking Split Manufacturing from a Deep Learning Perspective. DAC Haocheng Li, Satwik Patnaik, Abhrajit Sengupta, Haoyu Yang, Johann Knechtel, Bei Yu, Evangeline F. Y. Young, Ozgur Sinanoglu
2019	—	`conf`	Protect Your Chip Design Intellectual Property: An Overview. COINS Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
2019	J	`jnl`	Protect Your Chip Design Intellectual Property: An Overview. CoRR Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
2019	J	`jnl`	SMART: Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory. CoRR Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
2019	J	`jnl`	Spin-Based Reconfigurable Logic for Power- and Area-Efficient Applications. IEEE Des. Test Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
2019	J	`jnl`	Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime. CoRR Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
2019	J	`jnl`	Toward Physically Unclonable Functions from Plasmonics-Enhanced Silicon Disc Resonators. CoRR Johann Knechtel, Jacek Gosciniak, Alabi Bojesomo, Satwik Patnaik, Ozgur Sinanoglu, Mahmoud Rasras
2018	J	`jnl`	Advancing Hardware Security Using Polymorphic and Stochastic Spin-Hall Effect Devices. CoRR Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
2018	A	`conf`	Advancing hardware security using polymorphic and stochastic spin-hall effect devices. DATE Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
2018	J	`jnl`	Best of Both Worlds: Integration of Split Manufacturing and Camouflaging into a Security-Driven CAD Flow for 3D ICs. CoRR Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
2018	A	`conf`	Best of both worlds: integration of split manufacturing and camouflaging into a security-driven CAD flow for 3D ICs. ICCAD Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
2018	J	`jnl`	Concerted Wire Lifting: Enabling Secure and Cost-Effective Split Manufacturing. CoRR Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Ozgur Sinanoglu
2018	—	`conf`	Concerted wire lifting: Enabling secure and cost-effective split manufacturing. ASP-DAC Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Ozgur Sinanoglu
2018	J	`jnl`	Multi-Objective 3D Floorplanning with Integrated Voltage Assignment. ACM Trans. Design Autom. Electr. Syst. Johann Knechtel, Jens Lienig, Ibrahim Abe M. Elfadel
2018	J	`jnl`	Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices. CoRR Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ramesh Karri, Ozgur Sinanoglu, Shaloo Rakheja
2018	—	`conf`	Optimal die placement for interposer-based 3D ICs. ASP-DAC Sergii Osmolovskyi, Johann Knechtel, Igor L. Markov, Jens Lienig
2018	J	`jnl`	Raise Your Game for Split Manufacturing: Restoring the True Functionality Through BEOL. CoRR Satwik Patnaik, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
2018	A*	`conf`	Raise your game for split manufacturing: restoring the true functionality through BEOL. DAC Satwik Patnaik, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
2017	J	`jnl`	Large-Scale 3D Chips: Challenges and Solutions for Design Automation, Testing, and Trustworthy Integration. IPSJ Trans. Syst. LSI Des. Methodol. Johann Knechtel, Ozgur Sinanoglu, Ibrahim Abe M. Elfadel, Jens Lienig, Cliff C. N. Sze
2017	J	`jnl`	Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging. CoRR Satwik Patnaik, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
2017	A	`conf`	Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging. ICCAD Satwik Patnaik, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
2017	A*	`conf`	On Mitigation of Side-Channel Attacks in 3D ICs: Decorrelating Thermal Patterns from Power and Activity. DAC Johann Knechtel, Ozgur Sinanoglu
2017	J	`jnl`	On Mitigation of Side-Channel Attacks in 3D ICs: Decorrelating Thermal Patterns from Power and Activity. CoRR Johann Knechtel, Ozgur Sinanoglu
2017	J	`jnl`	Rethinking Split Manufacturing: An Information-Theoretic Approach with Secure Layout Techniques. CoRR Abhrajit Sengupta, Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Siddharth Garg, Ozgur Sinanoglu
2017	A	`conf`	Rethinking split manufacturing: An information-theoretic approach with secure layout techniques. ICCAD Abhrajit Sengupta, Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Siddharth Garg, Ozgur Sinanoglu
2016	—	`conf`	Physical Design Automation for 3D Chip Stacks: Challenges and Solutions. ISPD Johann Knechtel, Jens Lienig
2015	J	`jnl`	Planning Massive Interconnects in 3-D Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Johann Knechtel, Evangeline F. Y. Young, Jens Lienig
2014	—	`conf`	Structural planning of 3D-IC interconnects by block alignment. ASP-DAC Johann Knechtel, Evangeline F. Y. Young, Jens Lienig
2013	—	`conf`	Integration of thermal management and floorplanning based on three-dimensional layout representations. ICECS Puskar Budhathoki, Johann Knechtel, Andreas Henschel, Ibrahim Abe M. Elfadel
2013	—	`conf`	Utilizing 2D and 3D rectilinear blocks for efficient IP reuse and floorplanning of 3D-integrated systems. ISPD Robert Fischbach, Johann Knechtel, Jens Lienig
2012	J	`jnl`	Assembling 2-D Blocks Into 3-D Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Johann Knechtel, Igor L. Markov, Jens Lienig
2012	A	`conf`	Multiobjective optimization of deadspace, a critical resource for 3D-IC integration. ICCAD Johann Knechtel, Igor L. Markov, Jens Lienig, Matthias Thiele
2011	—	`conf`	Assembling 2D blocks into 3D chips. ISPD Johann Knechtel, Igor L. Markov, Jens Lienig
2011	—	`conf`	Investigating modern layout representations for improved 3d design automation. ACM Great Lakes Symposium on VLSI Robert Fischbach, Jens Lienig, Johann Knechtel