Jizhong Shen

34 papers B 1C 1Journal 28Unranked 4
YearRankTypeTitle / Venue / Authors
2025 J jnl
Algorithm and evaluation of generating pseudo-datasets for integrated circuit power analysis.
Frontiers Inf. Technol. Electron. Eng.
Zejia Lyu, Jizhong Shen, Xi Chen
2025 J jnl
Correction Method for Power Analysis of Digital Integrated Circuits Based on Standard Cells.
J. Circuits Syst. Comput.
Qunlin Li, Zejia Lyu, Jizhong Shen
2025 J jnl
Design of current-mode CMOS Schmitt circuit and research on its electromagnetic interference immunity.
Microelectron. J.
Fangjun Liu, Jizhong Shen
2024 J jnl
An efficient algorithm for estimating gate-level power consumption in large-scale integrated circuits.
Microelectron. J.
Zejia Lyu, Jizhong Shen
2024 J jnl
Research on electromagnetic interference resistance performance of three kinds of CMOS inverters.
Frontiers Inf. Technol. Electron. Eng.
Fangjun Liu, Jiaming Shen, Jizhong Shen
2024 J jnl
Symbolic-functional representation inference for gate-level power estimation.
Microelectron. J.
Zejia Lyu, Jizhong Shen
2023 J jnl
Design of current steering logic CMOS circuit.
Microelectron. J.
Jiaming Shen, Fangjun Liu, Jizhong Shen
2022 C conf
FreSCo: Frequency-Domain Scan Context for LiDAR-based Place Recognition with Translation and Rotation Invariance.
ICARCV
Yongzhi Fan, Xin Du, Lun Luo, Jizhong Shen
2022 J jnl
FreSCo: Frequency-Domain Scan Context for LiDAR-based Place Recognition with Translation and Rotation Invariance.
CoRR
Yongzhi Fan, Xin Du, Jizhong Shen
2022 J jnl
Localization of seizure onset zone with epilepsy propagation networks based on graph convolutional network.
Biomed. Signal Process. Control.
Xiaochen Liu, Lingli Hu, Shuang Wang, Jizhong Shen
2021 J jnl
Low-rate DoS attack detection method based on hybrid deep neural networks.
J. Inf. Secur. Appl.
Congyuan Xu, Jizhong Shen, Xin Du
2020 J jnl
A Method of Few-Shot Network Intrusion Detection Based on Meta-Learning Framework.
IEEE Trans. Inf. Forensics Secur.
Congyuan Xu, Jizhong Shen, Xin Du
2020 J jnl
Web page classification based on heterogeneous features and a combination of multiple classifiers.
Frontiers Inf. Technol. Electron. Eng.
Li Deng, Xin Du, Jizhong Shen
2019 J jnl
Detection method of domain names generated by DGAs based on semantic representation and deep neural network.
Comput. Secur.
Congyuan Xu, Jizhong Shen, Xin Du
2019 — conf
P300-based deception detection of mock network fraud with modified genetic algorithm and combined classification.
BCI
Xiaochen Liu, Jizhong Shen, Wufeng Zhao
2018 J jnl
An Intrusion Detection System Using a Deep Neural Network With Gated Recurrent Units.
IEEE Access
Congyuan Xu, Jizhong Shen, Xin Du, Fan Zhang
2017 J jnl
An algorithm for identifying symmetric variables based on the order eigenvalue matrix.
Frontiers Inf. Technol. Electron. Eng.
Xiao-Hua Li, Jizhong Shen
2017 J jnl
Function synthesis algorithm based on RTD-based three-variable universal logic gates.
Frontiers Inf. Technol. Electron. Eng.
Maoqun Yao, Kai Yang, Jizhong Shen, Congyuan Xu
2017 — conf
Improved low-entropy masking scheme for LED with mitigation against correlation-enhanced collision attacks.
AsianHOST
Fan Zhang, Liang Geng, Jizhong Shen, Shivam Bhasin, Xinjie Zhao, Shize Guo
2017 J jnl
Transistor level SCA-resistant scheme based on fluctuating power logic.
Sci. China Inf. Sci.
Liang Geng, Fan Zhang, Jizhong Shen, Wei He, Shivam Bhasin, Xinjie Zhao, Shize Guo
2016 J jnl
An Algorithm for Identifying Symmetric Variables in the Canonical Reed-Muller Algebra System.
J. Circuits Syst. Comput.
Xiaohua Li, Jizhong Shen
2016 J jnl
Design of flip-flops with clock-gating and pull-up control scheme for power-constrained and speed-insensitive applications.
IET Comput. Digit. Tech.
Liang Geng, Jizhong Shen, Congyuan Xu
2016 J jnl
Power-efficient dual-edge implicit pulse-triggered flip-flop with an embedded clock-gating scheme.
Frontiers Inf. Technol. Electron. Eng.
Liang Geng, Jizhong Shen, Congyuan Xu
2015 J jnl
Design of a novel RTD-based three-variable universal logic gate.
Frontiers Inf. Technol. Electron. Eng.
Maoqun Yao, Kai Yang, Congyuan Xu, Jizhong Shen
2015 J jnl
Function Synthesis Algorithm of RTD-Based Universal Threshold Logic Gate.
J. Appl. Math.
Maoqun Yao, Kai Yang, Congyuan Xu, Jizhong Shen
2012 J jnl
Design of nanopipelined adder based on resonant tunneling diode.
Microelectron. J.
Yi Wei, Jizhong Shen
2011 J jnl
Design of a novel low power 8-transistor 1-bit full adder cell.
J. Zhejiang Univ. Sci. C
Yi Wei, Jizhong Shen
2011 J jnl
Novel universal threshold logic gate based on RTD and its application.
Microelectron. J.
Yi Wei, Jizhong Shen
2005 B conf
Circuit implementation of multi-thresholded neuron (MTN) using BiCMOS technology.
IJCNN
Xiaolei Zhu, Jizhong Shen, Baoyong Chi, Zhihua Wang
1996 J jnl
Fuzzy Language on Free Monoid.
Inf. Sci.
Jizhong Shen
1995 — conf
Race-Hazard and Skip-Hazard in Multivalued Combinational Circuits.
ISMVL
Xunwei Wu, Xiexiong Chen, Jizhong Shen
1993 J jnl
Fuzzifying groups based on complete residuated lattice-valued logic.
Inf. Sci.
Jizhong Shen
1992 — conf
Fuzzifying Topological Groups Based on Completely Distributive Residuated Lattice-Valued Logic (I).
ISMVL
Jizhong Shen
1990 J jnl
On fuzzy regular subsemigroups of a semigroup.
Inf. Sci.
Jizhong Shen