Jizeng Wei - RankMe

38 papers B 4C 1Misc 1Journal 19Unranked 13

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	3D-DP: A Practical DRL-Based Data Prefetcher with a Dynamic Prefetch Degree and Direction. ICA3PP (1) Yafei Zhao, Jizeng Wei, Shuangsheng Li, Yaogong Yang
2025	—	`conf`	CTIA: Optimizing Requests Processing by Comparing Tags in Advance for L2 Caches in GPUs. HP3C Bingchao Li, Yuchen Zhu, Xiaohui Li, Jizeng Wei
2025	J	`jnl`	Energy-Efficient Branch Predictor via Instruction Block Type Prediction in Decoupled Frontend. IET Comput. Digit. Tech. Zilin Li, Jizeng Wei, Shuangsheng Li, Yaogong Yang
2025	—	`conf`	SAHSCM: Self-activating and High-Speed Cryptographic Module for SATA Bridge Systems. APWeb-WAIM (2) Yuxi Sun, Jizeng Wei, Chengqiang Zong, Tie Li, Suyan Zhu, Hui Du
2025	J	`jnl`	Solving Online Resource-Constrained Scheduling for Follow-Up Observation in Astronomy: a Reinforcement Learning Approach. CoRR Yajie Zhang, Ce Yu, Chao Sun, Jizeng Wei, Junhan Ju, Shanjiang Tang
2025	J	`jnl`	Solving online resource-constrained scheduling for follow-up observation in astronomy: A reinforcement learning approach. Future Gener. Comput. Syst. Yajie Zhang, Ce Yu, Chao Sun, Jizeng Wei, Junhan Ju, Shanjiang Tang
2025	J	`jnl`	XY-Cut++: Advanced Layout Ordering via Hierarchical Mask Mechanism on a Novel Benchmark. CoRR Shuai Liu, Youmeng Li, Jizeng Wei
2024	J	`jnl`	GRMD: A Two-Stage Design Space Exploration Strategy for Customized RNN Accelerators. Symmetry Qingpeng Li, Jian Xiao, Jizeng Wei
2022	—	`conf`	REMOC: efficient request managements for on-chip memories of GPUs. CF Bingchao Li, Jizeng Wei
2021	J	`jnl`	Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures. Microprocess. Microsystems Bingchao Li, Jizeng Wei, Nam Sung Kim
2020	J	`jnl`	A Real-Time Naive Bayes Classifier Accelerator on FPGA. IEEE Access Zhen Xue, Jizeng Wei, Wei Guo
2019	B	`conf`	A Systematic Approach to Horizontal Clustering Analysis on Embedded RSA Implementation. ICPADS Fanyu Shi, Jizeng Wei, Dazhi Sun, Guo Wei
2019	J	`jnl`	An Efficient GPU Cache Architecture for Applications with Irregular Memory Access Patterns. ACM Trans. Archit. Code Optim. Bingchao Li, Jizeng Wei, Jizhou Sun, Murali Annavaram, Nam Sung Kim
2019	J	`jnl`	Highly-parallel hardware implementation of optimal ate pairing over Barreto-Naehrig curves. Integr. Tengfei Wang, Wei Guo, Jizeng Wei
2018	J	`jnl`	Practical chosen-message CPA attack on message blinding exponentiation algorithm and its efficient countermeasure. World Wide Web Hui Wang, Wei Guo, Jizeng Wei
2017	—	`conf`	A High Efficient Control Flow Authentication Method Basing on Loop Isolation. NCCET Qingran Wang, Wei Guo, Dazhi Sun, Jizeng Wei
2017	—	`conf`	Malware Detection with Convolutional Neural Network Using Hardware Events. NCCET Wei Guo, Tenghai Wang, Jizeng Wei
2016	—	`conf`	Dual Processing Engine Architecture to Speed Up Optimal Ate Pairing on FPGA Platform. Trustcom/BigDataSE/ISPA Zhongyuan Hao, Wei Guo, Jizeng Wei, Dazhi Sun
2016	J	`jnl`	Exploring new features of high-bandwidth memory for GPUs. IEICE Electron. Express Bingchao Li, Choungki Song, Jizeng Wei, Jung Ho Ahn, Nam Sung Kim
2016	—	`conf`	Micro-architectural Features for Malware Detection. ACA Huicheng Peng, Jizeng Wei, Wei Guo
2016	—	`conf`	SecPage - A Lightweight Memory Protection Architecture. Trustcom/BigDataSE/ISPA Kaiyuan Liang, Yanzhao Feng, Jizeng Wei, Wei Guo
2015	J	`jnl`	A modified post-TnL vertex cache for the multi-shader embedded GPUs. IEICE Electron. Express Jizeng Wei, Yisong Chang, Bingchao Li, Wei Guo, Jizhou Sun
2015	J	`jnl`	An Area-Efficient Unified Architecture for Multi-Functional Double-Precision Floating-Point Computation. J. Circuits Syst. Comput. Wei Guo, Kwanghyok Ri, Luping Cui, Jizeng Wei
2015	B	`conf`	Analyzing graphics processor unit (GPU) instruction set architectures. ISPASS Kothiya Mayank, Hongwen Dai, Jizeng Wei, Huiyang Zhou
2015	J	`jnl`	Design optimization for capacitive-resistively driven on-chip global interconnect. IEICE Electron. Express Jianfei Jiang, Weifeng He, Jizeng Wei, Qin Wang, Zhigang Mao
2015	J	`jnl`	Fast and Generic Inversion Architectures Over GF(2 IEEE Trans. Circuits Syst. II Express Briefs Jingwei Hu, Wei Guo, Jizeng Wei, Ray C. C. Cheung
2014	J	`jnl`	A low-time-complexity and secure dual-field scalar multiplication based on co-Z protected NAF. IEICE Electron. Express Jizeng Wei, Xulong Liu, Hao Liu, Wei Guo
2014	Misc	`conf`	Further Research on N-1 Attack against Exponentiation Algorithms. ACISP Zhaojing Ding, Wei Guo, Liangjian Su, Jizeng Wei, Haihua Gu
2014	B	`conf`	The Micro-architectural Support Countermeasures against the Branch Prediction Analysis Attack. TrustCom Ya Tan, Jizeng Wei, Wei Guo
2013	J	`jnl`	A TTA-like Processor for Fast RSA Key Generation Using RNS. J. Comput. Wei Guo, Jingwei Hu, Jizeng Wei
2013	—	`conf`	A Unified Cryptographic Processor for RSA and ECC in RNS. NCCET Jizeng Wei, Wei Guo, Hao Liu, Ya Tan
2013	J	`jnl`	A high performance, area efficient TTA-like vertex shader architecture with optimized floating point arithmetic unit for embedded graphics applications. Microprocess. Microsystems Yisong Chang, Jizeng Wei, Wei Guo, Jizhou Sun
2013	J	`jnl`	A scalable RNS Montgomery multiplier over F IEICE Electron. Express Jingwei Hu, Wei Guo, Jizeng Wei, Ray C. C. Cheung
2011	—	`conf`	A Novel Architecture for Fast RSA Key Generation Based on RNS. PAAP Jingwei Hu, Wei Guo, Jizeng Wei, Yisong Chang, Dazhi Sun
2011	B	`conf`	An Efficient Stereoscopic Game Conversion System for Embedded Platform. TrustCom Hao Liu, Wei Guo, Chao Lu, Jizeng Wei
2011	C	`conf`	An optimized TTA-like vertex shader datapath for embedded 3D graphics processing unit. VLSI-SoC Jizeng Wei, Yisong Chang, Wei Guo, Jizhou Sun
2009	—	`conf`	Design of a Configurable and Extensible Tcore Processor Based on Transport Triggered Architecture. CSIE (3) Wei Guo, Jizeng Wei, Yongbin Yao, Zaifeng Shi, Su Wang
2008	—	`conf`	Design and implementation of co-design toolset for tcore processor. APCCAS Jizeng Wei, Wei Guo, Jizhou Sun, Zaifeng Shi