Jiyong Woo

22 papers C 4Journal 10Unranked 8
YearRankTypeTitle / Venue / Authors
2025 — conf
Comprehensive Reliability Assessment of WOx Engineering for Temperature-Resilient HfZrO2 FeCAP.
IRPS
Eunjin Kim, Hyoungjin Park, Jiae Jeong, Seokjae Lim, Jiyong Woo
2025 — conf
Impact of Non-ideal Reliability Characteristics of SiOx p-Bit for Complex Optimization Problem Solver.
IRPS
Jihyun Kim, Hyeonsik Choi, Jiyong Woo
2025 J jnl
Investigating the Impact of p-Bit Non-Idealities on Solving Complex Optimization Problems.
IEEE Access
Jihyun Kim, Hyeonsik Choi, Jiyong Woo
2025 J jnl
Optimizing electrochemical and ferroelectric synaptic devices: from material selection to performance tuning.
Neuromorph. Comput. Eng.
Eunjin Kim, Seonuk Jeon, Hyoungjin Park, Jiae Jeong, Hyeonsik Choi, Yunsur Kim, Jihyun Kim, Seokjae Lim, Kibong Moon, Jiyong Woo
2025 — conf
Reliability-Ensured and Fast (xRRAM.
IRPS
Yunsur Kim, Seonuk Jeon, Seokjae Lim, Jiyong Woo
2025 J jnl
Ultrathin (<10 nm) Electrochemical Random-Access Memory that Overcomes the Tradeoff between Robust Weight Update and Speed in Neuromorphic Systems.
Adv. Intell. Syst.
Seonuk Jeon, Seokjae Lim, Nir Tessler, Jiyong Woo
2025 J jnl
Ultrathin (<10 nm) Electrochemical Random-Access Memory that Overcomes the Tradeoff between Robust Weight Update and Speed in Neuromorphic Systems.
Adv. Intell. Syst.
Seonuk Jeon, Seokjae Lim, Nir Tessler, Jiyong Woo
2024 J jnl
Improvement of the Symmetry and Linearity of Synaptic Weight Update by Combining the InGaZnO Synaptic Transistor and Memristor.
IEEE Access
Tae Jun Yang, Jung Rae Cho, Hyunkyu Lee, Hee Jun Lee, Seung Joo Myoung, Da Yeon Lee, Sung-Jin Choi, Jong-Ho Bae, Dong Myong Kim, Changwook Kim, Jiyong Woo, Dae Hwan Kim
2023 J jnl
Brain-Inspired Mutual Synchronization in Cross-Coupled NbO
IEEE Access
Hyun Wook Kim, Seyeong Jeon, Seonuk Jeon, Eunryeong Hong, Nayeon Kim, Jiyong Woo
2021 C conf
Device Engineering Strategy of Zr-Doped HfOx Ferroelectric Memory for Unconventional Computing Applications.
ISCAS
Jiyong Woo
2021 J jnl
Two- and three-terminal HfO2-based multilevel resistive memories for neuromorphic analog synaptic elements.
Neuromorph. Comput. Eng.
Heebum Kang, Jinah Park, Dokyung Lee, Hyun Wook Kim, Sol Jin, Minjoon Ahn, Jiyong Woo
2020 — conf
Impact of Variability Issues of Resistive Memory Synapses on Pattern Recognition Systems.
ISOCC
Jiyong Woo, Miyoung Lee, Jeong Hun Kim, Jong-Pil Im, Solyee Im, Yeriaron Kim, Seung-Eon Moon, Joohyun Lee
2020 J jnl
Recent Advancements in Emerging Neuromorphic Device Technologies.
Adv. Intell. Syst.
Jiyong Woo, Jeong Hun Kim, Jong-Pil Im, Seung-Eon Moon
2020 J jnl
Recent Advancements in Emerging Neuromorphic Device Technologies.
Adv. Intell. Syst.
Jiyong Woo, Jeong Hun Kim, Jong-Pil Im, Seung-Eon Moon
2019 C conf
Design Space Exploration of Ovonic Threshold Switch (OTS) for Sub-Threshold Read Operation in Cross-Point Memory Arrays.
ISCAS
Jiyong Woo, Shimeng Yu
2019 J jnl
Impact of Selector Devices in Analog RRAM-Based Crossbar Arrays for Inference and Training of Neuromorphic System.
IEEE Trans. Very Large Scale Integr. Syst.
Jiyong Woo, Shimeng Yu
2018 C conf
Design Considerations of Selector Device in Cross-Point RRAM Array for Neuromorphic Computing.
ISCAS
Jiyong Woo, Xiaochen Peng, Shimeng Yu
2017 — conf
A multiscale modeling approach for the simulation of OxRRAM devices.
NVMTS
Andrea Padovani, Luca Larcher, Jiyong Woo, Hyunsang Hwang
2017 — conf
Enhancement of CBRAM performance by controlled formation of a hourglass-shaped filament.
NVMTS
Attilio Belmonte, Ludovic Goux, Jiyong Woo, Umberto Celano, Augusto Redolfi, Sergiu Clima, Gouri Sankar Kar
2016 — conf
Full chip integration of 3-d cross-point ReRAM with leakage-compensating write driver and disturbance-aware sense amplifier.
VLSI Circuits
Sangheon Lee, Jeonghwan Song, Changhyuk Seong, Jiyong Woo, Jong-Moon Choi, Soon-Chan Kwon, Ho-Joon Kim, Hyun-Suk Kang, Soo Gil Kim, Hoe Gwon Jung, Kee-Won Kwon, Hyunsang Hwang
2014 C conf
Selector devices for 3-D cross-point ReRAM.
ISCAS
Euijun Cha, Jiyong Woo, Daeseok Lee, Sangheon Lee, Hyunsang Hwang
2013 — conf
A two-step set operation for highly uniform resistive swtiching ReRAM by controllable filament.
ESSDERC
Sangheon Lee, Daeseok Lee, Jiyong Woo, Euijun Cha, Hyunsang Hwang