Jiun-In Guo - RankMe

165 papers A* 1A 10B 5C 26Misc 3Journal 37Unranked 83

Year	Rank	Type	Title / Venue / Authors
2026	C	`conf`	Near-Infrared Image and YOLO Based Driver Monitoring System Design by Integrating with Head Pose and Gaze Estimation Functions. ICCE Siang-En Ciou, Xi-Liang Zhao, Jiun-In Guo, Chih-Peng Fan
2025	C	`conf`	Deep Learning and Image Based Driver Monitoring System Design by Integrating Head Pose Estimation and Behavior Analysis. ICCE Yu-cheng Yang, Hsuan-Yu Lin, Xi-Liang Zhao, Jiun-In Guo, Chih-Peng Fan
2025	B	`conf`	MIC-OPCC: Multi-Indexed Convolution Model for Octree Point Cloud Compression. DCC Gerald Baulig, Jiun-In Guo
2024	—	`conf`	Implementation of a Non-Contact Driver Monitoring System with Enhanced Object Detection and Pose Estimation. GCCE Hsuan-Yu Lin, Yu-cheng Yang, Xi-Liang Zhao, Jiun-In Guo, Yin-Tsung Hwang, Chih-Peng Fan
2024	J	`jnl`	Object Detection, Recognition, and Tracking Algorithms for ADASs - A Study on Recent Trends. Sensors Vinay Malligere Shivanna, Jiun-In Guo
2024	J	`jnl`	Optimizing Automated Optical Inspection: An Adaptive Fusion and Semi-Supervised Self-Learning Approach for Elevated Accuracy and Efficiency in Scenarios with Scarce Labeled Data. Sensors Yu-Shu Ni, Wei-Lun Chen, Yi Liu, Ming-Hsuan Wu, Jiun-In Guo
2024	—	`conf`	Summary of the 2024 Low-Power Efficient and Accurate Facial-Landmark Detection for Embedded Systems. ICME Workshops Yu-Shu Ni, Han-Chun Chen, Chia-Chi Tsai, Chih-Cheng Chen, Po-Yu Chen, Hsien-Kai Kuo, Jun-Ying Hunag, Po-Chi Hu, Jenq-Neng Hwang, Jiun-In Guo
2023	J	`jnl`	360° Map Establishment and Real-Time Simultaneous Localization and Mapping Based on Equirectangular Projection for Autonomous Driving Vehicles. Sensors Bo-Hong Lin, Vinay Malligere Shivanna, Jiun-Shiung Chen, Jiun-In Guo
2023	—	`conf`	Asynchronous Multi-Task Learning Based on One Stage YOLOR Algorithm. ISIE Cheng-Fu Liou, Tsung-Han Lee, Jiun-In Guo
2023	J	`jnl`	Deep Learning Derived Object Detection and Tracking Technology Based on Sensor Fusion of Millimeter-Wave Radar/Video and Its Application on Embedded Systems. Sensors Jia-Jheng Lin, Jiun-In Guo, Vinay Malligere Shivanna, Ssu-Yuan Chang
2023	C	`conf`	Multi-Scale Dynamic Fixed-Point Quantization and Training for Deep Neural Networks. ISCAS Po-Yuan Chen, Hung-Che Lin, Jiun-In Guo
2023	—	`conf`	Summary of the 2023 Low-Power Deep Learning Object Detection and Semantic Segmentation Multitask Model Compression Competition for Traffic Scene in Asian Countries. ICME Workshops Yu-Shu Ni, Chia-Chi Tsai, Chih-Cheng Chen, Hsien-Kai Kuo, Po-Yu Chen, Po-Chi Hu, Ted T. Kuo, Jenq-Neng Hwang, Jiun-In Guo
2023	—	`conf`	Summary of the 2023 PAIR-LITEON Competition: Embedded AI Object Detection Model Design Contest on Fish-eye Around-view Cameras. MMAsia Yu-Shu Ni, Chia-Chi Tsai, Jyun-Syu Lin, Hsien-Po Meng, Po-Chi Hu, Jiun-Shiung Chen, Kun-Hung Lin, Chih-Yuan Chuang, Jiun-In Guo
2023	—	`conf`	YOLO Deep-Learning Based Driver Behaviors Detection and Effective Gaze Estimation by Head Poses for Driver Monitor System. GCCE Yi-Chiao Fang, Xi-Liang Zhao, Hsuan-Yu Lin, Yu-cheng Yang, Jiun-In Guo, Chih-Peng Fan
2022	J	`jnl`	ConcentrateNet: Multi-Scale Object Detection Model for Advanced Driving Assistance System Using Real-Time Distant Region Locating Technique. Sensors Bo-Xun Wu, Vinay Malligere Shivanna, Hsiang-Hsuan Hung, Jiun-In Guo
2022	J	`jnl`	IVS-Caffe - Hardware-Oriented Neural Network Model Development. IEEE Trans. Neural Networks Learn. Syst. Chia-Chi Tsai, Jiun-In Guo
2022	—	`conf`	Radar and Camera Fusion for Vacant Parking Space Detection. AICAS Bo-Xun Wu, Jia-Jheng Lin, Hsien-Kai Kuo, Po-Yu Chen, Jiun-In Guo
2022	J	`jnl`	Real-Time Multiple Pedestrian Tracking With Joint Detection and Embedding Deep Learning Model for Embedded Systems. IEEE Access Hung-Wei Lin, Vinay Malligere Shivanna, Hsiu Chi Chang, Jiun-In Guo
2022	B	`conf`	Real-time LiDAR module with 64x128-pixel CMOS SPAD array and 940-nm PCSEL. SAS An-Tai Hsiao, Chun-Hsien Liu, Po-Hsuan Chen, Yao-Lun Liu, Wei-Chi Wang, Tzu-Hsien Sang, Chia-Ming Tsai, Gray Lin, Jiun-In Guo, Sheng-Di Lin
2022	—	`conf`	Summary of the 2022 Low-Power Deep Learning Semantic Segmentation Model Compression Competition for Traffic Scene In Asian Countries. ICME Workshops Yu-Shu Ni, Chia-Chi Tsai, Chih-Cheng Chen, Po-Yu Chen, Hsien-Kai Kuo, Man-Yu Lee, Kuo Chin-Chuan, Zhe-Ln Hu, Po-Chi Hu, Ted T. Kuo, Jenq-Neng Hwang, Jiun-In Guo
2022	J	`jnl`	iVS Dataset and ezLabel: A Dataset and a Data Annotation Tool for Deep Learning Based ADAS Applications. Remote. Sens. Yu-Shu Ni, Vinay Malligere Shivanna, Jiun-In Guo
2021	—	`conf`	AI-Assisted Stanford Classification of Aortic Dissection in CT Imaging Using Volumetric 3D CNN with External Guided Attention. BioCAS Cheng-Fu Liou, Li-Ting Huang, Paul Kuo, Chien-Kuo Wang, Jiun-In Guo
2021	J	`jnl`	DoA Estimation for FMCW Radar by 3D-CNN. Sensors Tzu-Hsien Sang, Feng-Tsun Chien, Chia-Chih Chang, Kuan-Yu Tseng, Bo-Sheng Wang, Jiun-In Guo
2021	—	`conf`	Focal-Balanced Attention U-Net with Dynamic Thresholding by Spatial Regression for Segmentation of Aortic Dissection in CT Imagery. ISBI Tsung-Han Lee, Li-Ting Huang, Paul Kuo, Chien-Kuo Wang, Jiun-In Guo
2021	J	`jnl`	High-Power and High-Responsivity Avalanche Photodiodes for Self-Heterodyne FMCW Lidar System Applications. IEEE Access Zohauddin Ahmad, Yan-Min Liao, Sheng-I Kuo, You-Chia Chang, Rui-Lin Chao, Naseem, Yi-Shan Lee, Yung-Jr Hung, Huang-Ming Chen, Jyehong Chen, Jiun-In Guo, Jin-Wei Shi
2021	J	`jnl`	MTSAN: Multi-Task Semantic Attention Network for ADAS Applications. IEEE Access Chun-Yu Lai, Bo-Xun Wu, Vinay Malligere Shivanna, Jiun-In Guo
2021	—	`conf`	Residual Knowledge Retention For Edge Devices. ISIE Cheng-Fu Liou, Paul Kuo, Jiun-In Guo
2021	B	`conf`	Summary of the 2021 Embedded Deep Learning Object Detection Model Compression Competition for Traffic in Asian Countries. ICMR Yu-Shu Ni, Chia-Chi Tsai, Jiun-In Guo, Jenq-Neng Hwang, Bo-Xun Wu, Po-Chi Hu, Ted T. Kuo, Po-Yu Chen, Hsien-Kai Kuo
2020	J	`jnl`	A Deep-Learning Model with Task-Specific Bounding Box Regressors and Conditional Back-Propagation for Moving Object Detection in ADAS Applications. Sensors Guan-Ting Lin, Vinay Malligere Shivanna, Jiun-In Guo
2020	—	`conf`	Automatic Industry PCB Board DIP Process Defect Detection with Deep Ensemble Method. ISIE Yu-Ting Li, Paul Kuo, Jiun-In Guo
2020	—	`conf`	Front Moving Object Behavior Prediction System Exploiting Deep Learning Technology for ADAS Applications. MWSCAS Wen-Chia Tsai, Kuan-Chou Chen, Jhih-Sheng Lai, Jiun-In Guo
2020	—	`conf`	Fusion Technology of Radar and RGB Camera Sensors for Object Detection and Tracking and its Embedded System Implementation. APSIPA Jian Xian Lu, Jia-Cheng Lin, M. S. Vinay, Po-Yu Chen, Jiun-In Guo
2020	J	`jnl`	Hybrid Fixed-Point/Binary Deep Neural Network Design Methodology for Low-Power Object Detection. IEEE J. Emerg. Sel. Topics Circuits Syst. Jiun-In Guo, Chia-Chi Tsai, Jian-Lin Zeng, Shao-Wei Peng, En-Chih Chang
2020	—	`conf`	Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique. VLSI-DAT Ching-Hwa Cheng, Jiun-In Guo
2020	—	`conf`	The 2020 Embedded Deep Learning Object Detection Model Compression Competition for Traffic in Asian Countries. ICME Workshops Chia-Chi Tsai, Yong-Hsiang Yang, Hung-Wei Lin, Bo-Xun Wu, En-Chih Chang, Hung Yu Liu, Jhih-Sheng Lai, Po Yuan Chen, Jia-Jheng Lin, Jen Shuo Chang, Li-Jen Wang, Ted T. Kuo, Jenq-Neng Hwang, Jiun-In Guo
2020	—	`conf`	Video Dehazing Hardware Accelerator Design based on Dark Channel Prior with Sky Preservation. VLSI-DAT Zi-yi Zhao, An-Tai Xiao, Jiun-In Guo
2019	—	`conf`	A Real-time and Online Multiple-Type Object Tracking Method with Deep Features. APSIPA Yi-Hsuan Hsu, Jiun-In Guo
2019	—	`conf`	Pvalite CLN: Lightweight Object Detection with Classfication and Localization Network. SoCC Jiun-In Guo, Chia-Chi Tsai, Ching-Kan Tseng
2019	B	`conf`	Recognizing Chinese Texts with 3D Convolutional Neural Network. ICIP Kuan-Chou Chen, Guan-Ting Lin, Che-Tsung Lin, Jiun-In Guo
2019	C	`conf`	Summary Embedded Deep Learning Object Detection Model Competition. MMSP Jiun-In Guo, Chia-Chi Tsai, Yong-Hsiang Yang, Hung-Wei Lin, Bo-Xun Wu, Ted T. Kuo, Li-Jen Wang
2019	B	`conf`	Using C3D to Detect Rear Overtaking Behavior. ICIP Ching-Kai Tseng, Chien-Chih Liao, Po-Chun Shen, Jiun-In Guo
2018	C	`conf`	A Blind Spot Detection Warning System based on Gabor Filtering and Optical Flow for E-mirror Applications. ISCAS Shun-Min Chang, Chia-Chi Tsai, Jiun-In Guo
2018	—	`conf`	One Stage Detection Network with an Auxiliary Classifier for Real-Time Road Marks Detection. APSIPA Guan-Ting Lin, Patrisia Sherryl Santoso, Che-Tsung Lin, Chia-Chi Tsai, Jiun-In Guo
2018	—	`conf`	Vehicle Detection and Classification based on Deep Neural Network for Intelligent Transportation Applications. APSIPA Chia-Chi Tsai, Ching-Kan Tseng, Ho-Chia Tang, Jiun-In Guo
2017	—	`conf`	A multiple-lane vehicle tracking method for forward collision warning system applications. APSIPA Yuan-Fu Li, Chia-Chi Tsai, Yi-Ting Lai, Jiun-In Guo
2017	—	`conf`	A vision radar system for car safety driving applications. VLSI-DAT Chia-Chi Tsai, Yi-Ting Lai, Yuan-Fu Li, Jiun-In Guo
2017	—	`conf`	An Adaptive Cross-Window stereo camera Distance Estimation technology and its system implementation for multiple applications. VLSI-DAT Ricky Lee, Tai en Wu, Jiun-In Guo
2017	—	`conf`	Embedded multiple object detection based on deep learning technique for advanced driver assistance system. MWSCAS Fong-An Chang, Chia-Chi Tsai, Ching-Kan Tseng, Jiun-In Guo
2017	—	`conf`	LiDAR/camera sensor fusion technology for pedestrian detection. APSIPA Tai-En Wu, Chia-Chi Tsai, Jiun-In Guo
2017	—	`conf`	Localized High Dynamic Range Plenoptic Image Compression. Computational Imaging Chuan-Chung Chang, Hsin-Hsiang Lo, Han-Hsuan Lin, Zhi-Rong Fan, Shao-Hsuan Cheng, Chih-Hung Lu, Fu-Ming Chuang, Jiun-In Guo
2017	—	`conf`	Stop line detection and distance measurement for road intersection based on deep learning neural network. APSIPA Guan-Ting Lin, Patrisia Sherryl Santoso, Che-Tsung Lin, Chia-Chi Tsai, Jiun-In Guo
2016	—	`conf`	A variable-voltage low-power technique for digital circuit system. ASP-DAC An-Tai Xiao, Yung-Siang Miao, Ching-Hwa Cheng, Jiun-In Guo
2016	C	`conf`	Algorithm derivation and its embedded system realization of speed limit detection for multiple countries. ISCAS Yi-Ting Lin, Ting Chou, M. S. Vinay, Jiun-In Guo
2015	—	`conf`	A 3D hand tracking design for gesture control in complex environments. VLSI-DAT Po-Yu Chien, Yuan-Hsiang Miao, Jiun-In Guo
2015	—	`conf`	A power-aware quad-voltage H.264 encoder chip for wireless panoramic endoscope applications. VLSI-DAT An-Tia Xiao, Shiang-Ren Yang, Yuan-Hsiang Miao, Ching-Hwa Cheng, Jiun-In Guo
2015	C	`conf`	A wireless panoramic endoscope system design and implementation for minimally invasive surgery. ISCAS Ching-Hwa Cheng, Sheng-Ping Hung, Jiun-In Guo, Kai-Che Liu, Jungle Chi-Hsiang Wu
2015	—	`conf`	An AdaBoost object detection design for heterogeneous computing with OpenCL. ICCE-TW Bing-Yang Cheng, Jui-Sheng Lee, Jiun-In Guo
2015	—	`conf`	Vision-based landing system design for a small UAV. ICCE-TW Yu-Fu Lin, Wei-Min Lu, Kuan-Hung Chen, Jiun-In Guo
2014	—	`conf`	A 360-degree panoramic video system design. VLSI-DAT Kai-Chen Huang, Po-Yu Chien, Cheng-An Chien, Hsiu-Cheng Chang, Jiun-In Guo
2014	—	`conf`	A forward collision avoidance system adopting multi-feature vehicle detection. ICCE-TW Guan-Yu Chen, Po-Chun Shen, Chao-Yi Cho, M. S. Vinay, Jiun-In Guo
2014	—	`conf`	A single-camera high dynamic range technique by using contrast enhancement and exposure control. APSIPA Che-Cheng Li, Sheng-Wei Hsu, Po-Chun Shen, Jiun-In Guo
2014	—	`conf`	An Adaboost-based two-level moving object detection architecture with dynamic ROI allocation. ICCE-TW Jui-Sheng Lee, Hsiu-Cheng Chang, Jiun-In Guo
2014	—	`conf`	Dynamic local contrast enhancement for advanced driver assistance system in harsh environments. ICCE-TW Sheng-Wei Hsu, Guan-Yu Chen, Po-Chun Shen, Chao-Yi Cho, Jiun-In Guo
2014	—	`conf`	High dynamic range imaging technology for micro camera array. APSIPA Po-Hsiang Huang, Yuan-Hsiang Miao, Jiun-In Guo
2014	—	`conf`	Maintaining color fidelity for dual-shot HDR imaging. ICCE-TW Chingwei Yeh, Chen-Yao Tsai, Tay-Jyi Lin, Jiun-In Guo
2014	—	`conf`	Vision-based moving objects detection for intelligent automobiles and a robustness enhancing method. ICCE-TW Ting-Fung Ju, Wei-Min Lu, Kuan-Hung Chen, Jiun-In Guo
2013	—	`conf`	A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS. ISSCC Tay-Jyi Lin, Cheng-An Chien, Pei-Yao Chang, Ching-Wen Chen, Po-Hao Wang, Ting-Yu Shyu, Chien-Yung Chou, Shien-Chun Luo, Jiun-In Guo, Tien-Fu Chen, Gene C. H. Chuang, Yuan-Hua Chu, Liang-Chia Cheng, Hong-Men Su, Chewnpu Jou, Meikei Ieong, Cheng-Wen Wu, Jinn-Shyan Wang
2013	—	`conf`	A low complexity multi-view video encoder exploiting B-frame characteristics. APSIPA Yuan-Hsiang Miao, Guo-An Jian, Li-Ching Wang, Jui-Sheng Lee, Jiun-In Guo
2013	C	`conf`	A low-cost scalable Voltage-Frequency Adjustor for implementing low-power systems. ISCAS Ching-Hwa Cheng, Sheng-Wei Hsu, Jiun-In Guo
2013	—	`conf`	A real-time parallel scalable video encoder for multimedia streaming systems. VLSI-DAT Guo-An Jian, Jui-Sheng Lee, Kheng-Joo Tan, Peng-Sheng Chen, Jiun-In Guo
2013	—	`conf`	A view scalable multi-view video decoder system. VLSI-DAT Jui-Sheng Lee, Yuan-Hsiang Miao, Cheng-An Chien, Hsiu-Cheng Chang, Jiun-In Guo
2013	J	`jnl`	Real-Time 3D Depth Generation for Stereoscopic Video Applications with Thread-Level Superscalar-Pipeline Parallelization. J. Signal Process. Syst. Guo-An Jian, Cheng-An Chien, Peng-Sheng Chen, Jiun-In Guo
2012	C	`conf`	3D depth map generation for embedded stereo applications. VCIP Jui-Sheng Lee, Guo-An Jian, Cheng-An Chien, Peng-Sheng Chen, Jiun-In Guo
2012	J	`jnl`	A Verification-Aware Design Methodology for Thread Pipelining Parallelization. IEICE Trans. Inf. Syst. Guo-An Jian, Cheng-An Chien, Peng-Sheng Chen, Jiun-In Guo
2012	—	`conf`	A high-speed dual-phase processing pipelined domino circuit design with a built-in performance adjusting mechanism. VLSI-DAT Ching-Hwa Cheng, Jiun-In Guo
2012	C	`conf`	A two level mode decision algorithm for H.264 high profile intra encoding. ISCAS Cheng-Yen Chang, Cheng-An Chien, Hsiu-Cheng Chang, Jia-Wei Chen, Jiun-In Guo
2012	—	`conf`	An inter-frame/inter-view cache architecture design for multi-view video decoders. APSIPA Jui-Sheng Lee, Sheng-Han Wang, Chih-Tai Chou, Cheng-An Chien, Hsiu-Cheng Chang, Jiun-In Guo
2012	J	`jnl`	High efficiency data access system architecture for deblocking filter supporting multiple video coding standards. IEEE Trans. Consumer Electron. Cheng-An Chien, Guo-An Jian, Hsiu-Cheng Chang, Kuan-Hung Chen, Jiun-In Guo
2012	—	`conf`	Low bandwidth HD1080@60FPS JPEG-XR transform design. VLSI-DAT Sheng-Wei Fan, Jia-Wai Chen, Jiun-In Guo
2011	—	`conf`	A H.264/MPEG-2 dual mode video decoder chip supporting temporal/spatial scalable video. ASP-DAC Cheng-An Chien, Yao-Chang Yang, Hsiu-Cheng Chang, Jia-Wei Chen, Cheng-Yen Chang, Jiun-In Guo, Jinn-Shyan Wang, Ching-Hwa Cheng
2011	J	`jnl`	A dynamic quality-adjustable H.264 intra coder. IEEE Trans. Consumer Electron. Jia-Wei Chen, Hsiu-Cheng Chang, Jinn-Shyan Wang, Jiun-In Guo
2011	—	`conf`	A low-power management technique for high-performance domino circuits. ASP-DAC Yu-Tzu Tsai, Cheng-Chih Tsai, Cheng-An Chien, Ching-Hwa Cheng, Jiun-In Guo
2011	J	`jnl`	Design of Subthreshold SRAMs for Energy-Efficient Quality-Scalable Video Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. Jinn-Shyan Wang, Pei-Yao Chang, Tai-Shin Tang, Jia-Wei Chen, Jiun-In Guo
2011	—	`conf`	Dual-phase pipeline circuit design automation with a built-in performance adjusting mechanism. ASP-DAC Yu-Tzu Tsai, Cheng-Chih Tsai, Cheng-An Chien, Ching-Hwa Cheng, Jiun-In Guo
2010	C	`conf`	A group of macroblock based motion estimation algorithm supporting adaptive search range for H.264 video coding. ISCAS Chang-Hung Tsai, Kheng-Joo Tan, Ching-Lung Su, Jiun-In Guo
2010	A	`conf`	A remote thin client system for real time multimedia streaming over VNC. ICME Kheng-Joo Tan, Jia-Wei Gong, Bing-Tsung Wu, Dou-Cheng Chang, Hsin-Yi Li, Yi-Mao Hsiao, Yung-Chung Chen, Shi-Wu Lo, Yuan-Sun Chu, Jiun-In Guo
2010	—	`conf`	Dynamic voltage domain assignment technique for low power performance manageable cell based design. ASP-DAC Elone Lee, Feng-Tso Chien, Ching-Hwa Cheng, Jiun-In Guo
2010	A	`conf`	Low complexity fractional motion estimation with adaptive mode selection for H.264/AVC. ICME Chih-Chuan Yang, Kheng-Joo Tan, Yao-Chang Yang, Jiun-In Guo
2010	—	`conf`	Low compute complexity BU-based rate control algorithm for H.264/AVC encoder. APCCAS Bing-Tsung Wu, Jiun-In Guo
2010	J	`jnl`	Methods for Power/Throughput/Area Optimization of H.264/AVC Decoding. J. Signal Process. Syst. Ke Xu, Tsu-Ming Liu, Jiun-In Guo, Oliver Chiu-sing Choy
2009	J	`jnl`	A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder for high definition video applications. ACM Trans. Design Autom. Electr. Syst. Chih-Da Chien, Cheng-An Chien, Jui-Chin Chu, Jiun-In Guo, Ching-Hwa Cheng
2009	J	`jnl`	A Dynamic Quality-Adjustable H.264 Video Encoder for Power-Aware Video Applications. IEEE Trans. Circuits Syst. Video Technol. Hsiu-Cheng Chang, Jia-Wei Chen, Bing-Tsung Wu, Ching-Lung Su, Jinn-Shyan Wang, Jiun-In Guo
2009	C	`conf`	A Dynamic Quality-scalable H.264 Video Encoder. ISCAS Hsiu-Cheng Chang, Jia-Wei Chen, Yao-Chang Yang, Cheng-An Chien, Tzu-Chun Chang, Jinn-Shyan Wang, Jiun-In Guo
2009	C	`conf`	A High Throughput Deblocking Filter Design Supporting Multiple Video Coding Standards. ISCAS Cheng-An Chien, Hsiu-Cheng Chang, Jiun-In Guo
2009	—	`conf`	A Low Complexity Error Concealment Method for H.264 Video Coding Facilitating Hardware Realization. ISPAN Tao-Cheng Chang, Hung-Wei Shen, Jiun-In Guo
2009	C	`conf`	A Multi-standard Video Decoder for High Definition Video Applications. ISCAS Cheng-An Chien, Chih-Da Chien, Jui-Chin Chu, Jiun-In Guo, Ching-Hwa Cheng
2009	C	`conf`	A System Architecture Exploration on the Configurable HW/SW Co-design for H.264 Video Decoder. ISCAS Guo-An Jian, Jui-Chin Chu, Ting-Yu Huang, Tao-Cheng Chang, Jiun-In Guo
2009	—	`conf`	A dynamic quality-scalable H.264 video encoder chip. ASP-DAC Hsiu-Cheng Chang, Yao-Chang Yang, Jia-Wei Chen, Ching-Lung Su, Cheng-An Chien, Jiun-In Guo, Jinn-Shyan Wang
2009	—	`conf`	CKVdd: a self-stabilization ramp-vdd technique for dynamic power reduction. ASP-DAC Chin-Hsien Wang, Ching-Hwa Cheng, Jiun-In Guo
2009	J	`jnl`	High-Throughput H.264/AVC High-Profile CABAC Decoder for HDTV Applications. IEEE Trans. Circuits Syst. Video Technol. Yao-Chang Yang, Jiun-In Guo
2009	—	`conf`	Optimization of AVS-M Video Decoder for Real-time Implementation on Embedded RISC Processors. IIH-MSP Guo-An Jian, Jui-Chin Chu, Jiun-In Guo
2009	—	`conf`	Optimization of VC-1/H.264/AVS Video Decoders on Embedded Processors. ITNG Guo-An Jian, Ting-Yu Huang, Jui-Chin Chu, Jiun-In Guo
2009	J	`jnl`	VisoMT: A Collaborative Multithreading Multicore Processor for Multimedia Applications With a Fast Data Switching Mechanism. IEEE Trans. Circuits Syst. Video Technol. Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chi-Lin Liu, Tien-Fu Chen, Jiun-In Guo, Jinn-Shyan Wang
2008	Misc	`conf`	A H.264 basic-unit level rate control algorithm facilitating hardware realization. ICASSP Ping-Tsung Wu, Tzu-Chun Chang, Ching-Lung Su, Jiun-In Guo
2008	—	`conf`	A high throughput in-loop de-blocking filter supporting H.264/AVC BP/MP/HP video coding. APCCAS Cheng-An Chien, Hsiu-Cheng Chang, Jiun-In Guo
2008	—	`conf`	A novel basic unit level rate control algorithm and architecture for H.264/AVC video encoders. APCCAS Bing-Tsung Wu, Tzu-Chun Chang, Jiun-In Guo, Ching-Lung Su
2008	Misc	`conf`	Joint algorithm/code-level optimization of H.264 video decoder for mobile multimedia applications. ICASSP Ting-Yu Huang, Guo-An Jian, Jui-Chin Chu, Ching-Lung Su, Jiun-In Guo
2007	J	`jnl`	A 160K Gates/4.5 KB SRAM H.264 Video Decoder for HDTV Applications. IEEE J. Solid State Circuits Chien-Chang Lin, Jia-Wei Chen, Hsiu-Cheng Chang, Yao-Chang Yang, Yi-Huan Ou-Yang, Ming-Chih Tsai, Jiun-In Guo, Jinn-Shyan Wang
2007	—	`conf`	A 252kgate/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Applications. ISSCC Chih-Da Chien, Chien-Chang Lin, Yi-Hung Shih, He-Chun Chen, Chia-Jui Huang, Cheng-Yen Yu, Chih-Liang Chen, Ching-Hwa Cheng, Jiun-In Guo
2007	—	`conf`	A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip. ISSCC Hsiu-Cheng Chang, Jia-Wei Chen, Ching-Lung Su, Yao-Chang Yang, Yao Li, Chun-Hao Chang, Ze-Min Chen, Wei-Sen Yang, Chien-Chang Lin, Ching-Wen Chen, Jinn-Shyan Wang, Jiun-In Guo
2007	C	`conf`	A High-Speed/Low-Power Multiplier Using an Advanced Spurious Power Suppression Technique. ISCAS Kuan-Hung Chen, Yuan-Sun Chu, Yu-Min Chen, Jiun-In Guo
2007	A	`conf`	A Low Latency Memory Controller for Video Coding Systems. ICME Chih-Da Chien, Chih-Wei Wang, Chiun-Chau Lin, Tien-Wei Hsieh, Yuan-Hwa Chu, Jiun-In Guo
2007	C	`conf`	A Memory-Based Hardware Accelerator for Real-Time MPEG-4 Audio Coding and Reverberation. ISCAS Guo-An Jian, Chih-Da Chien, Jiun-In Guo
2007	—	`conf`	A Quality Scalable H.264/AVC Baseline Intra Encoder for High Definition Video Applicaitons. SiPS Chun-Hao Chang, Jia-Wei Chen, Hsiu-Cheng Chang, Yao-Chang Yang, Jinn-Shyan Wang, Jiun-In Guo
2007	A*	`conf`	An Embedded Coherent-Multithreading Multimedia Processor and Its Programming Model. DAC Jui-Chin Chu, Wei-Chun Ku, Shu-Hsuan Chou, Tien-Fu Chen, Jiun-In Guo
2007	A	`conf`	Low Complexity Multi-Standard Video Player for Portable Multimedia Applications. ICME Guo-An Jian, Jiun-In Guo
2006	A	`conf`	A Condition-based Intra Prediction Algorithm for H.264/AVC. ICME Jia-Wei Chen, Chun-Hao Chang, Chien-Chang Lin, Yi-Huan Yang, Jiun-In Guo, Jinn-Shyan Wang
2006	A	`conf`	A High Throughput VLSI Architecture Design for H.264 Context-Based Adaptive Binary Arithmetic Decoding with Look Ahead Parsing. ICME Yao-Chang Yang, Chien-Chang Lin, Hsui-Cheng Chang, Ching-Lung Su, Jiun-In Guo
2006	—	`conf`	A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC. APCCAS Ching-Lung Su, Wei-Sen Yang, Ya-Li Chen, Yao-Chang Yang, Ching-Wen Chen, Jiun-In Guo, Shau-Yin Tseng
2006	C	`conf`	A high performance CAVLC encoder design for MPEG-4 AVC/H.264 video coding applications. ISCAS Chih-Da Chien, Keng-Po Lu, Yi-Hung Shih, Jiun-In Guo
2006	J	`jnl`	A high-performance direct 2-D transform coding IP design for MPEG-4AVC/H.264. IEEE Trans. Circuits Syst. Video Technol. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang
2006	C	`conf`	A performance-aware IP core design for multimode transform coding using scalable-DA algorithm. ISCAS Jia-Wei Chen, Kuan-Hung Chen, Jinn-Shyan Wang, Jiun-In Guo
2006	J	`jnl`	An Area-Efficient Variable Length Decoder IP Core Design for MPEG-1/2/4 Video Coding Applications. IEEE Trans. Circuits Syst. Video Technol. Chih-Da Chien, Keng-Po Lu, Yu-Min Chen, Jiun-In Guo, Yuan-Sun Chu, Ching-Lung Su
2006	A	`conf`	Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications. ICME Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chih-Heng Kang, Tien-Fu Chen, Jiun-In Guo
2006	C	`conf`	Design of customized functional units for the VLIW-based multi-threading processor core targeted at multimedia applications. ISCAS Jui-Chin Chu, Chih-Wen Huang, He-Chun Chen, Keng-Po Lu, Ming-Shuan Lee, Jiun-In Guo, Tien-Fu Chen
2006	—	`conf`	Low Complexity Architecture Design of H.264 Predictive Pixel Compensator for HDTV Application. ICASSP (3) Jia-Wei Chen, Chien-Chang Lin, Jiun-In Guo, Jinn-Shyan Wang
2006	—	`conf`	Low Complexity High Quality Fractional Motion Estimation Algorithm and Architecture Design for H.264/AVC. APCCAS Ching-Lung Su, Wei-Sen Yang, Ya-Li Chen, Yao Li, Ching-Wen Chen, Jiun-In Guo, Shau-Yin Tseng
2006	C	`conf`	Low-power mechanism with power block management. ISCAS Kuo-Chuan Chao, Kuan-Hung Chen, Yuan-Sun Chu, Jiun-In Guo
2006	—	`conf`	Predictive Mode Searching Policy for H.264/AVC Intra Prediction. APCCAS Ming-Shuan Lee, Jui-Chin Chu, Jiun-In Guo
2005	—	`conf`	A low-power motion compensation IP core design for MPEG-1/2/4 video decoding. ISCAS (5) Chih-Da Chien, Ho-Chun Chen, Lin-Chieh Huang, Jiun-In Guo
2005	J	`jnl`	A memory-efficient realization of cyclic convolution and its application to discrete cosine transform. IEEE Trans. Circuits Syst. Video Technol. Hun-Chen Chen, Jiun-In Guo, Tian-Sheuan Chang, Chein-Wei Jen
2005	—	`conf`	A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H.264 CAVLC decoding. ISCAS (6) Hsiu-Cheng Chang, Chien-Chang Lin, Jiun-In Guo
2005	J	`jnl`	An Energy-Aware IP Core Design for the Variable-Length DCT/IDCT Targeting at MPEG4 Shape-Adaptive Transforms. IEEE Trans. Circuits Syst. Video Technol. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Jia-Wei Chen
2005	—	`conf`	An efficient direct 2-D transform coding IP design for MPEG-4 AVC/H.264. ISCAS (5) Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang
2005	A	`conf`	An efficient spurious power suppression technique (SPST) and its applications on MPEG-4 AVC/H.264 transform coding design. ISLPED Kuan-Hung Chen, Kuo-Chuan Chao, Jinn-Shyan Wang, Yuan-Sun Chu, Jiun-In Guo
2005	J	`jnl`	The Long Length DHT Design with a New Hardware Efficient Distributed Arithmetic Approach and Cyclic Preserving Partitioning. IEICE Trans. Electron. Hun-Chen Chen, Tian-Sheuan Chang, Jiun-In Guo, Chein-Wei Jen
2004	A	`conf`	A high-performance MPEG4 bitstream processing core. ICME Tai-Lun Chang, Ying-Ming Tsai, Chih-Da Chien, Chien-Chang Lin, Jiun-In Guo
2004	—	`conf`	A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT. ISCAS (2) Rei-Chin Ju, Jia-Wei Chen, Jiun-In Guo, Tien-Fu Chen
2004	—	`conf`	A power-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transforms. ISCAS (2) Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Tien-Fu Chen
2004	—	`conf`	A power-aware IP core generator for the one-dimensional discrete Fourier transform. ISCAS (3) Chih-Da Chien, Chien-Chang Lin, Jiun-In Guo, Tien-Fu Chen
2004	A	`conf`	A power-aware SNR-progressive DCT/IDCT IP core design for multimedia transform coding. ICME Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh
2004	J	`jnl`	An efficient 2-D DCT/IDCT core design using cyclic convolution and adder-based realization. IEEE Trans. Circuits Syst. Video Technol. Jiun-In Guo, Rei-Chin Ju, Jia-Wei Chen
2003	—	`conf`	A memory efficient realization of cyclic convolution and its application to discrete cosine transform. ISCAS (4) Hun-Chen Chen, Jiun-In Guo, Chein-Wei Jen
2003	—	`conf`	A new 2-D 8×8 DCT/IDT core design using group distributed arithmetic. ISCAS (2) Jiun-In Guo, Jia-Wei Chen, Han-Chen Chen
2003	—	`conf`	A parameterized low power design for the variable-length discrete Fourier transform using dynamic pipelining. ISCAS (5) Jiun-In Guo, Chih-Da Chien, Chien-Chang Lin
2003	J	`jnl`	An Efficient IDCT Processor Design for HDTV Applications. J. VLSI Signal Process. Jiun-In Guo, Jui-Cheng Yen
2003	J	`jnl`	Design and Realization of a New Signal Security System for Multimedia Data Transmission. EURASIP J. Adv. Signal Process. Hun-Chen Chen, Jiun-In Guo, Lin-Chieh Huang, Jui-Cheng Yen
2002	J	`jnl`	A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths. J. Circuits Syst. Comput. Jiun-In Guo, Chien-Chang Lin, Chih-Da Chien
2002	—	`conf`	A new group distributed arithmetic design for the one dimensional discrete Fourier transform. ISCAS (1) Hun-Chen Chen, Jiun-In Guo, Chein-Wei Jen
2002	—	`conf`	A new hardware efficient design for the one dimensional discrete Fourier transform. ISCAS (5) Jiun-In Guo, Chien-Chang Lin
2002	—	`conf`	Design of a New Cryptography System. IEEE Pacific Rim Conference on Multimedia Hun-Chen Chen, Jui-Cheng Yen, Jiun-In Guo
2002	—	`conf`	Design of a new signal security system. ISCAS (4) Jui-Cheng Yen, Jiun-In Guo
2001	J	`jnl`	A generalized architecture for the one-dimensional discrete cosine and sine transforms. IEEE Trans. Circuits Syst. Video Technol. Jiun-In Guo, Chih-Chen Li
2001	—	`conf`	A low cost 2-D inverse discrete cosine transform design for image compression. ISCAS (4) Jiun-In Guo
2001	—	`conf`	A new DA-based array for one dimensional discrete Hartley transform. ISCAS (4) Jiun-In Guo
2000	C	`conf`	A new chaotic key-based design for image encryption and decryption. ISCAS Jui-Cheng Yen, Jiun-In Guo
2000	C	`conf`	An efficient design for one dimensional discrete cosine transform using parallel adders. ISCAS Jiun-In Guo
2000	J	`jnl`	An efficient design for one-dimensional discrete Hartley transform using parallel additions. IEEE Trans. Signal Process. Jiun-In Guo
1998	J	`jnl`	A new k-winners-take-all neural network and its array architecture. IEEE Trans. Neural Networks Jui-Cheng Yen, Jiun-In Guo, Hun-Chen Chen
1994	C	`conf`	A General Approach to Design VLSI Arrays for the Multi-dimensional Discrete Hartley Transform. ISCAS Jiun-In Guo, Chi-Min Liu, Chein-Wei Jen
1994	—	`conf`	A novel VLSI array design for the discrete Hartley transform using cyclic convolution. ICASSP (2) Jiun-In Guo, Chi-Min Liu, Chein-Wei Jen
1993	C	`conf`	A CORDIC-based VLSI Array for Computing 2-D Discrete Hartley Transform. ISCAS Jiun-In Guo, Chi-Min Liu, Chein-Wei Jen
1993	C	`conf`	A Multi-phase Shared Bus Structure for the Fast Fourier Transform. ISCAS Yu-Sheng Lin, Jiun-In Guo, C. Bernard Shung, Chein-Wei Jen
1993	J	`jnl`	A New Array Architecture for Prime-Length Discrete Cosine Transform. IEEE Trans. Signal Process. Jiun-In Guo, Chi-Min Liu, Chein-Wei Jen
1992	Misc	`conf`	A memory-based approach to design and implement systolic arrays for DFT and DCT. ICASSP Jiun-In Guo, Chi-Min Liu, Chein-Wei Jen