Jishun Kuang - RankMe

34 papers B 1C 2Journal 20Unranked 11

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	The design of ΔΣ-ADC in MEMS gyro interface ASIC. Microelectron. J. Jinhui Tan, Jishun Kuang, Xing Hu, Xiaomin Cai, Jiahe Shi
2022	J	`jnl`	Small-Signal Processing Low-Overhead Operational Amplifier for delta-Sigma ADC. J. Circuits Syst. Comput. Jinhui Tan, Jishun Kuang, Xing Hu, Lin Xiao
2021	J	`jnl`	Improving Compression Ratios for Code-Based Test Pattern Compressions through Column-Wise Reordering Algorithms. J. Circuits Syst. Comput. Minghe Zhang, Jishun Kuang, Jing Huang, Renfa Li
2019	—	`conf`	A Pseudo-Random Transform Decomposition Method for Improving the Coding Compression Ratio of Test Data. HPCC/SmartCity/DSS Minghe Zhang, Jishun Kuang, Jing Huang, Zhiqiang You
2019	—	`conf`	Design and Implementation of GPU Accelerated Active Storage in FastDFS. HPCC/SmartCity/DSS Zaihong He, Jishun Kuang, Yanjie Tan, Wenjie Liu, Bin Sheng
2019	J	`jnl`	LPCMsim: A Lightweight Phase Change Memory Simulator. Future Gener. Comput. Syst. Zaihong He, Jishun Kuang, Yanjie Tan, Shihui Peng, Huailiang Tan
2018	J	`jnl`	A novel memristor-based restricted Boltzmann machine for contrastive divergence. IEICE Electron. Express Yan Chen, Zhiqiang You, Yingjie Zhang, Jishun Kuang, Jing Zhang
2016	J	`jnl`	A parallel-SSHI rectifier for ultra-low-voltage piezoelectric vibration energy harvesting. IEICE Electron. Express Liao Wu, Jishun Kuang, Zhiqiang You, Peng Liu, Shuo Cai
2016	—	`conf`	A sort method to enhance significant spectral components of test set. ICNC-FSKD Yingbo Zhou, Jishun Kuang
2016	J	`jnl`	Representative Scan Architecture. J. Circuits Syst. Comput. Ling Zhang, Jishun Kuang
2015	—	`conf`	An active rectifier with optimal flip timing for the internal capacitor for piezoelectric vibration energy harvesting. MWSCAS Liao Wu, Dong Sam Ha, Jishun Kuang, Xuan-Dien Do, Sang-Gug Lee
2015	J	`jnl`	An efficient small-delay faults simulator based on critical path tracing. Int. J. Circuit Theory Appl. Tieqiao Liu, Jishun Kuang, Shuo Cai, Zhiqiang You
2015	B	`conf`	Improve the compression ratios for code-based test vector compressions by decomposing. ETS Jishun Kuang, Liang Zhang, Zhiqiang You, Yingbo Zhou
2015	J	`jnl`	Logic operation-based DFT method and 1R memristive crossbar March-like test algorithm. IEICE Electron. Express Peng Liu, Zhiqiang You, Jishun Kuang, Zhipeng Hu, Weizheng Wang
2014	J	`jnl`	An adaptive neural network A/D converter based on CMOS/memristor hybrid design. IEICE Electron. Express Weiwei Wang, Zhiqiang You, Peng Liu, Jishun Kuang
2013	J	`jnl`	Comparator and half adder design using complementary resistive switches crossbar. IEICE Electron. Express Bosheng Liu, Zhiqiang You, Xiangrao Li, Jishun Kuang, Zheng Qin
2012	J	`jnl`	A scan disabling-based BAST scheme for test cost and test power reduction. IEICE Electron. Express Zhiqiang You, Weizheng Wang, Peng Liu, Jishun Kuang, Zheng Qin
2012	J	`jnl`	Achieving low capture and shift power in linear decompressor-based test compression environment. Microelectron. J. Weizheng Wang, Jishun Kuang, Zhiqiang You
2012	J	`jnl`	Switching activity reduction for scan-based BIST using weighted scan input data. IEICE Electron. Express Weizheng Wang, Jishun Kuang, Peng Liu, Xin Peng, Zhiqiang You
2012	J	`jnl`	Virtual scan chains reordering using a RAM-based module for high test compression. Microelectron. J. Ling Zhang, Jishun Kuang, Zhiqiang You
2011	J	`jnl`	A New Test Data Compression Scheme. J. Comput. Ling Zhang, Jishun Kuang
2011	J	`jnl`	A scan disabling-based BAST scheme for test cost reduction. IEICE Electron. Express Zhiqiang You, Weizheng Wang, Zhiping Dou, Peng Liu, Jishun Kuang
2011	J	`jnl`	Test Data Compression Using Selective Sparse Storage. J. Electron. Test. Ling Zhang, Jishun Kuang, Zhiqiang You
2011	J	`jnl`	Test data compression using interval broadcast scan for embedded cores. Microelectron. J. Ling Zhang, Jishun Kuang, Zhiqiang You
2010	—	`conf`	Capture in Turn Scan for Reduction of Test Data Volume, Test Application Time and Test Power. Asian Test Symposium Zhiqiang You, Jiedi Huang, Michiko Inoue, Jishun Kuang, Hideo Fujiwara
2010	—	`conf`	Test Data Compression Using Four-Coded and Sparse Storage for Testing Embedded Core. ICA3PP (2) Ling Zhang, Jishun Kuang, Zhiqiang You
2009	C	`conf`	Small Delay Fault Simulation for Sequential Circuits. PRDC Li Liu, Jishun Kuang, Huawei Li
2008	—	`conf`	A Novel BIST Scheme Using Test Vectors Applied by Circuit-under-Test Itself. ATS Jishun Kuang, Ouyang Xiong, Zhiqiang You
2008	—	`conf`	DCScan: A Power-Aware Scan Testing Architecture. ATS Gui Dai, Zhiqiang You, Jishun Kuang, Jiedi Huang
2008	—	`conf`	Test Response Data Volume and Wire Length Reductions for Extended Compatibilities Scan Tree Construction. DELTA Yong-sheng Cheng, Zhiqiang You, Jishun Kuang
2005	C	`conf`	A New BIST Solution for System-on-Chip. PRDC Ling Zhang, Jishun Kuang
2003	—	`conf`	At-Speed Current Testing. Asian Test Symposium Yinghua Min, Jishun Kuang, Xiaoyan Niu
2003	—	`conf`	IDDT ATPG Based on Ambiguous Delay Assignments. Asian Test Symposium Jishun Kuang, Yu Wang, Xiaofen Wei, Changnian Zhang
2003	J	`jnl`	IDDT: Fundamentals and Test Generation. J. Comput. Sci. Technol. Jishun Kuang, Zhiqiang Yang, Qijian Zhu, Yinghua Min