Jinho Park

16 papers Journal 8Unranked 8
YearRankTypeTitle / Venue / Authors
2024 J jnl
A 26-Gb/s Framed-Pulsewidth Modulation Transceiver for Extended Reach Optical Links.
IEEE J. Solid State Circuits
Woohyun Kwon, Hyosup Won, Taeho Kim, Sejun Jeon, Soon-Won Kwon, Ha-Il Song, Hanho Choi, Bongjin Kim, Huxian Jin, Jun-Gi Jo, Woosang Han, Tai-Young Kim, Gain Kim, Jake Eu, Jinho Park, Hyeon-Min Bae
2022 — conf
A 25.78125Gbps Bi-directional Transceiver with Framed-Pulsewidth Modulation (FPWM) for Extended Reach Optical Links in 28nm CMOS.
VLSI Technology and Circuits
Woohyun Kwon, Hyosup Won, Taeho Kim, Ha-Il Song, Hanho Choi, Sejun Jeon, Soon-Won Kwon, Huxian Jin, Jun-Gi Jo, Tai Young Kim, Jake Eu, Jinho Park, Hyeon-Min Bae
2017 J jnl
A 103.125-Gb/s Reverse Gearbox IC in 40-nm CMOS for Supporting Legacy 10- and 40-GbE Links.
IEEE J. Solid State Circuits
Taehun Yoon, Joon-Yeong Lee, Jinhee Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Jinho Han, Hyosup Won, Jinho Park, Hyeon-Min Bae
2017 J jnl
A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hyosup Won, Joon-Yeong Lee, Taehun Yoon, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae
2016 J jnl
A Power-and-Area Efficient 10 × 10 Gb/s Bootstrap Transceiver in 40 nm CMOS for Referenceless and Lane-Independent Operation.
IEEE J. Solid State Circuits
Joon-Yeong Lee, Kwangseok Han, Taehun Yoon, Taeho Kim, Sangeun Lee, Jeong-Sup Lee, Jinho Park, Hyeon-Min Bae
2015 J jnl
A 0.87 W Transceiver IC for 100 Gigabit Ethernet in 40 nm CMOS.
IEEE J. Solid State Circuits
Hyosup Won, Taehun Yoon, Jinho Han, Joon-Yeong Lee, Jong-Hyeok Yoon, Taeho Kim, Jeong-Sup Lee, Sangeun Lee, Kwangseok Han, Jinhee Lee, Jinho Park, Hyeon-Min Bae
2015 — conf
A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards.
VLSIC
Taehun Yoon, Joon-Yeong Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Hyosup Won, Jinho Park, Hyeon-Min Bae
2015 — conf
A power-and-area efficient 10 × 10 Gb/s bootstrap transceiver in 40 nm CMOS for reference-less and lane-independent operation.
CICC
Joon-Yeong Lee, Kwangseok Han, Taeho Kim, Sangeun Lee, Jeong-Sup Lee, Taehun Yoon, Jinho Park, Hyeon-Min Bae
2015 J jnl
An Automatic Loop Gain Control Algorithm for Bang-Bang CDRs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Soon-Won Kwon, Joon-Yeong Lee, Jinhee Lee, Kwangseok Han, Taeho Kim, Sangeun Lee, Jeong-Sup Lee, Taehun Yoon, Hyosup Won, Jinho Park, Hyeon-Min Bae
2015 — conf
An on-chip stochastic sigma-tracking eye-opening monitor for BER-optimal adaptive equalization.
CICC
Hyosup Won, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae
2006 J jnl
A matrix amplifier in 0.18-μm SOI CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jinho Park, David J. Allstot
2005 — conf
A full-range all-pass variable phase shifter for multiple antenna receivers.
ISCAS (3)
Hossein Zarei, Allan Ecker, Jinho Park, David J. Allstot
2004 — conf
A 12.5 GHz RF matrix amplifier in 180nm SOI CMOS.
ISCAS (1)
Jinho Park, David J. Allstot
2004 J jnl
Parasitic-aware RF circuit design and optimization.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jinho Park, Kiyong Choi, David J. Allstot
2004 — conf
RF circuit synthesis using particle swarm optimization.
ISCAS (5)
Jinho Park, David J. Allstot
2003 — conf
Parasitic-aware design and optimization of a fully integrated CMOS wideband amplifier.
ASP-DAC
Jinho Park, Kiyong Choi, David J. Allstot