Jing-Hong Conan Zhan

22 papers A 1Journal 6Unranked 15

Year	Rank	Type	Title / Venue / Authors
2020	—	`conf`	10.4 A 4×4 Dual-Band Dual-Concurrent WiFi 802.11ax Transceiver with Integrated LNA, PA and T/R Switch Achieving +20dBm 1024-QAM MCS11 Pout and -43dB EVM Floor in 55nm CMOS. ISSCC Eric Lu, Wen-Kai Li, Zhiming Deng, Edris Rostami, Pi-An Wu, Keng-Meng Chang, Yu-Chen Chuang, Chang-Ming Lai, Yang-Chuan Chen, Tzu-Hsuin Peng, Tzung-Chuen Tsai, Hui-Hsien Liu, Chien-Chih Chiu, Bryan Huang, Yao-Chi Wang, Jing-Hong Conan Zhan, Osama Shana'a
2019	—	`conf`	Toward Automotive Surround-View Radars. ISSCC Chih-Ming Hung, Alex T. C. Lin, B. C. Peng, Hua Wang, Jui-Lin Hsu, Yen-Ju Lu, Wei-Show Hsu, Jing-Hong Conan Zhan, Brian Juan, Chi-Hang Lok, Sam Lee, P. C. Hsiao, Qiang Zhou, Mark Wei, Hsiang-Yun Chu, Yu-Lun Chen, Chao-Ching Hung, Kevin Fong, Po-Chun Huang, Pierce Chen, Sheng-Yuan Su, Yan-Jiun Chen, Kehou Chen, Chun-Chao Tung, Yi-Jhan Hsieh, Tzung-Chuen Tsai, Yi-Fu Chen, Wei-Kuo Hsin, Liang Guo, Hanfei Liu, Dapeng Jin
2014	—	`conf`	28.2 A 0.29mm ISSCC YuLi Hsueh, Lan-Chou Cho, Chih-Hsien Shen, Yi-Chien Tsai, Tzu-Chan Chueh, Tao-Yao Chang, Jui-Lin Hsu, Jing-Hong Conan Zhan
2013	—	`conf`	Session 20 overview: Frequency generation. ISSCC Marc Tiebout, Jing-Hong Conan Zhan
2012	—	`conf`	A 4-in-1 (WiFi/BT/FM/GPS) connectivity SoC with enhanced co-existence performance in 65nm CMOS. ISSCC Yuan-Hung Chung, Min Chen, Wei-Kai Hong, Jie-Wei Lai, Sheng-Jau Wong, Chien-Wei Kuan, Hong-Lin Chu, Chihun Lee, Chih-Fan Liao, Hsuan-Yu Liu, Hong-Kai Hsu, Li-chun Ko, Kuo-Hao Chen, Chao-Hsin Lu, Tsung-Ming Chen, YuLi Hsueh, Chunwei Chang, Yi-Hsien Cho, Chih-Hsien Shen, Yuan Sun, Eng-Chuan Low, Xudong Jiang, Deyong Hu, Weimin Shu, Jhy-Rong Chen, Jui-Lin Hsu, Chia-Jui Hsu, Jing-Hong Conan Zhan, Osama Shana'a, Guang-Kaai Dehng, George Chien
2011	J	`jnl`	A Fully-Integrated 16-Element Phased-Array Receiver in SiGe BiCMOS for 60-GHz Communications. IEEE J. Solid State Circuits Arun Natarajan, Scott K. Reynolds, Ming-Da Tsai, Sean T. Nicolson, Jing-Hong Conan Zhan, Dong Gun Kam, Duixian Liu, Yen-Lin Oscar Huang, Alberto Valdes-Garcia, Brian A. Floyd
2011	—	`conf`	Good, bad, ugly - 20 years of broadband evolution: What's next? ISSCC Jerry Lin, Franz Dielacher, Jing-Hong Conan Zhan, Robert Payne
2011	J	`jnl`	Single-element and phased-array transceiver chipsets for 60-ghz Gb/s communications. IEEE Commun. Mag. Alberto Valdes-Garcia, Scott K. Reynolds, Arun Natarajan, Dong Gun Kam, Duixian Liu, Jie-Wei Lai, Yen-Lin Oscar Huang, Ping-yu Chen, Ming-Da Tsai, Jing-Hong Conan Zhan, Sean Nicolson, Brian A. Floyd
2010	J	`jnl`	A Fully Integrated 16-Element Phased-Array Transmitter in SiGe BiCMOS for 60-GHz Communications. IEEE J. Solid State Circuits Alberto Valdes-Garcia, Sean T. Nicolson, Jie-Wei Lai, Arun Natarajan, Ping-yu Chen, Scott K. Reynolds, Jing-Hong Conan Zhan, Dong Gun Kam, Duixian Liu, Brian A. Floyd
2010	—	`conf`	A SiGe BiCMOS 16-element phased-array transmitter for 60GHz communications. ISSCC Alberto Valdes-Garcia, Sean Nicolson, Jie-Wei Lai, Arun Natarajan, Ping-yu Chen, Scott K. Reynolds, Jing-Hong Conan Zhan, Brian A. Floyd
2009	J	`jnl`	A Digital Intensive Fractional-N PLL and All-Digital Self-Calibration Schemes. IEEE J. Solid State Circuits Ping-Ying Wang, Jing-Hong Conan Zhan, Hsiang-Hui Chang, Hsiu-Ming (Sherman) Chang
2008	J	`jnl`	A Broadband Low-Cost Direct-Conversion Receiver Front-End in 90 nm CMOS. IEEE J. Solid State Circuits Jing-Hong Conan Zhan, Brent R. Carlton, Stewart S. Taylor
2008	—	`conf`	A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE. ISSCC Hsiang-Hui Chang, Ping-Ying Wang, Jing-Hong Conan Zhan, Bing-Yu Hsieh
2008	—	`conf`	A fractional spur reduction technique for RF TDC-based all digital PLLs. ESSCIRC Ping-Ying Wang, Hsiang-Hui Chang, Jing-Hong Conan Zhan
2008	—	`conf`	An analog enhanced all digtial RF fractional-N PLL with self-calibrated capability. CICC Ping-Ying Wang, Jing-Hong Conan Zhan, Hsiang-Hui Chang, Bing-Yu Hsieh
2007	—	`conf`	A 5 GHz, 21 dBm output-IP3 resistive feedback LNA in 90-nm CMOS. ESSCIRC Bevin G. Perumana, Jing-Hong Conan Zhan, Stewart S. Taylor, Joy Laskar
2006	—	`conf`	A 5GHz resistive-feedback CMOS LNA for low-cost multi-standard applications. ISSCC Jing-Hong Conan Zhan, Stewart S. Taylor
2005	—	`conf`	A family of SiGe quadrature oscillators for microwave applications. ISCAS (5) Brian Welch, Jing-Hong Conan Zhan, Kevin T. Kornegay
2005	—	`conf`	Full-rate injection-locked 10.3Gb/s clock and data recovery circuit in a 45GHz-f CICC Jing-Hong Conan Zhan, Jon S. Duster, Kevin T. Kornegay
2004	J	`jnl`	A 25-GHz emitter degenerated LC VCO. IEEE J. Solid State Circuits Jing-Hong Conan Zhan, Jon S. Duster, Kevin T. Kornegay
2004	A	`conf`	A comparative study of MOS VCOs for low voltage high performance operation. ISLPED Jing-Hong Conan Zhan, Jon S. Duster, Kevin T. Kornegay
2003	—	`conf`	Analysis of emitter degenerated LC oscillators using bipolar technologies. ISCAS (1) Jing-Hong Conan Zhan, Kyle Maurice, Jon S. Duster, Kevin T. Kornegay