Jin Liu

54 papers A 3B 2C 3Journal 23Unranked 23
YearRankTypeTitle / Venue / Authors
2024 J jnl
A High-Efficiency 40.68-MHz Single-Stage Dual-Output Regulating Rectifier With ZVS and Synchronous PFM Control for Wireless Powering.
IEEE J. Solid State Circuits
Ziyang Luo, Jin Liu, Hoi Lee
2023 J jnl
A 40.68-MHz Active Rectifier With Cycle-Based On-/Off-Delay Compensation for High-Current Biomedical Implants.
IEEE J. Solid State Circuits
Ziyang Luo, Jin Liu, Hoi Lee
2022 — conf
A 2-5MHz Multiple DC Output Hybrid Boost Converter with Scalable CR Boosting Scheme Achievi 1 ng 91% Efficie 1 ncy at a Conversion Ratio of 12.
ISSCC
Chen Chen, Jin Liu, Hoi Lee
2022 — conf
A 2.5-5MHz 87% Peak Efficiency 48V-to-1V Integrated Hybrid DC-DC Converter Adopting Ladder SC Network with Capacitor-Assisted Dual-Inductor Filtering.
ISSCC
Chen Chen, Jin Liu, Hoi Lee
2022 C conf
A 200mA-Load 0.62fs-FOM Active-Capacitor-Assisted Dual-loop Output Capacitorless Low-Dropout Regulator in Standard 65nm CMOS.
ISCAS
Weijie Han, Ziyang Luo, Chen Chen, Jin Liu, Hoi Lee
2022 C conf
A 3
ISCAS
Jiu Xiong, Jeniffer Zhao, Jin Liu, Hoi Lee
2022 J jnl
A Continuous-Time Sigma-Delta Modulator With Continuous-Time Delay-Based Integrator.
IEEE Trans. Circuits Syst. II Express Briefs
Jiu Xiong, Jin Liu, Hoi Lee
2022 C conf
A Diode-Based D-2D DAC Architecture with Leakage Current Compensation for Ultra-low Power Application.
ISCAS
Jesse Coulon, Jin Liu
2022 J jnl
A Wide-Input-Range Low-Profile Adaptive Delay Compensated Hysteretic LED Driver With Enhanced Current Accuracy.
IEEE J. Solid State Circuits
Qi Cheng, Jin Liu, Hoi Lee
2021 J jnl
A 1.2-A Dual-Output SC DC-DC Regulator With Continuous Gate-Drive Modulation Achieving ≤0.01-mV/mA Cross Regulation.
IEEE J. Solid State Circuits
Zhe Hua, Qi Cheng, Jin Liu, Hoi Lee
2021 J jnl
A 2-MHz 9-45-V Input High-Efficiency Three-Switch ZVS Step-Up/-Down Hybrid Converter.
IEEE J. Solid State Circuits
Chen Chen, Jin Liu, Hoi Lee
2021 — conf
A 5-100V Input Low-Profile Adaptive Delay Compensated Hysteretic LED Driver with Enhanced Current Accuracy.
CICC
Qi Cheng, Jin Liu, Hoi Lee
2021 — conf
Two-step Time-to-Digital Converter using pulse-shifting time-difference repetition circuit.
ISOCC
Chang han Rho, Jin-Ku Kang, Jin Liu
2020 — conf
A 9 - 45V Input 2MHz 3-Switch ZVS Step-up / -down Hybrid Converter with 5x Volume Reduction.
CICC
Chen Chen, Jin Liu, Hoi Lee
2019 J jnl
A High-Efficiency Low-Profile Zero-Voltage Transition Synchronous Non-Inverting Buck-Boost Converter With Auxiliary-Component Sharing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Lin Cong, Jin Liu, Hoi Lee
2019 — conf
ADC Quantization with Overlapping Metastability Zones and Dual Reference Calibration.
MWSCAS
Jiajun Ren, Jiu Xiong, Jin Liu
2019 — conf
An 8-b 2b/cycle Asynchronous SAR ADC with Capacitive Divider Based RC-DAC.
MWSCAS
Jiu Xiong, Jiajun Ren, Jin Liu
2018 — conf
High-Speed ADC Quantization with Overlapping Metastability Zones.
MWSCAS
Jiajun Ren, Jiu Xiong, Jin Liu
2017 B conf
A New Receiver Architecture for MIMO Beam-Forming Applications.
GLOBECOM
Yucheng Dai, Yahia R. Ramadan, Hlaing Minn, Jiu Xiong, Jin Liu, Alan Gatherer
2017 J jnl
An efficient and robust method to determine the optimal tap coefficients of high speed FIR equalizer.
Sci. China Inf. Sci.
Guanming Huang, Donesh Gillin, Dian Zhou, Jin Liu, Xuan Zeng, Po-Yu Kuo
2017 — conf
An open-loop 28GHz 16-phase clock generator in 28nm CMOS.
MWSCAS
Jiu Xiong, Jin Liu, Yucheng Dai, Hlaing Minn
2016 J jnl
A Metastability Error Detection and Reduction Technique for Partially Active Flash ADCs.
IEEE Trans. Circuits Syst. II Express Briefs
Xiaochen Yang, Guoping Cui, Yang Zhang, Jiajun Ren, Jin Liu
2014 J jnl
A 10 GS/s 6 b Time-Interleaved Partially Active Flash ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaochen Yang, Jin Liu
2013 — conf
A 10GS/s 6b time-interleaved ADC with partially active flash sub-ADCs.
CICC
Xiaochen Yang, Robert Payne, Jin Liu
2013 J jnl
A 5-Gb/s Automatic Sub-Bit Between-Pair Skew Compensator for Parallel Data Communications in 0.13-µm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Yuxiang Zheng, Jin Liu, Robert Payne, Mark Morgan, Hoi Lee
2013 — conf
Study of ADC resolution and bandwidth requirement tradeoffs for high-speed data communications.
MWSCAS
Jin Liu, Vinod Mukundagiri
2012 J jnl
Ground Switching Load Modulation With Ground Isolation for Passive HF RFID Transponders.
IEEE Trans. Very Large Scale Integr. Syst.
Yunlei Li, Jin Liu, Hoi Lee
2011 J jnl
A 5-MHz 91% Peak-Power-Efficiency Buck Regulator With Auto-Selectable Peak- and Valley-Current Control.
IEEE J. Solid State Circuits
Mengmeng Du, Hoi Lee, Jin Liu
2011 — conf
An open-loop 10GHz 8-phase clock generator in 65nm CMOS.
CICC
Xiaochen Yang, Jin Liu
2010 J jnl
Bulk Voltage Trimming Offset Calibration for High-Speed Flash ADCs.
IEEE Trans. Circuits Syst. II Express Briefs
Junjie Yao, Jin Liu, Hoi Lee
2009 — conf
A 18mW 10Gbps continuous-time FIR equalizer for wired line data communications in 0.12µm CMOS.
CICC
Hao Liu, Jin Liu, Robert Payne, Cy Cantrell, Mark Morgan
2009 J jnl
A RF to DC Voltage Conversion Model for Multi-Stage Rectifiers in UHF RFID Transponders.
IEEE J. Solid State Circuits
Raymond E. Barnett, Jin Liu, Steve Lazar
2009 — conf
Gigabit transceivers and building blocks.
CICC
Jin Liu, Jim Buckwalter
2008 J jnl
An EEPROM Programming Controller for Passive UHF RFID Transponders With Gated Clock Regulation Loop and Current Surge Control.
IEEE J. Solid State Circuits
Raymond E. Barnett, Jin Liu
2007 — conf
An EEPROM Programming Controller for Passive UHF RFID Transponders with Gated Clock Regulation Loop and Current Surge Control.
CICC
Raymond E. Barnett, Jin Liu
2006 — conf
A 0.8V 1.52MHz MSVC Relaxation Oscillator with Inverted Mirror Feedback Reference for UHF RFID.
CICC
Raymond E. Barnett, Jin Liu
2006 J jnl
A 2.5- to 3.5-Gb/s Adaptive FIR Equalizer With Continuous-Time Wide-Bandwidth Delay Line in 0.25-$muhbox m$CMOS.
IEEE J. Solid State Circuits
Xiaofeng Lin, Jin Liu, Hoi Lee, Hao Liu
2006 J jnl
An accurate current source with on-chip self-calibration circuits for low-voltage current-mode differential drivers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Guangbin Zhang, Sooping Saw, Jin Liu, Scott Sterrantino, David K. Johnson, Sungyong Jung
2005 J jnl
A CMOS 0.25-μm continuous-time FIR filter with 125 ps per tap delay as a fractionally spaced receiver equalizer for 1-gb/s data transmission.
IEEE J. Solid State Circuits
Xiaofeng Lin, Sooping Saw, Jin Liu
2005 — conf
A continuous-time adaptive FIR equalizer with LNV-AIL delay line for 2.5Gb/s data communication.
CICC
Xiaofeng Lin, Hoi Lee, Jin Liu
2005 — conf
Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires.
ISCAS (1)
Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng
2005 J jnl
Power-optimal simultaneous buffer insertion/sizing and wire sizing for two-pin nets.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng
2004 A conf
2.45 GHz power and data transmission for a low-power autonomous sensors platform.
ISLPED
Stefano Gregori, Yunlei Li, Huijuan Li, Jin Liu, Franco Maloberti
2004 — conf
A CMOS impulse generator for UWB wireless communication systems.
ISCAS (4)
Youngkyun Jeong, Sungyong Jung, Jin Liu
2004 J jnl
A digital power spectrum estimation method for the adaptation of high-speed equalizers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaofeng Lin, Jin Liu
2004 J jnl
Parasitic modeling and analysis for a 1-Gb/s CMOS laser driver.
IEEE Trans. Circuits Syst. II Express Briefs
Sungyong Jung, Martin A. Brooke, Nan M. Jokerst, Jin Liu, Youngjoong Joo
2004 A conf
Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method.
DATE
Xin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles C. Chiang
2003 — conf
A CMOS analog continuous-time FIR filter for 1Gbps cable equalizer.
ISCAS (2)
Xiaofeng Lin, Jin Liu
2003 — conf
An accurate current source with on-chip self-calibration circuits for low-voltage differential transmitter drivers.
ISCAS (2)
Guangbin Zhang, Jin Liu, Sungyong Jung
2003 A conf
Power-Optimal Simultaneous Buffer Insertion/Sizing and Wire Sizing.
ICCAD
Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng
2003 — conf
Pulse extraction: a digital power spectrum estimation method for adaptation of Gbps equalizers.
ISCAS (1)
Xiaofeng Lin, Guangbin Zhang, Jin Liu
2002 J jnl
A CMOS feedforward neural-network chip with on-chip parallel learning for oscillation cancellation.
IEEE Trans. Neural Networks
Jin Liu, Martin A. Brooke, Kenichi Hirotsu
2002 — conf
A robust edge detector for motion detection.
ISCAS (4)
Guangbin Zhang, Jin Liu
1999 B conf
A fully parallel learning neural network chip for real-time control.
IJCNN
Jin Liu, Martin A. Brooke