Jin-Yi Lin

18 papers C 2Journal 6Unranked 10
YearRankTypeTitle / Venue / Authors
2025 J jnl
Development and validation of neonatal jaundice detection using smartphone application.
Comput. Biol. Medicine
Guan-Ting Shen, Yu-Hwan Liu, Jin-Yi Lin, Kai-Cheng Hsu, Hsin-Hsu Chou
2023 — conf
A Weightlifting Clean and Jerk Team Formation Model by Considering Barbell Trajectory and LSTM Neural Network.
HCI (41)
Jin-Yi Lin, Yan-Ren Ban, Ching-Ting Hsu, Wei Hua Ho, Pao-Hung Chung
2023 J jnl
Temperature-Prediction Based Rate-Adjusted Time and Space Mapping Algorithm for 3D CNN Accelerator Systems.
IEEE Trans. Computers
Jin-Yi Lin, Shu-Yen Lin
2023 — conf
iCAPD: A Deep Learning-Based Monitoring System for Continuous Ambulatory Peritoneal Dialysis.
ICCE-Taiwan
Ming-Che Chen, Hsin-Hsu Chou, Hsiag-Chun Chen, Jin-Yi Lin, Ren-Guei Hsu, Jia-Xiang Chen, Yu-Tse Lee, Jung-Yao Zhuo, Wan-Jung Chang, Yang-Kun Ou
2019 — conf
Dynamic Thermal-Aware Inter-Layer Perpendicular Downward Mapping for Three-Dimensional Convolutional Neural Network Accelerator.
GCCE
Shu-Yen Lin, Jin-Yi Lin
2017 J jnl
A 0.3 V 10-bit SAR ADC With First 2-bit Guess in 90-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jin-Yi Lin, Chih-Cheng Hsieh
2017 J jnl
Thermal- and Performance-Aware Address Mapping for the Multi-Channel Three-Dimensional DRAM Systems.
IEEE Access
Shu-Yen Lin, Jin-Yi Lin
2016 J jnl
A 0.4 V 1.94 fJ/conversion-step 10 bit 750 kS/s SAR ADC with Input-Range-Adaptive Switching.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pei-Chen Lee, Jin-Yi Lin, Chih-Cheng Hsieh
2016 — conf
A passband lock loop circuit system for band pass filter.
ISOCC
Hung-Wen Lin, Jin-Yi Lin
2016 — conf
A reconfigurable near-data systolic array accelerator for the three-dimensional DRAM systems.
GCCE
Shu-Yen Lin, Jin-Yi Lin, Cheng-Hung Lin
2015 J jnl
A 0.3 V 10-bit 1.17 f SAR ADC With Merge and Split Switching in 90 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jin-Yi Lin, Chih-Cheng Hsieh
2015 C conf
An 8-bit column-shared SAR ADC for CMOS image sensor applications.
ISCAS
Jin-Yi Lin, Kwuang-Han Chang, Chen-Che Kao, Shih-Chin Lo, Yan-Jiun Chen, Pei-Chen Lee, Chi-Hui Chen, Chin Yin, Chih-Cheng Hsieh
2015 — conf
Real-time data compression for thermal-controlled three-dimensional DRAM systems.
GCCE
Shu-Yen Lin, Jin-Yi Lin, Kai-Wei Chang, Cheng-Hung Huang
2014 — conf
A low-area digitalized channel selection filter for DSRC system.
VLSI-DAT
Hung-Wen Lin, Jin-Yi Lin, Min-Tai Chuang
2014 — conf
Thermal-aware architecture and mapping for multi-channel three-dimensional DRAM systems.
GCCE
Shu-Yen Lin, Jin-Yi Lin
2012 C conf
A 9.2b 47fJ/conversion-step asynchronous SAR ADC with input range prediction DAC switching.
ISCAS
Hsin-Yuan Huang, Jin-Yi Lin, Chih-Cheng Hsieh, Wen-Hsu Chang, Hann-Huei Tsai, Chin-Fong Chiu
2011 — conf
A new CMOS image sensor readout structure for 3D integrated imagers.
CICC
Shang-Fu Yeh, Jin-Yi Lin, Chih-Cheng Hsieh, Ka-Yi Yeh, Chung-Chi Jim Li
2011 — conf
Robot Pose and Velocity Estimation Using a Binocular Vision.
FIRA
Yin-Tien Wang, Shi-Hao Wang, Ying-Chieh Feng, Jin-Yi Lin