Jin-Ku Kang

75 papers C 5Journal 36Unranked 34
YearRankTypeTitle / Venue / Authors
2026 J jnl
AHCO-YOLO: An Algorithm-Hardware Co-Optimization Framework for Energy-Efficient and Real-Time Object Detection on Edge Devices.
IEEE Trans. Very Large Scale Integr. Syst.
Jaemyung Kim, Jin-Ku Kang, Yongwoo Kim
2025 J jnl
LLTQ+: A Hardware-Friendly Quantization Framework for Modern YOLO Architectures.
IEEE Access
Yugwon Seo, Jaemyung Kim, Jin-Ku Kang, Yongwoo Kim
2024 J jnl
1.4-8 Gb/s Low Power Quarter-Rate Single-Loop Referenceless CDR With Unlimited Capture Range.
IEEE Trans. Circuits Syst. II Express Briefs
Jin-Ho Kim, Tae Ho Kim, Hyung-Wook Lee, Jeong-Mi Park, Jin-Ku Kang
2024 — conf
A 12-28 Gb/s Temperature Compensated PAM-4 Transmitter with 7B4Q Maximum Transition Avoidance and Fractional-Spaced FFE.
ISOCC
Sua Kim, Jin-Ku Kang
2024 — conf
A 2.5-12.3 Gb/s continuous-rate referenceless CDR with counter-based unlimited frequency detection.
ISOCC
Yujin Na, Jin-Ku Kang
2024 J jnl
Adaptive Scaling Filter Pruning Method for Vision Networks With Embedded Devices.
IEEE Access
Hyunjun Ko, Jin-Ku Kang, Yongwoo Kim
2024 — conf
An Efficient and Fast Filter Pruning Method for Object Detection in Embedded Systems.
AICAS
Hyunjun Ko, Jin-Ku Kang, Yongwoo Kim
2024 — conf
Autoencoder-based Knowledge Distillation For Quantized YOLO Detector.
ISOCC
Yugwon Seo, Jin-Ku Kang, Yongwoo Kim
2024 — conf
Fast, Efficient and Lightweight Compressed Image Super-Resolution Network for Edge Devices.
AICAS
Jaemyung Kim, Jin-Ku Kang, Yongwoo Kim
2024 J jnl
MASCAR: Multidomain Adaptive Spatial-Spectral Variable Compression Artifact Removal Network for Multispectral Remote Sensing Images.
IEEE Trans. Geosci. Remote. Sens.
Jaemyung Kim, Hyun-Ho Kim, Doo-Chun Seo, Jae-Heon Jeong, Jin-Ku Kang, Yongwoo Kim
2024 — conf
The hardware implementation of QARMA-64 with RoCC on FPGA for memory encryption.
ISOCC
Hyunjae Park, Jin-Ku Kang, Yongwoo Kim
2023 — conf
A PAM-4 Baud-Rate CDR with High-Gain Phase Detector Using Shared Sampler.
ISOCC
Seoung-Geun Cho, Jin-Ku Kang
2023 — conf
A PAM-4 Receiver with Selective Reference Voltage Adaptation for Low Sensitivity to Sampler Voltage Variations.
ISOCC
Jeong-Mi Park, Jin-Ku Kang
2023 J jnl
A ±0.48°C (3σ) Inaccuracy BJT-Based Temperature Sensor With 241 μs Conversion Time for Display Driver IC in 40 nm CMOS.
IEEE Access
Yong-Sung Ahn, Jeong-Mi Park, Jin-Ku Kang, Jaehoon Jun
2023 C conf
An FPGA-based Lightweight Deblocking CNN for Edge Devices.
ISCAS
Jaemyung Kim, Jin-Ku Kang, Yongwoo Kim
2022 — conf
A Design and Implementation of MIPI A-PHY RTS Layer.
ISOCC
Sang-Ung Shin, Jin-Ku Kang, Yongwoo Kim
2022 J jnl
A Low-Cost Fully Integer-Based CNN Accelerator on FPGA for Real-Time Traffic Sign Recognition.
IEEE Access
Jaemyung Kim, Jin-Ku Kang, Yongwoo Kim
2022 — conf
A Low-Power Counter-based Digital CDR.
ISOCC
Hyun-In Kim, Jin-Ku Kang
2022 — conf
A Wide-range Low Power Quarter Rate Single Loop CDR.
ISOCC
Jin-Ho Kim, Jin-Ku Kang
2022 — conf
An FPGA Implementation of CNN-based Compression Artifact Reduction.
ISOCC
Jaemyung Kim, Jin-Ku Kang, Yongwoo Kim
2022 J jnl
An Overhead-Reduced Key Coding Technique for High-Speed Serial Interface.
IEEE Access
Jaepil Bak, Taek-Joon An, Youngwoo Kim, Jin-Ku Kang
2022 — conf
Filter Pruning Method for Inference Time Acceleration Based on YOLOX in Edge Device.
ISOCC
Jihun Jeon, Jin-Ku Kang, Yongwoo Kim
2022 — conf
High-speed Serial Interface using PWAM Signaling Scheme.
ISOCC
Hwan-Ung Kim, Jin-Ku Kang
2022 J jnl
Target Capacity Filter Pruning Method for Optimized Inference Time Based on YOLOv5 in Embedded Systems.
IEEE Access
Jihun Jeon, Jaemyung Kim, Jin-Ku Kang, Sungtae Moon, Yongwoo Kim
2021 J jnl
A 0.32-2.7 Gb/s Reference-Less Continuous-Rate Clock and Data Recovery Circuit With Unrestricted and Fast Frequency Acquisition.
IEEE Trans. Circuits Syst. II Express Briefs
Nguyen Huu Tho, Ho-Joon Lee, Taek-Joon An, Jin-Ku Kang
2021 J jnl
A Resource Efficient Integer-Arithmetic-Only FPGA-Based CNN Accelerator for Real-Time Facial Emotion Recognition.
IEEE Access
Jaemyung Kim, Jin-Ku Kang, Yongwoo Kim
2021 — conf
An 8 - 26 Gb/s Single Loop Reference-less CDR with Unrestricted Frequency Acquisition.
ISOCC
Hyung-Wook Lee, Kyeong-Min Ko, Jin-Ku Kang
2021 — conf
Design of 20Gb/s PAM4 Transmitter with Maximum Transition Elimination and Transition Compensation Techniques.
ISOCC
Kyeong-Min Ko, Dohyeon Kwon, Jin-Ku Kang
2021 — conf
Two-step Time-to-Digital Converter using pulse-shifting time-difference repetition circuit.
ISOCC
Chang han Rho, Jin-Ku Kang, Jin Liu
2020 J jnl
A 0.42-3.45 Gb/s Referenceless Clock and Data Recovery Circuit With Counter-Based Unrestricted Frequency Acquisition.
IEEE Trans. Circuits Syst. II Express Briefs
Kyung-Sub Son, Taek-Joon An, Yong-Hwan Moon, Jin-Ku Kang
2019 J jnl
A 2.41-pJ/bit 5.4-Gb/s Dual-Loop Reference-Less CDR With Fully Digital Quarter-Rate Linear Phase Detector for Embedded DisplayPort.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yong-Hwan Moon, Jae-Wook Yoo, Young-Soo Ryu, Sang-Ho Kim, Kyung-Sub Son, Jin-Ku Kang
2019 J jnl
Design of a third-order delta-sigma TDC with error-feedback structure.
IEICE Electron. Express
Seong-Mun An, Kyung-Sub Son, Taek-Joon An, Jin-Ku Kang
2019 J jnl
Eye-open monitor using two-dimensional counter value profile.
IEICE Electron. Express
Kyung-Sub Son, Yong-Hwan Moon, Sanghun Baek, Namyong Kim, Taek-Joon An, Jin-Ku Kang
2018 — conf
A Two-Step Time-to-Digital Converter using Ring Oscillator Time Amplifier.
ISOCC
Min Kim, Kyung-Sub Son, Namhoon Kim, Chang Hang Rho, Jin-Ku Kang
2017 J jnl
A 200 Mb/s∼3.2 Gb/s referenceless clock and data recovery circuit with bidirectional frequency detector.
IEICE Electron. Express
Nguyen Huu Tho, Kyung-Sub Son, Jin-Ku Kang
2016 — conf
A 200-Mb/s to 3-Gb/s wide-band referenceless CDR using bidirectional frequency detector.
ISOCC
Nguyen Huu Tho, Kyung-Sub Son, Kyongsu Lee, Jin-Ku Kang
2016 J jnl
A burst-mode clock and data recovery circuit with two symmetric quadrature VCO's.
IEICE Electron. Express
Bum-Hee Choi, Kyung-Sub Son, Taek-Joon An, Jin-Ku Kang
2016 — conf
A low jitter burst-mode clock and data recovery circuit with two symmetric VCO's.
APCCAS
Bum-Hee Choi, Kyung-Sub Son, Jin-Ku Kang
2015 J jnl
A Link Layer Design for DisplayPort Interface with State Machine Based Packet Processing.
J. Signal Process. Syst.
Hyun-Bae Jin, Gi-Yeol Bae, Kwang-Hee Yoon, Tae-Ho Kim, Ji-Hoon Jang, Byung Cheol Song, Jin-Ku Kang
2015 C conf
On-chip jitter tolerance measurement technique for CDR circuits.
ISCAS
Kyung-Sub Son, Kyongsu Lee, Jin-Ku Kang
2015 J jnl
On-chip jitter tolerance measurement technique with independent jitter frequency modulation from VCO in CDR.
IEICE Electron. Express
Kyung-Sub Son, Jin-Ku Kang
2015 J jnl
Precise time-difference repetition for TDC with delay mismatch cancelling scheme.
IEICE Electron. Express
In-Seok Kong, Kyung-Sub Son, Kyongsu Lee, Jin-Ku Kang
2014 J jnl
A 1.1 mW/Gb/s 10 Gbps half-rate clock-embedded transceiver for high-speed links in 65 nm CMOS.
IEICE Electron. Express
Kyongsu Lee, Youngjin Kim, Kyung-Sub Son, Sangmin Lee, Jin-Ku Kang
2014 J jnl
A 2.2-mW 20-135-MHz False-Lock-Free DLL for Display Interface in 0.15-µm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Yong-Hwan Moon, In-Seok Kong, Young-Soo Ryu, Jin-Ku Kang
2014 C conf
A 8.7mW 5-Gb/s clock and data recovery circuit with 0.18-µm CMOS.
ISCAS
Taek-Joon An, Kyung-Sub Son, Young-Jin Kim, In-Seok Kong, Jin-Ku Kang
2014 J jnl
A low jitter clock and data recovery with a single edge sensing Bang-Bang PD.
IEICE Electron. Express
Taek-Joon Ahn, Sang-Soon Im, Yong-Sung Ahn, Jin-Ku Kang
2014 J jnl
A low-power CDR using dynamic CML latches and V/I converter merged with XOR for half-rate linear phase detection.
IEICE Electron. Express
Taek-Joon Ahn, Kyung-Sub Son, Yong-Sung Ahn, Jin-Ku Kang
2014 J jnl
Automatic SfM-Based 2D-to-3D Conversion for Multi-Object Scenes.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hak Gu Kim, Jin-Ku Kang, Byung Cheol Song
2014 J jnl
Avoiding noise frequency interference with binary phase pulse driving and CDS for capacitive TSP controller.
IEICE Electron. Express
Yong-Sung Ahn, Taek-Joon Ahn, Kyongsu Lee, Jin-Ku Kang
2013 C conf
A low power BPSK demodulator for wireless implantable biomedical devices.
ISCAS
Benjamin P. Wilkerson, Jin-Ku Kang
2013 J jnl
An ultra-low power BPSK demodulator with dual band filtering for implantable biomedical devices.
IEICE Electron. Express
Benjamin P. Wilkerson, Joon-Hyup Seo, Jin-Cheol Seo, Jin-Ku Kang
2013 — conf
Three-dimensional perception improvement using sharpness adjustment and hardware implementation.
ICME Workshops
Hak Gu Kim, Jin-Ku Kang, Byung Cheol Song
2012 — conf
A 1.62/2.7/5.4Gbps clock and data recovery circuit for DisplayPort 1.2.
SoCC
Jin-Cheol Seo, Sang-Soon Im, Kwan-Hee Yoon, Seung-Wook Oh, Taek-Joon An, Gi-Yeol Bae, Jin-Ku Kang
2012 J jnl
A 10Gb/s adaptive equalizer with ISI level measurement.
IEICE Electron. Express
Tae-Ho Kim, Jin-Cheol Seo, Yong-Sung Ahn, Jin-Ku Kang
2012 — conf
A 60 to 200MHz SSCG with approximate Hershey-Kiss modulation profile in 0.11µm CMOS.
ISOCC
Seung-Wook Oh, Hyung-Min Park, Joon-Hyup Seo, Jae-Young Jang, Gi-Yeol Bae, Jin-Ku Kang
2012 — conf
A high-speed adaptive linear equalizer with ISI level detection using periodic training pattern.
ISOCC
Jin-Cheol Seo, Tae-Ho Kim, Taek-Joon An, Kwan Yoon, Jin-Ku Kang
2012 — conf
A non-coherent BPSK receiver with dual band filtering for implantable biomedical devices.
ICECS
Benjamin P. Wilkerson, Jin-Ku Kang
2012 C conf
An audio clock regenerator with a wide dividing ratio for HDMI.
ISCAS
Seung-Wuk Oh, Sang-Ho Kim, Jin-Ku Kang
2012 J jnl
Video denoising using overlapped motion compensation and advanced collaborative filtering.
J. Electronic Imaging
Tae Hwan Lee, Jin-Ku Kang, Byung Cheol Song
2011 J jnl
A 4 Gb/s Adaptive FFE/DFE Receiver with a Data-Dependent Jitter Measurement.
IEICE Trans. Electron.
Tae-Ho Kim, Yong-Hwan Moon, Jin-Ku Kang
2011 — conf
A 4Gb/s adaptive FFE/DFE receiver with data-dependent jitter measurement.
ESSCIRC
Tae-Ho Kim, Jong-Seok Han, Sang-Soon Im, Jae-Young Jang, Jin-Ku Kang
2011 — conf
Low-power non-coherent data and power recovery circuit for implantable biomedical devices.
ISOCC
Benjamin P. Wilkerson, Tae-Ho Kim, Jin-Ku Kang
2011 J jnl
Way-lookup buffer for low-power set-associative cache.
IEICE Electron. Express
Sungjae Lee, Jin-Ku Kang, Inhwan Lee
2010 — conf
A 1.7Gbps DLL-based Clock Data Recovery in 0.35µm CMOS.
SoCC
Sang-Ho Kim, Hyung-Min Park, Tae-Ho Kim, Jin-Ku Kang, Jin-Ho Kim, Jae-Youl Lee, Yoon-Kyung Choi, Myunghee Lee
2010 — conf
A CMOS 5.4/3.24Gbps dual-rate clock and data recovery design for DisplayPort v1.2.
SoCC
Jae-Wook Yoo, Tae-Ho Kim, Dong-Kyun Kim, Jin-Ku Kang
2010 J jnl
A DLL-based Clock Data Recovery with a modified input format.
IEICE Electron. Express
Tae-Ho Kim, Sang-Ho Kim, Jin-Ku Kang
2010 J jnl
SSCG with Hershey-Kiss modulation profile using Dual Sigma-Delta modulators.
IEICE Electron. Express
Hyung-Min Park, Hyun-Bae Jin, Jin-Ku Kang
2009 — conf
A 2.7Gbps & 1.62Gbps dual-mode clock and data recovery for DisplayPort in 0.18μm CMOS.
SoCC
Seungwon Lee, Tae-Ho Kim, Jae-Wook Yoo, Jin-Ku Kang
2008 — conf
An 8B/10B encoder with a modified coding table.
APCCAS
Yong-Woo Kim, Jin-Ku Kang
2008 J jnl
High-speed 8B/10B encoder design using a simplified coding table.
IEICE Electron. Express
Yong-Woo Kim, Beomseok Shin, Jin-Ku Kang
2005 — conf
3.125Gbps Reference-less Clock and Data Recovery using 4X Oversampling.
SoCC
Sung-Sop Lee, Hyung-Wook Jang, Jin-Ku Kang
2005 — conf
A clock recovery circuit using half-rate 4×-oversampling PD.
ISCAS (3)
Hyung-Wook Jang, Sung-Sop Lee, Jin-Ku Kang
2002 J jnl
A real time image processor for reproduction of gray levels in dark areas on plasma display panel (PDP).
IEEE Trans. Consumer Electron.
Chang-Hoon Lee, Seung-Ho Park, Jin-Ku Kang, Choon-Woo Kim
2001 — conf
A CMOS clock and data recovery with two-XOR phase-frequency detector circuit.
ISCAS (4)
Jin-Ku Kang, Dong-Hee Kim
1997 J jnl
A CMOS high-speed data recovery circuit using the matched delay sampling technique.
IEEE J. Solid State Circuits
Jin-Ku Kang, Wentai Liu, Ralph K. Cavin III