Jin-Fuw Lee

11 papers A* 1A 4C 2Journal 4
YearRankTypeTitle / Venue / Authors
2009 A conf
Yield estimation of SRAM circuits using "Virtual SRAM Fab".
ICCAD
Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das
2001 A conf
On the Signal Bounding Problem in Timing Analysis.
ICCAD
Jin-Fuw Lee, Daniel L. Ostapko, Jeffery Soreff, C. K. Wong
1998 C conf
Methods for calculating coupling noise in early design: a comparative analysis.
ICCD
Khalid Rahmat, José Neves, Jin-Fuw Lee
1996 J jnl
A timing analysis algorithm for circuits with level-sensitive latches.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jin-Fuw Lee, Donald T. Tang, Chak-Kuen Wong
1995 A* conf
An Algorithm for Incremental Timing Analysis.
DAC
Jin-Fuw Lee, Donald T. Tang
1994 A conf
A timing analysis algorithm for circuits with level-sensitive latches.
ICCAD
Jin-Fuw Lee, Donald T. Tang, C. K. Wong
1992 J jnl
A performance-aimed cell compactor with automatic jogs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jin-Fuw Lee, Chak-Kuen Wong
1992 A conf
HIMALAYAS - a hierarchical compaction system with a minimized constraint set.
ICCAD
Jin-Fuw Lee, Donald T. Tang
1991 C conf
A Layout Compaction Algorithm with Multiple Grid Constraints.
ICCD
Jin-Fuw Lee
1988 J jnl
A new framework of design rules for compaction of VLSI layouts.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jin-Fuw Lee
1987 J jnl
VLSI Layout Compaction with Grid and Mixed Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jin-Fuw Lee, Donald T. Tang