Jiing-Yuan Lin

11 papers A 4Journal 2Unranked 5
YearRankTypeTitle / Venue / Authors
2008 — conf
Experiences of low power design implementation and verification.
ASP-DAC
Shi-Hao Chen, Jiing-Yuan Lin
2007 — conf
DFM/DFY practices during physical designs for timing, signal integrity, and power.
ASP-DAC
Shi-Hao Chen, Ke-Cheng Chu, Jiing-Yuan Lin, Cheng-Hong Tsai
2007 J jnl
Integration, Verification and Layout of a Complex Multimedia SOC
CoRR
Chien-Liang Chen, Jiing-Yuan Lin, Youn-Long Lin
2005 A conf
Integration, Verification and Layout of a Complex Multimedia SOC.
DATE
Chien-Liang Chen, Jiing-Yuan Lin, Youn-Long Lin
2000 — conf
A new method for constructing IP level power model based on power sensitivity.
ASP-DAC
Heng-Liang Huang, Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou
1999 J jnl
A structure-oriented power modeling technique for macrocells.
IEEE Trans. Very Large Scale Integr. Syst.
Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou
1997 A conf
A power modeling and characterization method for macrocells using structure information.
ICCAD
Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou
1997 — conf
CB-Power: a hierarchical cell-based power characterization and estimation environment for static CMOS circuits.
ASP-DAC
Wen-Zen Shen, Jiing-Yuan Lin, Jyh-Ming Lu
1996 A conf
A power modeling and characterization method for the CMOS standard cell library.
ICCAD
Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou
1995 — conf
Transistor reordering rules for power reduction in CMOS gates.
ASP-DAC
Wen-Zen Shen, Jiing-Yuan Lin, Fong-Wen Wang
1994 A conf
A cell-based power estimation in CMOS combinational circuits.
ICCAD
Jiing-Yuan Lin, Tai-Chien Liu, Wen-Zen Shen