Jihong Ren

21 papers A* 3C 1Journal 8Unranked 9
YearRankTypeTitle / Venue / Authors
2024 J jnl
Ambiguity Elimination of Vessel Target Azimuth for Shipborne HFSWR.
IEEE Trans. Aerosp. Electron. Syst.
Yonggang Ji, Xinling Wang, Farui Li, Jihong Ren, Taoli Li, Yiming Wang, Weifeng Sun
2023 J jnl
Motion Compensation Method Using Direct Wave Signal for CTSR Bistatic HFSWR.
IEEE Geosci. Remote. Sens. Lett.
Yonggang Ji, Xiaoyu Cheng, Yiming Wang, Weifeng Sun, Xi Zhang, Meicheng Jiang, Jihong Ren, Farui Li
2015 J jnl
A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology.
IEEE J. Solid State Circuits
Reza Navid, E-Hung Chen, Masum Hossain, Brian S. Leibowitz, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
2014 — conf
A 40-Gb/s serial link transceiver in 28-nm CMOS technology.
VLSIC
E-Hung Chen, Masum Hossain, Brian S. Leibowitz, Reza Navid, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
2014 — conf
A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering.
VLSIC
Masum Hossain, E-Hung Chen, Reza Navid, Brian S. Leibowitz, Chuen-Huei Adam Chou, Simon Li, Myeong-Jae Park, Jihong Ren, Barry Daly, Bruce Su, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
2012 — conf
A 27-Gb/s, 0.41-mW/Gb/s 1-tap predictive decision feedback equalizer in 40-nm low-power CMOS.
CICC
Kambiz Kaviani, Masum Hossain, Meisam Honarvar Nazari, Fred Heaton, Jihong Ren, Jared Zerbe
2011 J jnl
A 5 Gb/s Link With Matched Source Synchronous and Common-Mode Clocking Techniques.
IEEE J. Solid State Circuits
Jared Zerbe, Barry Daly, Lei Luo, Bill Stonecypher, Wayne D. Dettloff, John C. Eble, Teva Stone, Jihong Ren, Brian S. Leibowitz, Michael Bucher, Patrick Satarzadeh, Qi Lin, Yue Lu, Ravi T. Kollipara
2011 J jnl
Equalizer Design and Performance Trade-Offs in ADC-Based Serial Links.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jaeha Kim, E-Hung Chen, Jihong Ren, Brian S. Leibowitz, Patrick Satarzadeh, Jared Zerbe, Chih-Kong Ken Yang
2010 — conf
Equalizer design and performance trade-offs in ADC-based serial links.
CICC
Jaeha Kim, Jihong Ren, Brian S. Leibowitz, Patrick Satarzadeh, Ali-Azam Abbasfar, Jared Zerbe
2009 J jnl
Simulation and Analysis of Random Decision Errors in Clocked Comparators.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jaeha Kim, Brian S. Leibowitz, Jihong Ren, Chris J. Madden
2009 A* conf
Stochastic steady-state and AC analyses of mixed-signal systems.
DAC
Jaeha Kim, Jihong Ren, Mark A. Horowitz
2008 — conf
Characterization of random decision errors in clocked comparators.
CICC
Brian S. Leibowitz, Jaeha Kim, Jihong Ren, Chris J. Madden
2008 J jnl
Near-Optimal Equalizer and Timing Adaptation for I/O Links Using a BER-Based Metric.
IEEE J. Solid State Circuits
E-Hung Chen, Jihong Ren, Brian S. Leibowitz, Hae-Chang Lee, Qi Lin, Kyung Suk Oh, Frank Lambrecht, Vladimir Stojanovic, Jared Zerbe, Chih-Kong Ken Yang
2007 — conf
A Jitter Attenuating Timing Chain.
ASYNC
Suwen Yang, Mark R. Greenstreet, Jihong Ren
2007 J jnl
An efficient linear programming solver for optimal filter synthesis.
Numer. Linear Algebra Appl.
Jihong Ren, Chen Greif, Mark R. Greenstreet
2006 — conf
Surfing Interconnect.
ASYNC
Mark R. Greenstreet, Jihong Ren
2005 A* conf
A unified optimization framework for equalization filter synthesis.
DAC
Jihong Ren, Mark R. Greenstreet
2004 C conf
A Signal Integrity Test Bed for PCB Buses.
ICCD
Jihong Ren, Mark R. Greenstreet
2004 — conf
Crosstalk Cancellation for Realistic PCB Buses.
PATMOS
Jihong Ren, Mark R. Greenstreet
2003 — conf
Equalizing Filter Design for Crosstalk Cancellation.
ISVLSI
Jihong Ren, Mark R. Greenstreet
2003 A* conf
Synthesizing optimal filters for crosstalk-cancellation for high-speed buses.
DAC
Jihong Ren, Mark R. Greenstreet