Jie Han

204 papers A* 9A 14B 2C 6Misc 3Journal 105Unranked 59
YearRankTypeTitle / Venue / Authors
2026 J jnl
LUT-ALMs: Trading Off Accuracy and Power for Approximate Logarithmic Multipliers via LUT Optimization.
IEEE Trans. Computers
Wenhui Zhang, Xinkuang Geng, Xiaolu Hu, Hui Wang, Jianfei Jiang, Qin Wang, Siting Liu, Jie Han, Honglan Jiang
2026 J jnl
Model-based speech enhancement with spectral envelope correction using stacked autoencoders.
Eng. Appl. Artif. Intell.
Wenhao Lu, Zhenya Zang, Feng Qin, Xia Dong, Jie Han, Zuozhou Pan, Yiping Ke
2025 A conf
A Low-Power Mixed-Precision Integrated Multiply-Accumulate Architecture for Quantized Deep Neural Networks.
DATE
Xiaolu Hu, Xinkuang Geng, Zhigang Mao, Jie Han, Honglan Jiang
2025 C conf
An SRAM-based Stochastic Number Generator for Stochastic Computing.
ISCAS
Heng Shi, Zhengkun Yu, Tingting Zhang, Jie Han, Yumeng Yang, Siting Liu
2025 J jnl
Design of Highly-Accurate and Hardware-Efficient Spiking Neural Networks.
IEEE Trans. Circuits Syst. Artif. Intell.
Chengcheng Tang, Jie Han
2025 A conf
Lookup Table Refactoring: Towards Efficient Logarithmic Number System Addition for Large Language Models.
DATE
Xinkuang Geng, Siting Liu, Hui Wang, Jie Han, Honglan Jiang
2024 J jnl
A Design Framework for Hardware-Efficient Logarithmic Floating-Point Multipliers.
IEEE Trans. Emerg. Top. Comput.
Tingting Zhang, Zijing Niu, Jie Han
2024 A* conf
A High-Performance Stochastic Simulated Bifurcation Ising Machine.
DAC
Tingting Zhang, Hongqiao Zhang, Zhengkun Yu, Siting Liu, Jie Han
2024 J jnl
A Low-Cost and Fault-Tolerant Stochastic Architecture for the Bernsen Algorithm Using Bitstream Correlation.
J. Circuits Syst. Comput.
Shaowei Wang, Guangjun Xie, Wenbing Xu, Yongqiang Zhang, Jie Han
2024 — conf
A Low-Power and High-Accuracy Approximate Adder for Logarithmic Number System.
ACM Great Lakes Symposium on VLSI
Wenhui Zhang, Xinkuang Geng, Qin Wang, Jie Han, Honglan Jiang
2024 J jnl
A Survey on Approximate Multiplier Designs for Energy Efficiency: From Algorithms to Circuits.
ACM Trans. Design Autom. Electr. Syst.
Ying Wu, Chuangtao Chen, Weihua Xiao, Xuan Wang, Chenyi Wen, Jie Han, Xunzhao Yin, Weikang Qian, Cheng Zhuo
2024 J jnl
An Architectural Error Metric for CNN-Oriented Approximate Multipliers.
CoRR
Ao liu, Jie Han, Qin Wang, Zhigang Mao, Honglan Jiang
2024 J jnl
Design of a Stochastic Computing Architecture for the Phansalkar Algorithm.
IEEE Trans. Very Large Scale Integr. Syst.
Yongqiang Zhang, Jiao Qin, Jie Han, Guangjun Xie
2024 A* conf
Efficient Approximate Decomposition Solver using Ising Model.
DAC
Weihua Xiao, Tingting Zhang, Xingyue Qian, Jie Han, Weikang Qian
2024 J jnl
Hardware-Efficient Logarithmic Floating-Point Multipliers for Error-Tolerant Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zijing Niu, Tingting Zhang, Honglan Jiang, Bruce F. Cockburn, Leibo Liu, Jie Han
2024 J jnl
Learning the Error Features of Approximate Multipliers for Neural Network Applications.
IEEE Trans. Computers
Hai Mo, Yong Wu, Honglan Jiang, Zining Ma, Fabrizio Lombardi, Jie Han, Leibo Liu
2024 A* conf
QUQ: Quadruplet Uniform Quantization for Efficient Vision Transformer Inference.
DAC
Xinkuang Geng, Siting Liu, Leibo Liu, Jie Han, Honglan Jiang
2024 J jnl
Stochastic Mean Circuits Based on Inner-Product Units Using Correlated Bitstreams.
IEEE Trans. Circuits Syst. II Express Briefs
Yongqiang Zhang, Xiaoyue Chen, Jie Han, Guangjun Xie
2023 J jnl
A Survey on Approximate Multiplier Designs for Energy Efficiency: From Algorithms to Circuits.
CoRR
Ying Wu, Chuangtao Chen, Weihua Xiao, Xuan Wang, Chenyi Wen, Jie Han, Xunzhao Yin, Weikang Qian, Cheng Zhuo
2023 J jnl
A Timing-Aware Configurable Adder Based on Timing Detection for Low-Voltage Computing.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Xuemei Fan, Tingting Zhang, Hao Liu, Shengli Lu, Jie Han
2023 J jnl
An Approximate Parallel Annealing Ising Machine for Solving Traveling Salesman Problems.
IEEE Embed. Syst. Lett.
Qichao Tao, Tingting Zhang, Jie Han
2023 J jnl
An Energy-Efficient Binary-Interfaced Stochastic Multiplier Using Parallel Datapaths.
IEEE Trans. Very Large Scale Integr. Syst.
Yongqiang Zhang, Siting Liu, Jie Han, Zhendong Lin, Shaowei Wang, Xin Cheng, Guangjun Xie
2023 J jnl
Approximate Processing Element Design and Analysis for the Implementation of CNN Accelerators.
J. Comput. Sci. Technol.
Tong Li, Honglan Jiang, Hai Mo, Jie Han, Leibo Liu, Zhi-Gang Mao
2023 J jnl
Guest Editorial Unconventional Computing Techniques for Emerging Technology Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Paul P. Sotiriadis, Jie Han, M. Hassan Najafi, Josep Lluís Rosselló Sanz
2023 A conf
Hardware Efficient Weight-Binarized Spiking Neural Networks.
DATE
Chengcheng Tang, Jie Han
2023 J jnl
Highly Accurate and Energy Efficient Binary-Stochastic Multipliers for Fault-Tolerant Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Yongqiang Zhang, Lingyun Xie, Jie Han, Xin Cheng, Guangjun Xie
2023 A* conf
Improving Adversarial Robustness with Self-Paced Hard-Class Pair Reweighting.
AAAI
Pengyue Hou, Jie Han, Xingyu Li
2023 J jnl
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems.
IEEE Des. Test
Alberto Bosio, Mario Barbareschi, Alessandro Savino, Jie Han, Jürgen Teich
2022 — conf
A Brief Review of Logarithmic Multiplier Designs.
LATS
Tingting Zhang, Zijing Niu, Jie Han
2022 J jnl
A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators.
ACM J. Emerg. Technol. Comput. Syst.
Mario Barbareschi, Salvatore Barone, Alberto Bosio, Jie Han, Marcello Traiola
2022 C conf
A Review of Simulation Algorithms of Classical Ising Machines for Combinatorial optimization.
ISCAS
Tingting Zhang, Qichao Tao, Bailiang Liu, Jie Han
2022 J jnl
A stochastic computing architecture for local contrast and mean image thresholding algorithm.
Int. J. Circuit Theory Appl.
Wenbing Xu, Guangjun Xie, Shaowei Wang, Zhendong Lin, Jie Han, Yongqiang Zhang
2022 B conf
Adversarial Fine-tune with Dynamically Regulated Adversary.
IJCNN
Pengyue Hou, Ming Zhou, Jie Han, Petr Musílek, Xingyu Li
2022 J jnl
Adversarial Fine-tune with Dynamically Regulated Adversary.
CoRR
Pengyue Hou, Ming Zhou, Jie Han, Petr Musílek, Xingyu Li
2022 J jnl
An Energy-Efficient Approximate Divider Based on Logarithmic Conversion and Piecewise Constant Approximation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yong Wu, Honglan Jiang, Zining Ma, Pengfei Gou, Yong Lu, Jie Han, Shouyi Yin, Shaojun Wei, Leibo Liu
2022 — ch.
Approximate Computing for Efficient Neural Network Computation: A Survey.
Approximate Computing
Hao Zhang, Mohammadreza Asadikouhanjani, Jie Han, Deivalakshmi Subbian, Seok-Bum Ko
2022 J jnl
Characterizing Approximate Adders and Multipliers for Mitigating Aging and Temperature Degradations.
IEEE Trans. Circuits Syst. I Regul. Pap.
Francisco Javier Hernandez Santiago, Honglan Jiang, Hussam Amrouch, Andreas Gerstlauer, Leibo Liu, Jie Han
2022 A conf
Efficient Traveling Salesman Problem Solvers using the Ising Model with Simulated Bifurcation.
DATE
Tingting Zhang, Jie Han
2022 J jnl
Highly accurate division and square root circuits by exploiting signal correlation in stochastic computing.
Int. J. Circuit Theory Appl.
Shaowei Wang, Guangjun Xie, Jie Han, Yongqiang Zhang
2022 J jnl
Hybrid Partial Product-Based High-Performance Approximate Recursive Multipliers.
IEEE Trans. Emerg. Top. Comput.
Haroon Waris, Chenghua Wang, Weiqiang Liu, Jie Han, Fabrizio Lombardi
2022 J jnl
Improving Adversarial Robustness with Self-Paced Hard-Class Pair Reweighting.
CoRR
Pengyue Hou, Jie Han, Xingyu Li
2022 J jnl
Low-Power Approximate Logarithmic Squaring Circuit Design for DSP Applications.
IEEE Trans. Emerg. Top. Comput.
Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han
2022 — ch.
Majority Logic-Based Approximate Multipliers for Error-Tolerant Applications.
Approximate Computing
Tingting Zhang, Honglan Jiang, Weiqiang Liu, Fabrizio Lombardi, Leibo Liu, Seok-Bum Ko, Jie Han
2022 — ed.
Proceedings of the 17th ACM International Symposium on Nanoscale Architectures, NANOARCH 2022, Virtual, OR, USA, December 7-9, 2022
NANOARCH
Christof Teuscher, Jie Han
2022 A* conf
Solving traveling salesman problems via a parallel fully connected ising machine.
DAC
Qichao Tao, Jie Han
2022 A* conf
Upward Packet Popup for Deadlock Freedom in Modular Chiplet-Based Systems.
HPCA
Yibo Wu, Liang Wang, Xiaohang Wang, Jie Han, Jianfeng Zhu, Honglan Jiang, Shouyi Yin, Shaojun Wei, Leibo Liu
2021 J jnl
A Deflection-Based Deadlock Recovery Framework to Achieve High Throughput for Faulty NoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yibo Wu, Liang Wang, Xiaohang Wang, Jie Han, Shouyi Yin, Shaojun Wei, Leibo Liu
2021 — conf
A Logarithmic Floating-Point Multiplier for the Efficient Training of Neural Networks.
ACM Great Lakes Symposium on VLSI
Zijing Niu, Honglan Jiang, Mohammad Saeed Ansari, Bruce F. Cockburn, Leibo Liu, Jie Han
2021 — conf
A Review of Deterministic Approaches to Stochastic Computing.
NANOARCH
Zhendong Lin, Guangjun Xie, Shaowei Wang, Jie Han, Yongqiang Zhang
2021 J jnl
A Survey of Stochastic Computing Neural Networks for Machine Learning Applications.
IEEE Trans. Neural Networks Learn. Syst.
Yidong Liu, Siting Liu, Yanzhi Wang, Fabrizio Lombardi, Jie Han
2021 — conf
Absolute Subtraction and Division Circuits Using Uncorrelated Random Bitstreams in Stochastic Computing.
NANOARCH
Yuancheng Zhou, Guangjun Xie, Jie Han, Yongqiang Zhang
2021 J jnl
Accelerating Stochastic Computing Using Deterministic Halton Sequences.
IEEE Trans. Circuits Syst. II Express Briefs
Zhendong Lin, Guangjun Xie, Wenbing Xu, Jie Han, Yongqiang Zhang
2021 J jnl
An Improved Logarithmic Multiplier for Energy-Efficient Neural Computing.
IEEE Trans. Computers
Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han
2021 — conf
Design and Implementation of a Highly Accurate Stochastic Spiking Neural Network.
SiPS
Chengcheng Tang, Jie Han
2021 J jnl
Dropout Prediction Variation Estimation Using Neuron Activation Strength.
CoRR
Haichao Yu, Zhe Chen, Dong Lin, Gil I. Shamir, Jie Han
2021 J jnl
Exploiting Asymmetry in eDRAM Errors for Redundancy-Free Error-Tolerant Design.
IEEE Trans. Emerg. Top. Comput.
Shanshan Liu, Pedro Reviriego, Jing Guo, Jie Han, Fabrizio Lombardi
2021 J jnl
Fast and low-power leading-one detectors for energy-efficient logarithmic computing.
IET Comput. Digit. Tech.
Mohammad Saeed Ansari, Shyama Gandhi, Bruce F. Cockburn, Jie Han
2021 J jnl
High Performance CNN Accelerators Based on Hardware and Algorithm Co-Optimization.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tian Yuan, Weiqiang Liu, Jie Han, Fabrizio Lombardi
2021 J jnl
Non-Volatile Approximate Arithmetic Circuits Using Scalable Hybrid Spin-CMOS Majority Gates.
IEEE Trans. Circuits Syst. I Regul. Pap.
Honglan Jiang, Shaahin Angizi, Deliang Fan, Jie Han, Leibo Liu
2021 — conf
Solving Traveling Salesman Problems Using Ising Models with Simulated Bifurcation.
ISOCC
Tingting Zhang, Qichao Tao, Jie Han
2020 J jnl
A Novel Heuristic Search Method for Two-Level Approximate Logic Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sanbao Su, Chen Zou, Weijiang Kong, Jie Han, Weikang Qian
2020 J jnl
A Survey of Coarse-Grained Reconfigurable Architecture and Design: Taxonomy, Challenges, and Applications.
ACM Comput. Surv.
Leibo Liu, Jianfeng Zhu, Zhaoshi Li, Yanan Lu, Yangdong Deng, Jie Han, Shouyi Yin, Shaojun Wei
2020 J jnl
A robust wire crossing design for thermostability and fault tolerance in quantum-dot cellular automata.
Microprocess. Microsystems
Yongqiang Zhang, Guangjun Xie, Jie Han
2020 J jnl
Achieving Flexible Global Reconfiguration in NoCs Using Reconfigurable Rings.
IEEE Trans. Parallel Distributed Syst.
Liang Wang, Leibo Liu, Jie Han, Xiaohang Wang, Shouyi Yin, Shaojun Wei
2020 J jnl
Aggressive Fine-Grained Power Gating of NoC Buffers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yibo Wu, Leibo Liu, Liang Wang, Xiaohang Wang, Jie Han, Chenchen Deng, Shaojun Wei
2020 J jnl
Approximate Arithmetic Circuits: A Survey, Characterization, and Recent Applications.
Proc. IEEE
Honglan Jiang, Francisco Javier Hernandez Santiago, Hai Mo, Leibo Liu, Jie Han
2020 A* conf
CDRing: Reconfigurable Ring Architecture by Exploiting Cycle Decomposition of Torus Topology.
DAC
Liang Wang, Leibo Liu, Xiaohang Wang, Jie Han, Chenchen Deng, Shaojun Wei
2020 J jnl
Design, evaluation and application of approximate-truncated Booth multipliers.
IET Circuits Devices Syst.
Yuying Zhu, Weiqiang Liu, Peipei Yin, Tian Cao, Jie Han, Fabrizio Lombardi
2020 A conf
Dynamic Stochastic Computing for Digital Signal Processing Applications.
DATE
Siting Liu, Jie Han
2020 J jnl
High-Throughput FPGA-Based Hardware Accelerators for Deflate Compression and Decompression Using High-Level Synthesis.
IEEE Access
Morgan Ledwon, Bruce F. Cockburn, Jie Han
2020 J jnl
Improving the Accuracy and Hardware Efficiency of Neural Networks Using Approximate Multipliers.
IEEE Trans. Very Large Scale Integr. Syst.
Mohammad Saeed Ansari, Vojtech Mrazek, Bruce F. Cockburn, Lukás Sekanina, Zdenek Vasícek, Jie Han
2020 J jnl
Profile-Based Output Error Compensation for Approximate Arithmetic Circuits.
IEEE Trans. Circuits Syst.
Ke Chen, Weiqiang Liu, Jie Han, Fabrizio Lombardi
2019 A conf
A Hardware-Efficient Logarithmic Multiplier with Improved Accuracy.
DATE
Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han
2019 J jnl
A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, Jie Han
2019 J jnl
A Lifetime Reliability-Constrained Runtime Mapping for Throughput Optimization in Many-Core Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Liang Wang, Ping Lv, Leibo Liu, Jie Han, Ho-fung Leung, Xiaohang Wang, Shouyi Yin, Shaojun Wei, Terrence S. T. Mak
2019 J jnl
A Stochastic-Computing based Deep Learning Framework using Adiabatic Quantum-Flux-Parametron SuperconductingTechnology.
CoRR
Ruizhe Cai, Ao Ren, Olivia Chen, Ning Liu, Caiwen Ding, Xuehai Qian, Jie Han, Wenhui Luo, Nobuyuki Yoshikawa, Yanzhi Wang
2019 A* conf
A stochastic-computing based deep learning framework using adiabatic quantum-flux-parametron superconducting technology.
ISCA
Ruizhe Cai, Ao Ren, Olivia Chen, Ning Liu, Caiwen Ding, Xuehai Qian, Jie Han, Wenhui Luo, Nobuyuki Yoshikawa, Yanzhi Wang
2019 J jnl
An Energy-Efficient and Noise-Tolerant Recurrent Neural Network Using Stochastic Computing.
IEEE Trans. Very Large Scale Integr. Syst.
Yidong Liu, Leibo Liu, Fabrizio Lombardi, Jie Han
2019 — ch.
Approximate Arithmetic Circuits: Design and Evaluation.
Approximate Circuits
Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han
2019 — conf
Approximate Leading One Detector Design for a Hardware-Efficient Mitchell Multiplier.
CCECE
Shyama Gandhi, Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han
2019 — conf
Characterizing Approximate Adders and Multipliers Optimized under Different Design Constraints.
ACM Great Lakes Symposium on VLSI
Honglan Jiang, Francisco J. H. Santiago, Mohammad Saeed Ansari, Leibo Liu, Bruce F. Cockburn, Fabrizio Lombardi, Jie Han
2019 — conf
Design and Analysis of Majority Logic Based Approximate Radix-4 Booth Encoders.
NANOARCH
Tingting Zhang, Weiqiang Liu, Jie Han, Fabrizio Lombardi
2019 — conf
Design and Evaluation of an FPGA-based Hardware Accelerator for Deflate Data Decompression.
CCECE
Morgan Ledwon, Bruce F. Cockburn, Jie Han
2019 J jnl
Low-Power Approximate Unsigned Multipliers With Configurable Error Recovery.
IEEE Trans. Circuits Syst. I Regul. Pap.
Honglan Jiang, Cong Liu, Fabrizio Lombardi, Jie Han
2019 J jnl
Low-Power Unsigned Divider and Square Root Circuit Designs Using Adaptive Approximation.
IEEE Trans. Computers
Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han
2019 — conf
Pj-AxMTJ: Process-in-memory with Joint Magnetization Switching for Approximate Computing in Magnetic Tunnel Junction.
ISVLSI
Hao Cai, Honglan Jiang, Menglin Han, Zhaohao Wang, You Wang, Jun Yang, Jie Han, Leibo Liu, Weisheng Zhao
2019 J jnl
Serial concatenated convolutional code encoder in quantum-dot cellular automata.
Nano Commun. Networks
Yongqiang Zhang, Guangjun Xie, Jie Han
2018 — conf
A Probabilistic Error Model and Framework for Approximate Booth Multipliers.
NANOARCH
Yuying Zhu, Weiqiang Liu, Jie Han, Fabrizio Lombardi
2018 J jnl
A Stochastic Computational Multi-Layer Perceptron with Backward Propagation.
IEEE Trans. Computers
Yidong Liu, Siting Liu, Yanzhi Wang, Fabrizio Lombardi, Jie Han
2018 J jnl
A stochastic approach for the reliability evaluation of multi-state systems with dependent components.
Reliab. Eng. Syst. Saf.
Xiaogang Song, Zhengjun Zhai, Yidong Liu, Jie Han
2018 A conf
Adaptive approximation in arithmetic circuits: A low-power unsigned divider design.
DATE
Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han
2018 J jnl
An Area and Energy Efficient Design of Domain-Wall Memory-Based Deep Convolutional Neural Networks using Stochastic Computing.
CoRR
Xiaolong Ma, Yipeng Zhang, Geng Yuan, Ao Ren, Zhe Li, Jie Han, Jingtong Hu, Yanzhi Wang
2018 J jnl
An Energy-Efficient Online-Learning Stochastic Computational Deep Belief Network.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Yidong Liu, Yanzhi Wang, Fabrizio Lombardi, Jie Han
2018 — conf
An area and energy efficient design of domain-wall memory-based deep convolutional neural networks using stochastic computing.
ISQED
Xiaolong Ma, Yipeng Zhang, Geng Yuan, Ao Ren, Zhe Li, Jie Han, Jingtong Hu, Yanzhi Wang
2018 A conf
An energy-efficient stochastic computational deep belief network.
DATE
Yidong Liu, Yanzhi Wang, Fabrizio Lombardi, Jie Han
2018 — conf
Approximate Arithmetic Circuits and Their Applications.
NOCS
Jie Han
2018 — conf
Approximate On-chip Memory Optimization Method For Deep Residual Networks.
DSP
Xuedi Wang, Zhe Chen, Kaige Jia, Jie Han, Qi Wei, Fei Qiao, Huazhong Yang
2018 J jnl
Automatic Selection of Process Corner Simulations for Faster Design Verification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Michael Shoniker, Oleg Oleynikov, Bruce F. Cockburn, Jie Han, Manish Rana, Witold Pedrycz
2018 C conf
Design and Application of an Approximate 2-D Convolver with Error Compensation.
ISCAS
Ke Chen, Jie Han, Paolo Montuschi, Weiqiang Liu, Fabrizio Lombardi
2018 J jnl
Design, Evaluation and Application of Approximate High-Radix Dividers.
IEEE Trans. Multi Scale Comput. Syst.
Linbin Chen, Jie Han, Weiqiang Liu, Paolo Montuschi, Fabrizio Lombardi
2018 J jnl
Feedback-Based Low-Power Soft-Error-Tolerant Design for Dual-Modular Redundancy.
IEEE Trans. Very Large Scale Integr. Syst.
Yan Li, Yufeng Li, Jie Han, Jianhao Hu, Fan Yang, Xuan Zeng, Bruce F. Cockburn, Jie Chen
2018 J jnl
Gradient Descent Using Stochastic Circuits for Efficient Training of Learning Machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Siting Liu, Honglan Jiang, Leibo Liu, Jie Han
2018 — conf
Leveraging Spintronic Devices for Efficient Approximate Logic and Stochastic Neural Networks.
ACM Great Lakes Symposium on VLSI
Shaahin Angizi, Zhezhi He, Yu Bai, Jie Han, Mingjie Lin, Ronald F. DeMara, Deliang Fan
2018 J jnl
Low-Power Approximate Multipliers Using Encoded Partial Products and Approximate Compressors.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Mohammad Saeed Ansari, Honglan Jiang, Bruce F. Cockburn, Jie Han
2018 J jnl
Scalable Construction of Approximate Multipliers With Formally Guaranteed Worst Case Error.
IEEE Trans. Very Large Scale Integr. Syst.
Vojtech Mrazek, Zdenek Vasícek, Lukás Sekanina, Honglan Jiang, Jie Han
2018 J jnl
Stochastic Analysis of Multiplex Boolean Networks for Understanding Epidemic Propagation.
IEEE Access
Peican Zhu, Xiaogang Song, Leibo Liu, Zhen Wang, Jie Han
2018 J jnl
Toward Energy-Efficient Stochastic Circuits Using Parallel Sobol Sequences.
IEEE Trans. Very Large Scale Integr. Syst.
Siting Liu, Jie Han
2017 J jnl
A Multi-Objective Model Oriented Mapping Approach for NoC-based Computing Systems.
IEEE Trans. Parallel Distributed Syst.
Chen Wu, Chenchen Deng, Leibo Liu, Jie Han, Jiqiang Chen, Shouyi Yin, Shaojun Wei
2017 J jnl
A Review, Classification, and Comparative Evaluation of Approximate Arithmetic Circuits.
ACM J. Emerg. Technol. Comput. Syst.
Honglan Jiang, Cong Liu, Leibo Liu, Fabrizio Lombardi, Jie Han
2017 J jnl
A Stochastic Computational Approach for the Analysis of Fuzzy Systems.
IEEE Access
Xiaogang Song, Zhengjun Zhai, Peican Zhu, Jie Han
2017 A conf
A true random number generator based on parallel STT-MTJs.
DATE
Yuanzhuo Qu, Jie Han, Bruce F. Cockburn, Witold Pedrycz, Yue Zhang, Weisheng Zhao
2017 J jnl
Algorithm and Design of a Fully Parallel Approximate Coordinate Rotation Digital Computer (CORDIC).
IEEE Trans. Multi Scale Comput. Syst.
Linbin Chen, Jie Han, Weiqiang Liu, Fabrizio Lombardi
2017 Misc conf
An efficient hardware design for cerebellar models using approximate circuits: special session paper.
CODES+ISSS
Honglan Jiang, Leibo Liu, Jie Han
2017 J jnl
Approximate reliability of multi-state two-terminal networks by stochastic analysis.
IET Networks
Peican Zhu, Yangming Guo, Fabrizio Lombardi, Jie Han
2017 — conf
Design and operational assessment of an intra-cell hybrid L2 cache.
NANOARCH
Linbin Chen, Jie Han, Weiqiang Liu, Fabrizio Lombardi
2017 — conf
Design of Approximate High-Radix Dividers by Inexact Binary Signed-Digit Addition.
ACM Great Lakes Symposium on VLSI
Linbin Chen, Fabrizio Lombardi, Paolo Montuschi, Jie Han, Weiqiang Liu
2017 J jnl
Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing.
IEEE Trans. Computers
Weiqiang Liu, Liangyu Qian, Chenghua Wang, Honglan Jiang, Jie Han, Fabrizio Lombardi
2017 A conf
Energy efficient stochastic computing with Sobol sequences.
DATE
Siting Liu, Jie Han
2017 — conf
Evaluating Data Resilience in CNNs from an Approximate Memory Perspective.
ACM Great Lakes Symposium on VLSI
Yuanchang Chen, Yizhe Zhu, Fei Qiao, Jie Han, Yuansheng Liu, Huazhong Yang
2017 A* conf
Hardware ODE Solvers using Stochastic Circuits.
DAC
Siting Liu, Jie Han
2017 — conf
Partially universal modules for high performance logic circuit design.
MWSCAS
Ke Chen, Fabrizio Lombardi, Jie Han
2017 — ed.
Proceedings of the on Great Lakes Symposium on VLSI 2017, Banff, AB, Canada, May 10-12, 2017
ACM Great Lakes Symposium on VLSI
Laleh Behjat, Jie Han, Miroslav N. Velev, Deming Chen
2017 J jnl
Two Approximate Voting Schemes for Reliable Computing.
IEEE Trans. Computers
Ke Chen, Jie Han, Fabrizio Lombardi
2016 — conf
A Design of a Non-Volatile PMC-Based (Programmable Metallization Cell) Register File.
ACM Great Lakes Symposium on VLSI
Salin Junsangsri, Jie Han, Fabrizio Lombardi
2016 — conf
A Multi-accuracy-Level Approximate Memory Architecture Based on Data Significance Analysis.
ISVLSI
Yuanchang Chen, Xinghua Yang, Fei Qiao, Jie Han, Qi Wei, Huazhong Yang
2016 — conf
A comparative evaluation of approximate multipliers.
NANOARCH
Honglan Jiang, Cong Liu, Naman Maheshwari, Fabrizio Lombardi, Jie Han
2016 — conf
A fully parallel approximate CORDIC design.
NANOARCH
Linbin Chen, Fabrizio Lombardi, Jie Han, Weiqiang Liu
2016 — conf
A novel gate grading approach for soft error tolerance in combinational circuits.
CCECE
Mohammad Saeed Ansari, Ali Mahani, Jie Han, Bruce F. Cockburn
2016 — conf
Adaptive Filter Design Using Stochastic Circuits.
ISVLSI
Honglan Jiang, Chengkun Shen, Pieter P. Jonker, Fabrizio Lombardi, Jie Han
2016 J jnl
Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation.
IEEE Trans. Computers
Honglan Jiang, Jie Han, Fei Qiao, Fabrizio Lombardi
2016 — conf
Design and analysis of an approximate 2D convolver.
DFT
Ke Chen, Fabrizio Lombardi, Jie Han
2016 C conf
Design and evaluation of an approximate Wallace-Booth multiplier.
ISCAS
Liangyu Qian, Chenghua Wang, Weiqiang Liu, Fabrizio Lombardi, Jie Han
2016 J jnl
Design of a hybrid non-volatile SRAM cell for concurrent SEU detection and correction.
Integr.
Pilin Junsangsri, Jie Han, Fabrizio Lombardi
2016 J jnl
Design, evaluation and fault-tolerance analysis of stochastic FIR filters.
Microelectron. Reliab.
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
2016 Misc conf
Introduction to approximate computing.
VTS
Jie Han
2016 J jnl
Logic-in-Memory With a Nonvolatile Programmable Metallization Cell.
IEEE Trans. Very Large Scale Integr. Syst.
Pilin Junsangsri, Jie Han, Fabrizio Lombardi
2016 J jnl
On the Design of Approximate Restoring Dividers for Error-Tolerant Applications.
IEEE Trans. Computers
Linbin Chen, Jie Han, Weiqiang Liu, Fabrizio Lombardi
2016 — ed.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, GLVLSI 2016, Boston, MA, USA, May 18-20, 2016
ACM Great Lakes Symposium on VLSI
Ayse K. Coskun, Martin Margala, Laleh Behjat, Jie Han
2016 J jnl
Reliability Evaluation of Phased-Mission Systems Using Stochastic Computation.
IEEE Trans. Reliab.
Peican Zhu, Jie Han, Leibo Liu, Fabrizio Lombardi
2016 J jnl
Reliability and Criticality Analysis of Communication Networks by Stochastic Computation.
IEEE Netw.
Peican Zhu, Jie Han, Yangming Guo, Fabrizio Lombardi
2016 C conf
SRAM memory margin probability failure estimation using Gaussian Process regression.
ICCD
Manish Rana, Ramon Canal, Jie Han, Bruce F. Cockburn
2016 J jnl
Stochastic Circuit Design and Performance Evaluation of Vector Quantization for Different Error Measures.
IEEE Trans. Very Large Scale Integr. Syst.
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
2015 — conf
A Comparative Review and Evaluation of Approximate Adders.
ACM Great Lakes Symposium on VLSI
Honglan Jiang, Jie Han, Fabrizio Lombardi
2015 Misc conf
A Design Approach for Compressor Based Approximate Multipliers.
VLSID
Naman Maheshwari, Zhixi Yang, Jie Han, Fabrizio Lombardi
2015 J jnl
A Fault-Tolerant Technique Using Quadded Logic and Quadded Transistors.
IEEE Trans. Very Large Scale Integr. Syst.
Jie Han, Eugene Leung, Leibo Liu, Fabrizio Lombardi
2015 J jnl
A Flexible Energy- and Reliability-Aware Application Mapping for NoC-Based Reconfigurable Architectures.
IEEE Trans. Very Large Scale Integr. Syst.
Leibo Liu, Chen Wu, Chenchen Deng, Shouyi Yin, Qinghua Wu, Jie Han, Shaojun Wei
2015 J jnl
A Stochastic Approach for the Analysis of Dynamic Fault Trees With Spare Gates Under Probabilistic Common Cause Failures.
IEEE Trans. Reliab.
Peican Zhu, Jie Han, Leibo Liu, Fabrizio Lombardi
2015 — conf
A Ternary Content Addressable Cell Using a Single Phase Change Memory (PCM).
ACM Great Lakes Symposium on VLSI
Pilin Junsangsri, Fabrizio Lombardi, Jie Han
2015 — conf
A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures.
ASP-DAC
Leibo Liu, Yu Ren, Chenchen Deng, Shouyi Yin, Shaojun Wei, Jie Han
2015 J jnl
An Analytical Framework for Evaluating the Error Characteristics of Approximate Adders.
IEEE Trans. Computers
Cong Liu, Jie Han, Fabrizio Lombardi
2015 J jnl
An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chen Wu, Chenchen Deng, Leibo Liu, Jie Han, Jiqiang Chen, Shouyi Yin, Shaojun Wei
2015 A conf
An approximate voting scheme for reliable computing.
DATE
Ke Chen, Fabrizio Lombardi, Jie Han
2015 — conf
Approximate compressors for error-resilient multiplier design.
DFTS
Zhixi Yang, Jie Han, Fabrizio Lombardi
2015 J jnl
Circuits for a Perpendicular Magnetic Anisotropic (PMA) Racetrack Memory.
IEEE Trans. Multi Scale Comput. Syst.
Pilin Junsangsri, Jie Han, Fabrizio Lombardi
2015 — conf
DPALS: A dynamic programming-based algorithm for two-level approximate logic synthesis.
ASICON
Chen Zou, Weikang Qian, Jie Han
2015 J jnl
Design and Analysis of Approximate Compressors for Multiplication.
IEEE Trans. Computers
Amir Momeni, Jie Han, Paolo Montuschi, Fabrizio Lombardi
2015 — conf
Design and evaluation of stochastic FIR filters.
PACRIM
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
2015 — conf
Design of Approximate Unsigned Integer Non-restoring Divider for Inexact Computing.
ACM Great Lakes Symposium on VLSI
Linbin Chen, Jie Han, Weiqiang Liu, Fabrizio Lombardi
2015 J jnl
Efficient Fault-Tolerant Topology Reconfiguration Using a Maximum Flow Algorithm.
ACM Trans. Reconfigurable Technol. Syst.
Yu Ren, Leibo Liu, Shouyi Yin, Jie Han, Shaojun Wei
2015 — conf
Evaluating the impact of spike and flicker noise in phase change memories.
DFTS
Salin Junsangsri, Fabrizio Lombardi, Jie Han
2015 — conf
Matrix multiplication by an inexact systolic array.
NANOARCH
Ke Chen, Fabrizio Lombardi, Jie Han
2015 A conf
Minimizing the number of process corner simulations during design verification.
DATE
Michael Shoniker, Bruce F. Cockburn, Jie Han, Witold Pedrycz
2015 J jnl
On the Nonvolatile Performance of Flip-Flop/SRAM Cells With a Single MTJ.
IEEE Trans. Very Large Scale Integr. Syst.
Ke Chen, Jie Han, Fabrizio Lombardi
2015 J jnl
On the Restore Operation in MTJ-Based Nonvolatile SRAM Cells.
IEEE Trans. Very Large Scale Integr. Syst.
Ke Chen, Jie Han, Fabrizio Lombardi
2015 J jnl
Reliability-aware mapping for various NoC topologies and routing algorithms under performance constraints.
Sci. China Inf. Sci.
Chen Wu, Chenchen Deng, Leibo Liu, Shouyi Yin, Jie Han, Shaojun Wei
2015 — conf
Stochastic circuit design and performance evaluation of vector quantization.
ASAP
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
2015 — conf
Transmission gate-based approximate adders for inexact computing.
NANOARCH
Zhixi Yang, Jie Han, Fabrizio Lombardi
2014 J jnl
A Stochastic Approach for the Analysis of Fault Trees With Priority AND Gates.
IEEE Trans. Reliab.
Peican Zhu, Jie Han, Leibo Liu, Ming Jian Zuo
2014 J jnl
A Stochastic Computational Approach for Accurate and Efficient Reliability Evaluation.
IEEE Trans. Computers
Jie Han, Hao Chen, Jinghang Liang, Peican Zhu, Zhixi Yang, Fabrizio Lombardi
2014 A conf
A hybrid non-volatile SRAM cell with concurrent SEU detection and correction.
DATE
Pilin Junsangsri, Fabrizio Lombardi, Jie Han
2014 A conf
A low-power, high-performance approximate multiplier with configurable partial error recovery.
DATE
Cong Liu, Jie Han, Fabrizio Lombardi
2014 — conf
A memristor-based TCAM (Ternary Content Addressable Memory) cell.
NANOARCH
Pilin Junsangsri, Fabrizio Lombardi, Jie Han
2014 — conf
A system-level scheme for resistance drift tolerance of a multilevel phase change memory.
DFT
Pilin Junsangsri, Jie Han, Fabrizio Lombardi
2014 — conf
An enhanced HSPICE macromodel of a PCM cell with threshold switching and recovery behavior.
MWSCAS
Linbin Chen, Fabrizio Lombardi, Jie Han
2014 J jnl
Asynchronous Stochastic Boolean Networks as Gene Network Models.
J. Comput. Biol.
Peican Zhu, Jie Han
2014 — conf
FDSOI SRAM cells for low power design at 22nm technology node.
MWSCAS
Linbin Chen, Fabrizio Lombardi, Jie Han
2014 J jnl
Gene perturbation and intervention in context-sensitive stochastic Boolean networks.
BMC Syst. Biol.
Peican Zhu, Jinghang Liang, Jie Han
2014 — conf
HSPICE macromodel of a Programmable Metallization Cell (PMC) and its application to memory design.
NANOARCH
Pilin Junsangsri, Fabrizio Lombardi, Jie Han
2014 J jnl
Robust HSPICE modeling of a single electron turnstile.
Microelectron. J.
Wei Wei, Jie Han, Fabrizio Lombardi
2014 J jnl
Stochastic Multiple-Valued Gene Networks.
IEEE Trans. Biomed. Circuits Syst.
Peican Zhu, Jie Han
2013 J jnl
A 6.0-13.5 GHz Alias-Locked Loop Frequency Synthesizer in 130 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jinghang Liang, Zhiyin Zhou, Jie Han, Duncan G. Elliott
2013 — conf
A PCM-based TCAM cell using NDR.
NANOARCH
Hao Wu, Fabrizio Lombardi, Jie Han
2013 C conf
A VLSI architecture for enhancing the fault tolerance of NoC using quad-spare mesh topology and dynamic reconfiguration.
ISCAS
Yu Ren, Leibo Liu, Shouyi Yin, Qinghua Wu, Shaojun Wei, Jie Han
2013 J jnl
A fault tolerant NoC architecture using quad-spare mesh topology and dynamic reconfiguration.
J. Syst. Archit.
Yu Ren, Leibo Liu, Shouyi Yin, Jie Han, Qinghua Wu, Shaojun Wei
2013 J jnl
Analysis of Error Masking and Restoring Properties of Sequential Circuits.
IEEE Trans. Computers
Jinghang Liang, Jie Han, Fabrizio Lombardi
2013 B conf
Approximate computing: An emerging paradigm for energy-efficient design.
ETS
Jie Han, Michael Orshansky
2013 J jnl
New Metrics for the Reliability of Approximate and Probabilistic Adders.
IEEE Trans. Computers
Jinghang Liang, Jie Han, Fabrizio Lombardi
2012 — conf
Cell design and comparative evaluation of a novel 1T memristor-based memory.
NANOARCH
Vikas Sakode, Fabrizio Lombardi, Jie Han
2012 — conf
Design and reliability analysis of multiple valued logic gates using carbon nanotube FETs.
NANOARCH
Jinghang Liang, Jie Han, Linbin Chen, Fabrizio Lombardi
2012 — conf
Hardening a memory cell for low power operation by gate leakage reduction.
DFT
Jianping Gong, Yong-Bin Kim, Fabrizio Lombardi, Jie Han
2012 — conf
Macromodeling a phase change memory (PCM) cell by HSPICE.
NANOARCH
Pilin Junsangsri, Fabrizio Lombardi, Jie Han
2012 — conf
Modeling a single electron turnstile in HSPICE.
ACM Great Lakes Symposium on VLSI
Fabrizio Lombardi, Wei Wei, Jie Han
2012 J jnl
Stochastic Boolean networks: An efficient approach to modeling gene regulatory networks.
BMC Syst. Biol.
Jinghang Liang, Jie Han
2011 — conf
A Transistor-Level Stochastic Approach for Evaluating the Reliability of Digital Nanometric CMOS Circuits.
DFT
Hao Chen, Jie Han, Fabrizio Lombardi
2011 — conf
A hybrid memory cell using Single-Electron transfer.
NANOARCH
Wei Wei, Jie Han, Fabrizio Lombardi
2011 — conf
On the Effects of Intra-gate Resistive Open Defects in Gates at Nanoscaled CMOS.
DFT
Nachiket Rajderkar, Marco Ottavi, Salvatore Pontarelli, Jie Han, Fabrizio Lombardi
2011 — conf
On the Reliable Performance of Sequential Adders for Soft Computing.
DFT
Jinghang Liang, Jie Han, Fabrizio Lombardi
2011 J jnl
Reliability evaluation of logic circuits using probabilistic gate models.
Microelectron. Reliab.
Jie Han, Hao Chen, Erin Boykin, José A. B. Fortes
2010 — conf
Stochastic computational models for accurate reliability evaluation of logic circuits.
ACM Great Lakes Symposium on VLSI
Hao Chen, Jie Han
2005 — conf
Faults, Error Bounds and Reliability of Nanoelectronic Circuits.
ASAP
Jie Han, Erin Taylor, Jianbo Gao, José A. B. Fortes
2005 J jnl
Toward Hardware-Redundant, Fault-Tolerant Logic for Nanoelectronics.
IEEE Des. Test Comput.
Jie Han, Jianbo Gao, Yan Qi, Pieter Jonker, José A. B. Fortes
2004 — conf
From Massively Parallel Image Processors to Fault-Tolerant Nanocomputers.
ICPR (3)
Jie Han, Pieter Jonker
2003 — conf
A Study on Fault-Tolerant Circuits Using Redundancy.
VLSI
Jie Han, Pieter Jonker
2000 — conf
On Quantum and Classical Computing with Arrays of Superconducting Persistent Current Qubits.
CAMP
Pieter Jonker, Jie Han