Jiaxi Zhang

42 papers A* 4A 12C 5Journal 14Unranked 7
YearRankTypeTitle / Venue / Authors
2026 J jnl
AutoPDR: Circuit-Aware Solver Configuration Prediction for Hardware Model Checking.
CoRR
Guangyu Hu, Chen Chen, Xiaofeng Zhou, Jiaxi Zhang, Wei Zhang, Hongce Zhang
2025 J jnl
BoolSkeleton: Boolean Network Skeletonization via Homogeneous Pattern Reduction.
CoRR
Liwei Ni, Jiaxi Zhang, Shenggen Zheng, Junfeng Liu, Xingyu Meng, Biwei Xie, Xingquan Li, Huawei Li
2025 — conf
Bridging the Gap between Hardware Fuzzing and Industrial Verification.
ACM Great Lakes Symposium on VLSI
Ruiyang Ma, Tianhao Wei, Jiaxi Zhang, Chun Yang, Jiangfang Yi, Guojie Luo
2025 J jnl
Bridging the Gap between Hardware Fuzzing and Industrial Verification.
CoRR
Ruiyang Ma, Tianhao Wei, Jiaxi Zhang, Chun Yang, Jiangfang Yi, Guojie Luo
2025 A conf
CNOT Oriented Synthesis for Small-Scale Boolean Functions Using Spatial Structures of Parallelotopes.
ICCAD
Qiang Zheng, Yongzhen Xu, Jiaxi Zhang, Zhaofeng Su, Shenggen Zheng
2025 A conf
Wit-HW: Bug Localization in Hardware Design Code via Witness Test Case Generation.
ICCAD
Ruiyang Ma, Daikang Kuang, Ziqian Liu, Jiaxi Zhang, Ping Fan, Guojie Luo
2025 J jnl
Wit-HW: Bug Localization in Hardware Design Code via Witness Test Case Generation.
CoRR
Ruiyang Ma, Daikang Kuang, Ziqian Liu, Jiaxi Zhang, Ping Fan, Guojie Luo
2024 A conf
AceRoute: Adaptive Compute-Efficient FPGA Routing with Pluggable Intra-Connection Bidirectional Exploration.
ICCAD
Xinming Wei, Ziyun Zhang, Sunan Zou, Kaiwen Sun, Jiahao Zhang, Jiaxi Zhang, Ping Fan, Guojie Luo
2024 A conf
BESWAC: Boosting Exact Synthesis via Wiser SAT Solver Call.
DATE
Sunan Zou, Jiaxi Zhang, Bizhao Shi, Guojie Luo
2024 — conf
Incremental SAT-based Exact Synthesis.
ACM Great Lakes Symposium on VLSI
Sunan Zou, Jiaxi Zhang, Guojie Luo
2024 A* conf
PT-Map: Efficient Program Transformation Optimization for CGRA Mapping.
DAC
Bizhao Shi, Tuo Dai, Jiaxi Zhang, Xuechao Wei, Guojie Luo
2024 J jnl
PowerSyn: A Logic Synthesis Framework With Early Power Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sunan Zou, Jiaxi Zhang, Bizhao Shi, Guojie Luo
2024 A* conf
Rethinking IC Layout Vulnerability: Simulation-Based Hardware Trojan Threat Assessment with High Fidelity.
SP
Xinming Wei, Jiaxi Zhang, Guojie Luo
2024 — conf
SpecPIM: Accelerating Speculative Inference on PIM-Enabled System via Architecture-Dataflow Co-Exploration.
ASPLOS (3)
Cong Li, Zhe Zhou, Size Zheng, Jiaxi Zhang, Yun Liang, Guangyu Sun
2024 J jnl
VerilogReader: LLM-Aided Hardware Test Generation.
CoRR
Ruiyang Ma, Yuxin Yang, Ziqian Liu, Jiaxi Zhang, Min Li, Junhua Huang, Guojie Luo
2023 C conf
Adaptive Reconvergence-driven AIG Rewriting via Strategy Learning.
ICCD
Liwei Ni, Zonglin Yang, Jiaxi Zhang, Junfeng Liu, Huawei Li, Biwei Xie, Xinquan Li
2023 J jnl
Adaptive Reconvergence-driven AIG Rewriting via Strategy Learning.
CoRR
Liwei Ni, Zonglin Yang, Jiaxi Zhang, Junfeng Liu, Huawei Li, Biwei Xie, Xinquan Li
2023 — conf
Automated Design of Chiplets.
ISPD
Alberto L. Sangiovanni-Vincentelli, Zheng Liang, Zhe Zhou, Jiaxi Zhang
2023 J jnl
Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bizhao Shi, Jiaxi Zhang, Zhuolun He, Xuechao Wei, Sicheng Li, Guojie Luo, Hongzhong Zheng, Yuan Xie
2023 A conf
Fast Exact NPN Classification with Influence-Aided Canonical Form.
ICCAD
Yonghe Zhang, Liwei Ni, Jiaxi Zhang, Guojie Luo, Huawei Li, Shenggen Zheng
2023 J jnl
Fast Exact NPN Classification with Influence-aided Canonical Form.
CoRR
Yonghe Zhang, Liwei Ni, Jiaxi Zhang, Guojie Luo, Huawei Li, Shenggen Zheng
2023 A* conf
GDSII-Guard: ECO Anti-Trojan Optimization with Exploratory Timing-Security Trade-Offs.
DAC
Xinming Wei, Jiaxi Zhang, Guojie Luo
2023 J jnl
MEC: An Open-source Fine-grained Mapping Equivalence Checking Tool for FPGA.
CoRR
Liwei Ni, Zonglin Yang, Jiaxi Zhang, Changhong Feng, Jianhua Liu, Guojie Luo, Huawei Li, Biwei Xie, Xingquan Li
2023 J jnl
PASGCN: An ReRAM-Based PIM Design for GCN With Adaptively Sparsified Graphs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tao Yang, Dongyue Li, Fei Ma, Zhuoran Song, Yilong Zhao, Jiaxi Zhang, Fangxin Liu, Li Jiang
2023 A conf
Rethinking NPN Classification from Face and Point Characteristics of Boolean Functions.
DATE
Jiaxi Zhang, Shenggen Zheng, Liwei Ni, Huawei Li, Guojie Luo
2023 J jnl
Rethinking NPN Classification from Face and Point Characteristics of Boolean Functions.
CoRR
Jiaxi Zhang, Shenggen Zheng, Liwei Ni, Huawei Li, Guojie Luo
2022 — conf
EasyMAC: Design Exploration-Enabled Multiplier-Accumulator Generator Using a Canonical Architectural Representation: (Invited Paper).
ASP-DAC
Jiaxi Zhang, Qiuyang Gao, Yijiang Guo, Bizhao Shi, Guojie Luo
2022 C conf
Purlin: A Versatile Toolkit for the Generation and Simulation of On-Chip Networks.
ICCD
Yijiang Guo, Xinming Wei, Jiaxi Zhang, Guojie Luo
2021 C conf
An FPGA-Based Neural Network Overlay for ADAS Supporting Multi-Model and Multi-Mode.
ISCAS
Jiaxi Zhang, Tao Yang, Qingzheng Li, Bo Zhou, Yang Yang, Guojie Luo, Jianping Shi
2021 A conf
Enhanced Fast Boolean Matching based on Sensitivity Signatures Pruning.
ICCAD
Jiaxi Zhang, Liwei Ni, Shenggen Zheng, Hao Liu, Xiangfu Zou, Feng Wang, Guojie Luo
2021 J jnl
Enhanced Fast Boolean Matching based on Sensitivity Signatures Pruning.
CoRR
Jiaxi Zhang, Liwei Ni, Shenggen Zheng, Hao Liu, Xiangfu Zou, Feng Wang, Guojie Luo
2021 A* conf
Formulating Data-arrival Synchronizers in Integer Linear Programming for CGRA Mapping.
DAC
Yijiang Guo, Jiarui Wang, Jiaxi Zhang, Guojie Luo
2021 J jnl
STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Feng Wang, Guojie Luo, Guangyu Sun, Jiaxi Zhang, Jinfeng Kang, Yuhao Wang, Dimin Niu, Hongzhong Zheng
2020 A conf
Dual-Output LUT Merging during FPGA Technology Mapping.
ICCAD
Feng Wang, Liren Zhu, Jiaxi Zhang, Lei Li, Yang Zhang, Guojie Luo
2019 A conf
An Efficient Mapping Approach to Large-Scale DNNs on Multi-FPGA Architectures.
DATE
Wentai Zhang, Jiaxi Zhang, Minghua Shen, Guojie Luo, Nong Xiao
2019 C conf
Frequency Improvement of Systolic Array-Based CNNs on FPGAs.
ISCAS
Jiaxi Zhang, Wentai Zhang, Guojie Luo, Xuechao Wei, Yun Liang, Jason Cong
2019 — conf
Parallel Stateful Logic in RRAM: Theoretical Analysis and Arithmetic Design.
ASAP
Feng Wang, Guojie Luo, Guangyu Sun, Jiaxi Zhang, Peng Huang, Jinfeng Kang
2018 A conf
Adaptive-precision framework for SGD using deep Q-learning.
ICCAD
Wentai Zhang, Hanxian Huang, Jiaxi Zhang, Ming Jiang, Guojie Luo
2018 A conf
BoxPlacer: Force Directed-Based Timing-Driven Placement for Large-Scale FPGAs: (Abstract Only).
FPGA
Minghua Shen, Jiaxi Zhang, Nong Xiao, Guojie Luo
2018 A conf
Mapping Large-Scale DNNs on Asymmetric FPGAs: (Abstract Only).
FPGA
Wentai Zhang, Jiaxi Zhang, Minghua Shen, Nong Xiao, Guojie Luo
2017 C conf
Search space reduction for the non-exact projective NPNP Boolean matching problem.
ISCAS
Feng Wang, Jiaxi Zhang, Lange Wu, Wentai Zhang, Guojie Luo
2016 — conf
Scaling Up Physical Design: Challenges and Opportunities.
ISPD
Guojie Luo, Wentai Zhang, Jiaxi Zhang, Jason Cong