Jianzhuang Lu

19 papers B 1C 3Journal 4Unranked 11
YearRankTypeTitle / Venue / Authors
2025 — conf
A Multi-objective Mapping Optimization Strategy for Large-Scale NoC Design.
ICA3PP (5)
Yan Tang, Chen Li, Xiaowen Chen, Jianzhuang Lu, Yang Guo
2024 C conf
AFTP: An Adaptive High Cost-Effectiveness Fault-Tolerant NoC Design Based on Prediction.
ISPA
Xiaowen Chen, Ta Tan, Chen Li, Jianzhuang Lu, Qijin Zhu
2024 — conf
Load balancing-oriented fault-tolerant NoC design.
ITC-Asia
Ta Tan, Xiaowen Chen, Chen Li, Jianzhuang Lu
2022 B conf
Convolutional Neural Network Accelerator for Compression Based on Simon k-means.
IJCNN
Mingjie Wei, Yunping Zhao, Jianzhuang Lu, Xiaowen Chen, Chen Li, Zerun Li
2022 — conf
HCER: A High Cost-Effectiveness Multi-Bit Fault-Tolerant NoC Router.
HPCC/DSS/SmartCity/DependSys
Wencai Gao, Xiaowen Chen, Chen Li, Jianzhuang Lu, Hanyan Liu
2022 J jnl
TTQR: A Traffic- and Thermal-Aware Q-Routing for 3D Network-on-Chip.
Sensors
Hanyan Liu, Xiaowen Chen, Yunping Zhao, Chen Li, Jianzhuang Lu
2022 J jnl
Towards Convolutional Neural Network Acceleration and Compression Based on Simonk-Means.
Sensors
Mingjie Wei, Yunping Zhao, Xiaowen Chen, Chen Li, Jianzhuang Lu
2021 — conf
Accelerating Depthwise Separable Convolutions with Vector Processor.
ICANN (2)
Yuekai Zhao, Jianzhuang Lu, Xiaowen Chen
2021 — conf
Vectorized Winograd's algorithm for Convolution Neural networks.
ISPA/BDCloud/SocialCom/SustainCom
Yuekai Zhao, Jianzhuang Lu, Xiaowen Chen
2020 — conf
A Design of GEMM Parallel Computing Accelerator Based on Vector SIMD Technology.
ICCTA
Yunping Zhao, Jianzhuang Lu, Xiaowen Chen
2020 — conf
A Research and Design of Lightweight Convolutional Neural Networks Accelerator Based on Systolic Array Structure.
ICRAI
Yunping Zhao, Xiaowen Chen, Rui Xu, Jinhui Wei, Jianzhuang Lu, Bo Yuan
2020 J jnl
An Accelerator Design Using a MTCA Decomposition Algorithm for CNNs.
Sensors
Yunping Zhao, Jianzhuang Lu, Xiaowen Chen
2020 C conf
Dynamic GMMU Bypass for Address Translation in Multi-GPU Systems.
NPC
Jinhui Wei, Jianzhuang Lu, Qi Yu, Chen Li, Yunping Zhao
2015 — conf
Achieving Memory Access Equalization Via Round-Trip Routing Latency Prediction in 3D Many-Core NoCs.
ISVLSI
Xiaowen Chen, Zhonghai Lu, Yang Li, Axel Jantsch, Xueqian Zhao, Shuming Chen, Yang Guo, Zonglin Liu, Jianzhuang Lu, Jianghua Wan, Shuwei Sun, Shenggang Chen, Hu Chen
2011 — conf
Design and chip implementation of a heterogeneous multi-core DSP.
ASP-DAC
Shuming Chen, Xiaowen Chen, Yi Xu, Jianghua Wan, Jianzhuang Lu, Xiangyuan Liu, Shenggang Chen
2010 — conf
Supporting Efficient Synchronization in Multi-core NoCs Using Dynamic Buffer Allocation Technique.
ISVLSI
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Jianzhuang Lu, Hucheng Wu
2010 J jnl
YHFT-QDSP: High-Performance Heterogeneous Multi-Core DSP.
J. Comput. Sci. Technol.
Shuming Chen, Jianghua Wan, Jianzhuang Lu, Zhong Liu, Hai-Yan Sun, Yong-Jie Sun, Hengzhu Liu, Xiang-Yuan Liu, Zhentao Li, Yi Xu, Xiaowen Chen
2004 C conf
A Case of SCMP with TLS.
ISPA
Jianzhuang Lu, Chunyuan Zhang, Zhiying Wang, Yun Cheng, Dan Wu
2003 — conf
Predicate Analysis Based on Path Information.
APPT
Li Shen, Zhiying Wang, Jianzhuang Lu