Jiang Wu

15 papers A* 1B 2C 2Journal 9Unranked 1
YearRankTypeTitle / Venue / Authors
2026 J jnl
SRepair: Symbolic Regression-Based Repair for Hardware Design Code.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zizhen Liu, Deheng Yang, Xiaoguang Mao, Jiayu He, Guangda Zhang, Yan Lei, Jiang Wu
2025 J jnl
Rtl design flaws revisited: a data-driven study of systematic bug patterns in Verilog code.
J. Supercomput.
Xiankai Meng, Xiang Ji, Guangda Zhang, Jiayu He, Deheng Yang, Fangshu Chen, Jiahui Wang, Chengcheng Yu, Xinlin Zhao, Jiang Wu
2024 J jnl
An effective fault localization approach for Verilog based on enhanced contexts.
Frontiers Comput. Sci.
Zhuo Zhang, Ya Li, Lei Xia, Jianxin Xue, Jiang Wu, Xiaoguang Mao
2024 J jnl
Knowledge-Augmented Mutation-Based Bug Localization for Hardware Design Code.
ACM Trans. Archit. Code Optim.
Jiang Wu, Zhuo Zhang, Deheng Yang, Jianjun Xu, Jiayu He, Xiaoguang Mao
2024 B conf
Simple but Powerful Beginning: Metamorphic Verification Framework for Cryptographic Hardware Design.
ICPADS
Jianjun Xu, Jiang Wu, Jiayu He, Deheng Yang, Xiaoguang Mao
2024 J jnl
Strider: Signal Value Transition-Guided Defect Repair for HDL Programming Assignments.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Deheng Yang, Jiayu He, Xiaoguang Mao, Tun Li, Yan Lei, Xin Yi, Jiang Wu
2024 J jnl
Time-Aware Spectrum-Based Bug Localization for Hardware Design Code with Data Purification.
ACM Trans. Archit. Code Optim.
Jiang Wu, Zhuo Zhang, Deheng Yang, Jianjun Xu, Jiayu He, Xiaoguang Mao
2023 A* conf
Mantra: Mutation Testing of Hardware Design Code Based on Real Bugs.
DAC
Jiang Wu, Yan Lei, Zhuo Zhang, Xiankai Meng, Deheng Yang, Pan Li, Jiayu He, Xiaoguang Mao
2023 — conf
Validating the Redundancy Assumption for HDL from Code Clone's Perspective.
ISPD
Jianjun Xu, Jiayu He, Jingyan Zhang, Deheng Yang, Jiang Wu, Xiaoguang Mao
2022 C conf
Fault Localization for Hardware Design Code with Time-Aware Program Spectrum.
ICCD
Jiang Wu, Zhuo Zhang, Deheng Yang, Xiankai Meng, Jiayu He, Xiaoguang Mao, Yan Lei
2020 J jnl
A Highly Reliable Compilation Optimization Passes Sequence Generation Framework.
IEICE Trans. Inf. Syst.
Jiang Wu, Jianjun Xu, Xiankai Meng, Yan Lei
2020 J jnl
Compilation Optimization Pass Selection Using Gate Graph Attention Neural Network for Reliability Improvement.
IEEE Access
Jiang Wu, Jianjun Xu, Xiankai Meng, Haoyu Zhang, Zhuo Zhang, Long Li
2020 J jnl
Enabling Reliability-Driven Optimization Selection with Gate Graph Attention Neural Network.
Int. J. Softw. Eng. Knowl. Eng.
Jiang Wu, Jianjun Xu, Xiankai Meng, Haoyu Zhang, Zhuo Zhang
2020 C conf
High-Reliability Compilation Optimization Sequence Generation Framework Based ANN.
QRS
Jiang Wu, Jianjun Xu, Xiankai Meng, Zhuo Zhang, Nan Zhang, Haoyu Zhang
2020 B conf
Reliable Compilation Optimization Phase-ordering Exploration with Reinforcement Learning.
SMC
Jiang Wu, Xiankai Meng, Jianjun Xu, Haoyu Zhang