Jianan Wen

14 papers A 1C 2Journal 5Unranked 6
YearRankTypeTitle / Venue / Authors
2026 J jnl
End-to-End Design Flow for Resistive Neural Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Max Uhlmann, Tommaso Rizzi, Jianan Wen, Emilio Pérez-Bosch Quesada, Bakr Al Beattie, Karlheinz Ochs, Eduardo Pérez, Philip Ostrovskyy, Corrado Carta, Christian Wenger, Gerhard Kahmen
2026 J jnl
RRAM-Based Spectral-Domain Convolution Accelerator for Reliable and Energy-Efficient CNN Inference.
IEEE Trans. Very Large Scale Integr. Syst.
Jianan Wen, Andrea Baroni, Christian Wenger, Milos Krstic, Letícia Maria Veiras Bolzani
2025 J jnl
A Compact One-Transistor-Multiple-RRAM Characterization Platform.
IEEE Trans. Circuits Syst. I Regul. Pap.
Max Uhlmann, Milosz Krysik, Jianan Wen, Max Frohberg, Andrea Baroni, Keerthi Dorai Swamy Reddy, Eduardo Pérez, Philip Ostrovskyy, Krzysztof Piotrowski, Corrado Carta, Christian Wenger, Gerhard Kahmen
2025 J jnl
FsimNNs: An Open-Source Graph Neural Network Platform for SEU Simulation-based Fault Injection.
CoRR
Li Lu, Jianan Wen, Milos Krstic
2025 J jnl
RISC-V CPU Design Using RRAM-CMOS Standard Cells.
IEEE Trans. Very Large Scale Integr. Syst.
Markus Fritscher, Max Uhlmann, Philip Ostrovskyy, Daniel Reiser, Junchao Chen, Jianan Wen, Carsten Schulze, Gerhard Kahmen, Dietmar Fey, Marc Reichenbach, Milos Krstic, Christian Wenger
2025 C conf
ReDiM: An Efficient Strategy for Read Disturb Mitigation in RRAM-Based Accelerators.
IOLTS
Jianan Wen, Andrea Baroni, Alberto Mistroni, Eduardo Pérez, Cristian Zambelli, Christian Wenger, Milos Krstic, Letícia Maria Veiras Bolzani
2024 — conf
Cycle-Accurate FPGA Emulation of RRAM Crossbar Array: Efficient Device and Variability Modeling with Energy Consumption Assessment.
LATS
Jianan Wen, Fabian Luis Vargas, Fukun Zhu, Daniel Reiser, Andrea Baroni, Markus Fritscher, Eduardo Pérez, Marc Reichenbach, Christian Wenger, Milos Krstic
2024 — conf
HyRPF: Hybrid RRAM Prototyping on FPGA.
SAMOS
Daniel Reiser, Johannes Knödtel, Liliia Almeeva, Jianan Wen, Andrea Baroni, Milos Krstic, Marc Reichenbach
2024 A conf
Towards Reliable and Energy-Efficient RRAM Based Discrete Fourier Transform Accelerator.
DATE
Jianan Wen, Andrea Baroni, Eduardo Pérez, Max Uhlmann, Markus Fritscher, Karthik KrishneGowda, Markus Ulbricht, Christian Wenger, Milos Krstic
2023 — conf
LUT-based RRAM Model for Neural Accelerator Circuit Simulation.
NANOARCH
Max Uhlmann, Tommaso Rizzi, Jianan Wen, Emilio Pérez-Bosch Quesada, Bakr Al Beattie, Karlheinz Ochs, Eduardo Pérez, Philip Ostrovskyy, Corrado Carta, Christian Wenger, Gerhard Kahmen
2023 — conf
Prototyping Reconfigurable RRAM-Based AI Accelerators Using the RISC-V Ecosystem and Digital Twins.
ISC Workshops
Markus Fritscher, Alessandro Veronesi, Andrea Baroni, Jianan Wen, Thorsten Spätling, Mamathamba Kalishettyhalli Mahadevaiah, Norbert Herfurth, Eduardo Pérez, Markus Ulbricht, Marc Reichenbach, Amelie Hagelauer, Milos Krstic
2022 — conf
Evaluating Read Disturb Effect on RRAM based AI Accelerator with Multilevel States and Input Voltages.
DFT
Jianan Wen, Andrea Baroni, Eduardo Pérez, Markus Ulbricht, Christian Wenger, Milos Krstic
2021 C conf
Behavioral Model of Dot-Product Engine Implemented with 1T1R Memristor Crossbar Including Assessment.
DDECS
Jianan Wen, Markus Ulbricht, Eduardo Pérez, Xin Fan, Milos Krstic
2020 — conf
Low-Cost DNN Hardware Accelerator for Wearable, High-Quality Cardiac Arrythmia Detection.
ASAP
Johnson Loh, Jianan Wen, Tobias Gemmeke