Jiajia Cui

23 papers Journal 8Unranked 15
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Highly Power-Efficient Input-Boosted First Stage for Capacitively Coupled Chopper Instrumentation Amplifiers.
IEEE J. Solid State Circuits
Xinhang Xu, Siyuan Ye, Yaohui Luan, Jihang Gao, Jie Li, Jiajia Cui, Linxiao Shen
2026 J jnl
An Area-Efficient Noise-Shaping SAR ADC Utilizing Dynamic Common-Gate Amplifier With Charge-Boosted Amplification and Dynamic-Bulk-Switching.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jiajia Cui, Jihang Gao, Xinhang Xu, Yandong He, Linxiao Shen
2025 — conf
18.2 A 12.2μW 99.6dB-SNDR 184.8dB-FOMs DT Zoom PPD ΔΣM with Gain-Embedded Bootstrapped Sampler.
ISSCC
Yaohui Luan, Xinhang Xu, Jihang Gao, Jiajia Cui, Zhuoyi Chen, Siyuan Ye, Ru Huang, Linxiao Shen
2025 — conf
18.3: A 93.3dB SNDR, 180.4dB FoMs Calibration-Free Noise-Shaping Pipelined-SAR ADC with Cross-Stage Gain-Mismatch-Error-Shaping Technique and Negative-R-Assisted Residue Integrator.
ISSCC
Jihang Gao, Yaohui Luan, Siyuan Ye, Xinhang Xu, Zhuoyi Chen, Jiajia Cui, Ru Huang, Linxiao Shen
2025 — conf
18.5 A Rail-to-Rail 3
ISSCC
Siyuan Ye, Jiajia Cui, Jihang Gao, Jie Li, Xing Zhang, Ru Huang, Linxiao Shen
2025 — conf
A 110µW 99.5dB-SNDR 20kHz-BW Intrinsically Linear CTDSM with Hybrid Gm-Boosting OTA and Tri-Level FIR DACs.
CICC
Xinhang Xu, Yaohui Luan, Jie Li, Jihang Gao, Kwok Cheong Li, Jiajia Cui, Ru Huang, Linxiao Shen
2025 J jnl
A 2-mW 70.7-dB SNDR 200-MS/s Pipelined-SAR ADC Using Continuous-Time SAR-Assisted Detect-and-Skip and Open-Then-Close Correlated Level Shifting.
IEEE J. Solid State Circuits
Siyuan Ye, Jihang Gao, Jie Li, Zhuoyi Chen, Xinhang Xu, Jiajia Cui, Yaohui Luan, Le Ye, Xing Zhang, Ru Huang, Linxiao Shen
2025 J jnl
A Calibration-Free Pipelined-SAR ADC With Cross-Stage Gain-Mismatch Error Shaping and Inherent Noise Shaping.
IEEE J. Solid State Circuits
Jihang Gao, Yaohui Luan, Siyuan Ye, Jiajia Cui, Xinhang Xu, Linxiao Shen
2025 J jnl
A Flying-Capacitor-Based Reset Scheme for Low Power Dynamic Comparator.
IEEE Trans. Circuits Syst. II Express Briefs
Kwok Cheong Li, Xinhang Xu, Jihang Gao, Siyuan Ye, Jiajia Cui, Yacong Zhang, Ru Huang, Linxiao Shen
2025 — conf
An Easy-Drive 16MS/s Pipelined-SAR ADC Using Split Coarse-Fine Input-Buffer-Sampling Scheme and Fast Robust Background Inter-Stage Gain Calibration.
ISSCC
Zhuoyi Chen, Siyuan Ye, Jihang Gao, Jie Li, Jiajia Cui, Xinhang Xu, Yaohui Luan, Ru Huang, Linxiao Shen
2025 J jnl
An Energy-Efficient, High-Resolution kT/C-Noise- Canceled Pipelined-SAR Capacitance-to-Digital Converter With Incomplete-Settling-Based Correlated Level Shifting in 22-nm CMOS.
IEEE J. Solid State Circuits
Jihang Gao, Siyuan Ye, Jie Li, Xinhang Xu, Zhuoyi Chen, Jiajia Cui, Yaohui Luan, Ru Huang, Le Ye, Linxiao Shen
2025 — conf
Overview of NLPCC 2025 Shared Task 5: Chinese Government Text Correction with Knowledge Bases.
NLPCC (4)
Yang Song, Yuxiang Jia, Yuchen Yan, Jiajia Cui, Lingling Mu, Hongfei Xu
2025 — conf
Quality-Aware Neural Machine Translation with Self-evaluation.
CCL
Jiajia Cui, Lingling Mu, Qiuhui Liu, Hongfei Xu
2024 — conf
3.10 A 0.69/0.58-PEF 1.6nW/24nW Capacitively Coupled Chopper Instrumentation Amplifier with an Input-Boosted First Stage in 22nm/180nm CMOS.
ISSCC
Xinhang Xu, Siyuan Ye, Yaohui Luan, Jihang Gao, Jie Li, Jiajia Cui, Hao Zhang, Ru Huang, Linxiao Shen, Le Ye
2024 — conf
9.1 A 2mW 70.7dB SNDR 200MS/s Pipelined-SAR ADC with Continuous-Time SAR-Assisted Detect-and-Skip and Open-then-Close Correlated Level Shifting.
ISSCC
Siyuan Ye, Linxiao Shen, Jihang Gao, Jie Li, Zhuoyi Chen, Xinhang Xu, Jiajia Cui, Hao Zhang, Xing Zhang, Le Ye, Ru Huang
2024 — conf
9.4 A 182.3dB FoMs 50MS/s Pipelined-SAR ADC using Cascode Capacitively Degenerated Dynamic Amplifier and MSB Pre-Conversion Technique.
ISSCC
Zhuoyi Chen, Linxiao Shen, Siyuan Ye, Jihang Gao, Jie Li, Jiajia Cui, Xinhang Xu, Yaohui Luan, Hao Zhang, Le Ye, Ru Huang
2024 — conf
An 8b 1GS/s SAR ADC with Metastability-Based Resolution/Speed Enhancement and Self-Tuning Delay Achieving 47.2dB SNDR at Nyquist Input.
CICC
Jie Li, Linxiao Shen, Siyuan Ye, Jihang Gao, Jiajia Cui, Xinhang Xu, Zhuoyi Chen, Yaohui Luan, Yuanxin Bao, Ru Huang, Le Ye
2023 — conf
A 12.5-ppm/°C 1.086-nW/kHz Relaxation Oscillator with Clock-Gated Discrete-Time Comparator in 22nm CMOS Technology.
ESSCIRC
Xinhang Xu, Linxiao Shen, Siyuan Ye, Jiayi Wu, Zhuoyi Chen, Jihang Gao, Jiajia Cui, Yihan Zhang, Ru Huang, Le Ye
2023 — conf
A 22nm Delta-Sigma Computing-In-Memory (Δ∑CIM) SRAM Macro with Near-Zero-Mean Outputs and LSB-First ADCs Achieving 21.38TOPS/W for 8b-MAC Edge AI Processing.
ISSCC
Peiyu Chen, Meng Wu, Wentao Zhao, Jiajia Cui, Zhixuan Wang, Yadong Zhang, Qijun Wang, Jiayoon Ru, Linxiao Shen, Tianyu Jia, Yufei Ma, Le Ye, Ru Huang
2023 — conf
A 7.9fJ/Conversion-Step and 37.12aFrms Pipelined-SAR Capacitance-to-Digital Converter with kT/C Noise Cancellation and Incomplete-Settling-Based Correlated Level Shifting.
ISSCC
Jihang Gao, Linxiao Shen, Heyi Li, Siyuan Ye, Jie Li, Xinhang Xu, Jiajia Cui, Yunhung Gao, Ru Huang, Le Ye
2023 — conf
User behavior-based semi-supervised network service host threat detection.
ITCC
Fuxi Wang, Jiajia Cui, Jun Yang, Xianggen Wang, Biao Leng
2022 J jnl
Automatic Detection of the Cyclic Alternating Pattern of Sleep and Diagnosis of Sleep-Related Pathologies Based on Cardiopulmonary Resonance Indices.
Sensors
Jiajia Cui, Zhipei Huang, Jiankang Wu
2020 J jnl
A wearable system for cardiopulmonary assessment and personalized respiratory training.
Future Gener. Comput. Syst.
Jiajia Cui, Zhipei Huang, Dina Jiaerken, Ye Fan, Shuxia Zhao, Lingyan Zhang, Jiankang Wu