Jhih-Rong Gao

31 papers A* 4A 4Journal 15Unranked 8
YearRankTypeTitle / Venue / Authors
2020 J jnl
A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yuzhe Ma, Wei Zhong, Shuxiang Hu, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu
2018 J jnl
MrDP: Multiple-Row Detailed Placement of Heterogeneous-Sized Cells for Advanced Nodes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan
2017 A conf
A unified framework for simultaneous layout decomposition and mask optimization.
ICCAD
Yuzhe Ma, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu
2016 J jnl
EBL Overlapping Aware Stencil Planning for MCC System.
ACM Trans. Design Autom. Electr. Syst.
Bei Yu, Kun Yuan, Jhih-Rong Gao, Shiyan Hu, David Z. Pan
2016 A conf
MrDP: multiple-row detailed placement of heterogeneous-sized cells for advanced nodes.
ICCAD
Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan
2016 J jnl
PARR: Pin-Access Planning and Regular Routing for Self-Aligned Double Patterning.
ACM Trans. Design Autom. Electr. Syst.
Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan
2015 — conf
Directed Self-Assembly Based Cut Mask Optimization for Unidirectional Design.
ACM Great Lakes Symposium on VLSI
Jiaojiao Ou, Bei Yu, Jhih-Rong Gao, David Z. Pan, Moshe Preil, Azat Latypov
2015 J jnl
E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System.
CoRR
Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan
2015 J jnl
Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Yibo Lin, Zhuo Li, Charles J. Alpert, David Z. Pan
2015 A* conf
PARR: pin access planning and regular routing for self-aligned double patterning.
DAC
Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan
2014 J jnl
E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System.
CoRR
Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan
2014 J jnl
L-Shape based Layout Fracturing for E-Beam Lithography.
CoRR
Bei Yu, Jhih-Rong Gao, David Z. Pan
2014 J jnl
Lithography Hotspot Detection and Mitigation in Nanometer VLSI.
CoRR
Jhih-Rong Gao, Bei Yu, David Z. Pan
2014 A* conf
MOSAIC: Mask Optimizing Solution With Process Window Aware Inverse Correction.
DAC
Jhih-Rong Gao, Xiaoqing Xu, Bei Yu, David Z. Pan
2014 J jnl
Methodology for standard cell compliance and detailed placement for triple patterning lithography.
CoRR
Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, David Z. Pan
2014 J jnl
Self-Aligned Double Patterning Friendly Configuration for Standard Cell Library Considering Placement.
CoRR
Jhih-Rong Gao, Bei Yu, Ru Huang, David Z. Pan
2014 — conf
Self-aligned double patterning layout decomposition with complementary e-beam lithography.
ASP-DAC
Jhih-Rong Gao, Bei Yu, David Z. Pan
2014 J jnl
Triple Patterning Lithography (TPL) Layout Decomposition using End-Cutting (JM3 Special Session).
CoRR
Bei Yu, Subhendu Roy, Jhih-Rong Gao, David Z. Pan
2014 J jnl
Triple Patterning Lithography (TPL) Layout Decomposition using End-Cutting.
CoRR
Bei Yu, Jhih-Rong Gao, David Z. Pan
2013 J jnl
Design for Manufacturing With Emerging Nanolithography.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
David Z. Pan, Bei Yu, Jhih-Rong Gao
2013 A* conf
E-BLOW: e-beam lithography overlapping aware stencil planning for MCC system.
DAC
Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan
2013 — conf
L-shape based layout fracturing for e-beam lithography.
ASP-DAC
Bei Yu, Jhih-Rong Gao, David Z. Pan
2013 — conf
Lithography hotspot detection and mitigation in nanometer VLSI.
ASICON
Jhih-Rong Gao, Bei Yu, Duo Ding, David Z. Pan
2013 A conf
Methodology for standard cell compliance and detailed placement for triple patterning lithography.
ICCAD
Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, David Z. Pan
2012 A conf
Dealing with IC manufacturability in extreme scaling (Embedded tutorial paper).
ICCAD
Bei Yu, Jhih-Rong Gao, Duo Ding, Yongchan Ban, Jae-Seok Yang, Kun Yuan, Minsik Cho, David Z. Pan
2012 — conf
Flexible self-aligned double patterning aware detailed routing with prescribed layout planning.
ISPD
Jhih-Rong Gao, David Z. Pan
2012 — conf
VLSI CAD for emerging nanolithography.
VLSI-DAT
David Z. Pan, Jhih-Rong Gao, Bei Yu
2011 A* conf
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection.
DAC
Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan
2010 J jnl
NTHU-Route 2.0: A Robust Global Router for Modern Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yen-Jung Chang, Yu-Ting Lee, Jhih-Rong Gao, Pei-Ci Wu, Ting-Chi Wang
2008 — conf
A new global router for modern designs.
ASP-DAC
Jhih-Rong Gao, Pei-Ci Wu, Ting-Chi Wang
2007 — conf
A Fast and Stable Algorithm for Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction.
ASP-DAC
Pei-Ci Wu, Jhih-Rong Gao, Ting-Chi Wang