Jesús Ruiz-Amaya

16 papers A 1C 1Journal 6Unranked 8
YearRankTypeTitle / Venue / Authors
2015 J jnl
A Low Noise Amplifier for Neural Spike Recording Interfaces.
Sensors
Jesús Ruiz-Amaya, Alberto Rodríguez-Pérez, Manuel Delgado-Restituto
2012 J jnl
A Low-Power Programmable Neural Spike Detection Channel With Embedded Calibration and Data Compression.
IEEE Trans. Biomed. Circuits Syst.
Alberto Rodríguez-Pérez, Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
2012 J jnl
Behavioral modeling of pipeline ADC building blocks.
Int. J. Circuit Theory Appl.
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
2011 C conf
A power efficient neural spike recording channel with data bandwidth reduction.
ISCAS
Alberto Rodríguez-Pérez, Jesús Ruiz-Amaya, Jose Antonio Rodríguez-Rodríguez, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
2011 J jnl
Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
2009 J jnl
Accurate Settling-Time Modeling and Design Procedures for Two-Stage Miller-Compensated Amplifiers for Switched-Capacitor Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
2008 — conf
An ultra-low power consumption 1-V, 10-bit succesive approximation ADC.
ICECS
Alberto Rodríguez-Pérez, Manuel Delgado-Restituto, Jesús Ruiz-Amaya, Fernando Medeiro
2008 — conf
Electrical-level synthesis of pipeline ADCs.
APCCAS
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
2007 — conf
A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology.
ECCTD
Davide Brandano, Manuel Delgado-Restituto, Jesús Ruiz-Amaya, Ángel Rodríguez-Vázquez
2007 — conf
Design procedure for optimizing the power consumption of two-stage Miller compensated amplifiers in SC circuits.
ECCTD
Jesús Ruiz-Amaya, Juan Francisco Fernández-Bootello, Manuel Delgado-Restituto
2006 — conf
A 12-bit CMOS Current Steering D/A Converter for Embedded Systems.
APCCAS
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Juan Francisco Fernández-Bootello, Davide Brandano, Rafael Castro-López, José M. de la Rosa
2005 — conf
An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13µm pure digital CMOS technology.
ISCAS (5)
Manuel Delgado-Restituto, Jesús Ruiz-Amaya, José M. de la Rosa, Juan Francisco Fernández-Bootello, Leila Díez, Rocío del Río Fernández, Ángel Rodríguez-Vázquez
2005 — conf
Behavioral modeling simulation and high-level synthesis of pipeline A/D converters.
ISCAS (6)
Jesús Ruiz-Amaya, José M. de la Rosa, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
2005 J jnl
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jesús Ruiz-Amaya, José M. de la Rosa, Francisco V. Fernández, Fernando Medeiro, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez
2004 — conf
An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment.
ISCAS (5)
Jesús Ruiz-Amaya, José M. de la Rosa, Fernando Medeiro, Francisco V. Fernández, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez
2004 A conf
MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time [Sigma, Delta] Modulators.
DATE
Jesús Ruiz-Amaya, Josep Lluís de la Rosa, Fernando Medeiro, Francisco V. Fernández, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez