Jerónimo Castrillón

175 papers A* 7A 17B 11C 7Misc 6Journal 71Unranked 52

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Compiler-Assisted Speculative Sampling for Accelerated LLM Inference on Heterogeneous Edge Devices. CoRR Alejandro Ruiz y Mesa, Guilherme Korol, Moritz Riesterer, João Paulo Cardoso de Lima, Jerónimo Castrillón
2026	A*	`conf`	Count2Multiply: Reliable In-Memory High-Radix Counting. HPCA João Paulo C. de Lima, Benjamin F. Morris III, Asif Ali Khan, Jerónimo Castrillón, Alex K. Jones
2026	J	`jnl`	MING: An Automated CNN-to-Edge MLIR HLS framework. CoRR Jiahong Bi, Lars Schütze, Jerónimo Castrillón
2026	A	`conf`	On the Precision of Dynamic Program Fingerprints Based on Performance Counters. CGO Anderson Faustino da Silva, Marcelo Borges Nogueira, Sérgio Queiroz de Medeiros, Jerónimo Castrillón, Fernando Magno Quintão Pereira
2025	B	`conf`	A Comparative Study on the Accuracy and the Speed of Static and Dynamic Program Classifiers. CC Anderson Faustino da Silva, Jerónimo Castrillón, Fernando Magno Quintão Pereira
2025	A*	`conf`	All-in-Memory Stochastic Computing using ReRAM. DAC João Paulo C. de Lima, Mehran Shoushtari Moghadam, Sercan Aygun, Jerónimo Castrillón, M. Hassan Najafi, Asif Ali Khan
2025	J	`jnl`	All-in-Memory Stochastic Computing using ReRAM. CoRR João Paulo C. de Lima, Mehran Shoushtari Moghadam, Sercan Aygun, Jerónimo Castrillón, M. Hassan Najafi, Asif Ali Khan
2025	—	`conf`	Automating Timing Enclaves for Reactive Programs in Lingua Franca. MCSoC Julian Robledo, Jerónimo Castrillón
2025	J	`jnl`	CoMoNM: A Cost Modeling Framework for Compute-Near-Memory Systems. CoRR Hamid Farzaneh, Asif Ali Khan, Jerónimo Castrillón
2025	J	`jnl`	Cross-Layer Design and Design Automation for In-Memory Computing Based on Nonvolatile Memory Technologies. IEEE Des. Test Xiaobo Sharon Hu, Mingyen Lee, Mengyuan Li, João Paulo Cardoso de Lima, Liu Liu, Zhenhua Zhu, Jerónimo Castrillón, Michael T. Niemier, Yu Wang
2025	B	`conf`	DFA-Net: A Compiler-Specific Neural Architecture for Robust Generalization in Data Flow Analyses. CC Alexander Brauckmann, Anderson Faustino da Silva, Gabriel Synnaeve, Michael F. P. O'Boyle, Jerónimo Castrillón, Hugh Leather
2025	—	`conf`	Efficient In-Memory Acceleration of Sparse Block Diagonal LLMs. CCMCC João Paulo C. de Lima, Marc Dietrich, Jerónimo Castrillón, Asif Ali Khan
2025	J	`jnl`	Efficient In-Memory Acceleration of Sparse Block Diagonal LLMs. CoRR João Paulo Cardoso de Lima, Marc Dietrich, Jerónimo Castrillón, Asif Ali Khan
2025	Misc	`conf`	Hardware-Aware Compilation and Simulation for In-Memory Computing. CASES Asif Ali Khan, Hadjer Benmeziane, Hamid Farzaneh, João Paulo C. de Lima, William Andrew Simon, Yiyu Shi, Zheyu Yan, Abu Sebastian, X. Sharon Hu, Jerónimo Castrillón, Corey Lammie
2025	J	`jnl`	Leveraging Stochastic Depth Training for Adaptive Inference. CoRR Guilherme Korol, Antonio Carlos Schneider Beck, Jerónimo Castrillón
2025	J	`jnl`	Modeling and Simulating Emerging Memory Technologies: A Tutorial. CoRR Yun-Chih Chen, Tristan Taylan Seidl, Nils Hölscher, Christian Hakert, Minh Duy Truong, Jian-Jia Chen, João Paulo C. de Lima, Asif Ali Khan, Jerónimo Castrillón, Ali Nezhadi, Lokesh Siddhu, Hassan Nassar, Mahta Mayahinia, Mehdi Baradaran Tahoori, Jörg Henkel, Nils Wilbert, Stefan Wildermann, Jürgen Teich
2025	A	`conf`	Multi-Partner Project: Key Enabling Technologies for Cognitive Computing Continuum - MYRTUS Project Perspective. DATE Francesca Palumbo, Francesco Ratto, Claudio Rubattu, Maria Katiuscia Zedda, Tiziana Fanni, Veena Rao, Bart Driessen, Jerónimo Castrillón
2025	J	`jnl`	Navigating Time and Energy Tradeoffs in Reactive Heterogeneous Systems. IEEE Embed. Syst. Lett. Shaokai Lin, Tassilo Tanneberger, Jiahong Bi, Guangyu Feng, Yimo Xu, Julian Robledo, Robert Khasanov, Jerónimo Castrillón
2025	B	`ed.`	Proceedings of the 26th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES 2025, Seoul, Republic of Korea, June 16-17, 2025 LCTES Partha S. Roop, Jerónimo Castrillón, Yongjun Park
2025	J	`jnl`	Quasi-Static Scheduling for Deterministic Timed Concurrent Models on Multi-Core Hardware. ACM Trans. Embed. Comput. Syst. Shaokai Lin, Erling Jellum, Mirco Theile, Tassilo Tanneberger, Binqi Sun, Chadlia Jerad, Yimo Xu, Guangyu Feng, Magnus Mæhlum, Jian-Jia Chen, Martin Schoeberl, Linh Thi Xuan Phan, Jerónimo Castrillón, Sanjit A. Seshia, Edward A. Lee
2025	—	`conf`	TQHD: Thermometer Encoding Based Quantization for Hyperdimensional Computing. ISVLSI Caio Vieira, Jerónimo Castrillón, Antonio Carlos Schneider Beck
2024	A	`conf`	A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. DATE Christian Pilato, Subhadeep Banik, Jakub Beránek, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Radim Cmar, Serena Curzel, Fabrizio Ferrandi, Karl F. A. Friebel, Antonella Galizia, Matteo Grasso, Paulo Silva, Jan Martinovic, Gianluca Palermo, Michele Paolino, Andrea Parodi, Antonio Parodi, Fabio Pintus, Raphael Polig, David Poulet, Francesco Regazzoni, Burkhard Ringlein, Roberto Rocco, Katerina Slaninová, Tom Slooff, Stephanie Soldavini, Felix Suchert, Mattia Tibaldi, Beat Weiss, Christoph Hagleitner
2024	J	`jnl`	A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. CoRR Christian Pilato, Subhadeep Banik, Jakub Beránek, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Radim Cmar, Serena Curzel, Fabrizio Ferrandi, Karl F. A. Friebel, Antonella Galizia, Matteo Grasso, Paulo Silva, Jan Martinovic, Gianluca Palermo, Michele Paolino, Andrea Parodi, Antonio Parodi, Fabio Pintus, Raphael Polig, David Poulet, Francesco Regazzoni, Burkhard Ringlein, Roberto Rocco, Katerina Slaninová, Tom Slooff, Stephanie Soldavini, Felix Suchert, Mattia Tibaldi, Beat Weiss, Christoph Hagleitner
2024	—	`conf`	C4CAM: A Compiler for CAM-based In-memory Accelerators. ASPLOS (3) Hamid Farzaneh, João Paulo Cardoso de Lima, Mengyuan Li, Asif Ali Khan, Xiaobo Sharon Hu, Jerónimo Castrillón
2024	—	`conf`	CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms. ASPLOS (4) Asif Ali Khan, Hamid Farzaneh, Karl Friedrich Alexander Friebel, Clément Fournier, Lorenzo Chelini, Jerónimo Castrillón
2024	J	`jnl`	Count2Multiply: Reliable In-memory High-Radix Counting. CoRR João Paulo Cardoso de Lima, Benjamin F. Morris III, Asif Ali Khan, Jerónimo Castrillón, Alex K. Jones
2024	J	`jnl`	Deterministic Coordination across Multiple Timelines. ACM Trans. Embed. Comput. Syst. Marten Lohstroh, Soroush Bateni, Christian Menard, Alexander Schulz-Rosengarten, Jerónimo Castrillón, Edward A. Lee
2024	J	`jnl`	E-Mapper: Energy-Efficient Resource Allocation for Traditional Operating Systems on Heterogeneous Processors. CoRR Till Smejkal, Robert Khasanov, Jerónimo Castrillón, Hermann Härtig
2024	J	`jnl`	Efficient Memory Layout for Pre-Alignment Filtering of Long DNA Reads Using Racetrack Memory. IEEE Comput. Archit. Lett. Asif Ali Khan, Fazal Hameed, Taha Shahroodi, Alex K. Jones, Jerónimo Castrillón
2024	Misc	`conf`	Etna: MLIR-Based System-Level Design and Optimization for Transparent Application Execution on CPU-FPGA Nodes. FCCM Stephanie Soldavini, Felix Suchert, Serena Curzel, Michele Fiorito, Karl F. A. Friebel, Fabrizio Ferrandi, Radim Cmar, Jerónimo Castrillón, Christian Pilato
2024	B	`conf`	Flexible Spatio-Temporal Energy-Efficient Runtime Management. ASPDAC Robert Khasanov, Marc Dietrich, Jerónimo Castrillón
2024	A	`conf`	Full-Stack Optimization for CAM-Only DNN Inference. DATE João Paulo C. de Lima, Asif Ali Khan, Luigi Carro, Jerónimo Castrillón
2024	J	`jnl`	Full-Stack Optimization for CAM-Only DNN Inference. CoRR João Paulo C. de Lima, Asif Ali Khan, Luigi Carro, Jerónimo Castrillón
2024	—	`conf`	Leveraging the MLIR Infrastructure for the Computing Continuum. CPS Summer School, PhD Workshop Jiahong Bi, Guilherme Korol, Jerónimo Castrillón
2024	—	`conf`	MYRTUS: Multi-layer 360° dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems. CF (Companion) Francesca Palumbo, Maria Katiuscia Zedda, Tiziana Fanni, Alessandra Bagnato, Luca Castello, Jerónimo Castrillón, Roberto Del Ponte, Yansha Deng, Bart Driessen, Mauro Fadda, Tristan Halna du Fretay, Julio de Oliveira Filho, Veena Rao, Francesco Regazzoni, Alfonso Rodríguez, Melanie Schranz, Giulia Sedda
2024	J	`jnl`	PretVM: Predictable, Efficient Virtual Machine for Real-Time Concurrency. CoRR Shaokai Lin, Erling Rennemo Jellum, Mirco Theile, Tassilo Tanneberger, Binqi Sun, Chadlia Jerad, Ruomu Xu, Guangyu Feng, Christian Menard, Marten Lohstroh, Jerónimo Castrillón, Sanjit A. Seshia, Edward A. Lee
2024	A*	`conf`	SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operations in NVMs. DAC Hamid Farzaneh, João Paulo C. de Lima, Ali Nezhadi Khelejani, Asif Ali Khan, Mahta Mayahinia, Mehdi B. Tahoori, Jerónimo Castrillón
2024	A	`conf`	Smoothing Disruption Across the Stack: Tales of Memory, Heterogeneity, & Compilers. DATE Michael T. Niemier, Zephan M. Enciso, M. Sharifi, Xiaobo Sharon Hu, Ian O'Connor, A. Graening, R. Sharma, P. Gupta, Jerónimo Castrillón, João Paulo C. de Lima, Asif Ali Khan, Hamid Farzaneh, N. Afroze, Asif Khan, Julien Ryckaert
2024	J	`jnl`	The Landscape of Compute-near-memory and Compute-in-memory: A Research and Commercial Overview. CoRR Asif Ali Khan, João Paulo C. de Lima, Hamid Farzaneh, Jerónimo Castrillón
2024	C	`conf`	Timing enclaves for performance in Lingua Franca. FDL Julian Robledo, Christian Menard, Erling Rennemo Jellum, Edward A. Lee, Jerónimo Castrillón
2023	J	`jnl`	Automatic Creation of High-bandwidth Memory Architectures from Domain-specific Languages: The Case of Computational Fluid Dynamics. ACM Trans. Reconfigurable Technol. Syst. Stephanie Soldavini, Karl F. A. Friebel, Mattia Tibaldi, Gerald Hempel, Jerónimo Castrillón, Christian Pilato
2023	J	`jnl`	C4CAM: A Compiler for CAM-based In-memory Accelerators. CoRR Hamid Farzaneh, João Paulo Cardoso de Lima, Mengyuan Li, Asif Ali Khan, Xiaobo Sharon Hu, Jerónimo Castrillón
2023	J	`jnl`	CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms. CoRR Asif Ali Khan, Hamid Farzaneh, Karl F. A. Friebel, Lorenzo Chelini, Jerónimo Castrillón
2023	A*	`conf`	Compression-Aware and Performance-Efficient Insertion Policies for Long-Lasting Hybrid LLCs. HPCA Carlos Escuin, Asif Ali Khan, Pablo Ibáñez, Teresa Monreal, Jerónimo Castrillón, Víctor Viñals
2023	J	`jnl`	ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs (Artifact). Dagstuhl Artifacts Ser. Felix Suchert, Lisza Zeidler, Jerónimo Castrillón, Sebastian Ertel
2023	A	`conf`	ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs. ECOOP Felix Suchert, Lisza Zeidler, Jerónimo Castrillón, Sebastian Ertel
2023	—	`conf`	Design Space Exploration for CNN Offloading to FPGAs at the Edge. ISVLSI Guilherme Korol, Michael Guilherme Jordan, Mateus Beck Rutzig, Jerónimo Castrillón, Antonio Carlos Schneider Beck
2023	J	`jnl`	DownShift: Tuning Shift Reduction With Reliability for Racetrack Memories. IEEE Trans. Computers Asif Ali Khan, Sébastien Ollivier, Fazal Hameed, Jerónimo Castrillón, Alex K. Jones
2023	J	`jnl`	HElium: A Language and Compiler for Fully Homomorphic Encryption with Support for Proxy Re-Encryption. CoRR Mirko Günther, Lars Schütze, Kilian Becher, Thorsten Strufe, Jerónimo Castrillón
2023	J	`jnl`	High-Performance Deterministic Concurrency using Lingua Franca. CoRR Christian Menard, Marten Lohstroh, Soroush Bateni, Matthew Chorlian, Arthur Deng, Peter Donovan, Clément Fournier, Shaokai Lin, Felix Suchert, Tassilo Tanneberger, Hokeun Kim, Jerónimo Castrillón, Edward A. Lee
2023	J	`jnl`	High-performance Deterministic Concurrency Using Lingua Franca. ACM Trans. Archit. Code Optim. Christian Menard, Marten Lohstroh, Soroush Bateni, Matthew Chorlian, Arthur Deng, Peter Donovan, Clément Fournier, Shaokai Lin, Felix Suchert, Tassilo Tanneberger, Hokeun Kim, Jerónimo Castrillón, Edward A. Lee
2023	—	`conf`	Provable Determinism for Software in Cyber-Physical Systems. VSTTE Marcus Rossel, Shaokai Lin, Marten Lohstroh, Jerónimo Castrillón, Andrés Goens
2023	A	`conf`	Pruning and Early-Exit Co-Optimization for CNN Acceleration on FPGAs. DATE Guilherme Korol, Michael Guilherme Jordan, Mateus Beck Rutzig, Jerónimo Castrillón, Antonio Carlos Schneider Beck
2023	J	`jnl`	ROLLED: Racetrack Memory Optimized Linear Layout and Efficient Decomposition of Decision Trees. IEEE Trans. Computers Christian Hakert, Asif Ali Khan, Kuan-Hsun Chen, Fazal Hameed, Jerónimo Castrillón, Jian-Jia Chen
2023	Misc	`conf`	Special Session - Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications. CASES Jörg Henkel, Lokesh Siddhu, Lars Bauer, Jürgen Teich, Stefan Wildermann, Mehdi B. Tahoori, Mahta Mayahinia, Jerónimo Castrillón, Asif Ali Khan, Hamid Farzaneh, João Paulo C. de Lima, Jian-Jia Chen, Christian Hakert, Kuan-Hsun Chen, Chia-Lin Yang, Hsiang-Yun Cheng
2023	—	`conf`	Towards Virtual Machine Support for Contextual Role-Oriented Programming Languages. COP@ECOOP Lars Schütze, Jerónimo Castrillón
2023	—	`conf`	base2: An IR for Binary Numeral Types. HEART Karl F. A. Friebel, Jiahong Bi, Jerónimo Castrillón
2022	J	`jnl`	ALPHA: A Novel Algorithm-Hardware Co-Design for Accelerating DNA Seed Location Filtering. IEEE Trans. Emerg. Top. Comput. Fazal Hameed, Asif Ali Khan, Jerónimo Castrillón
2022	J	`jnl`	Automatic Creation of High-Bandwidth Memory Architectures from Domain-Specific Languages: The Case of Computational Fluid Dynamics. CoRR Stephanie Soldavini, Karl F. A. Friebel, Mattia Tibaldi, Gerald Hempel, Jerónimo Castrillón, Christian Pilato
2022	J	`jnl`	BlendCache: An Energy and Area Efficient Racetrack Last-Level-Cache Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fazal Hameed, Jerónimo Castrillón
2022	J	`jnl`	Brain-inspired Cognition in Next-generation Racetrack Memories. ACM Trans. Embed. Comput. Syst. Asif Ali Khan, Sébastien Ollivier, Stephen Longofono, Gerald Hempel, Jerónimo Castrillón, Alex K. Jones
2022	J	`jnl`	DNA Pre-Alignment Filter Using Processing Near Racetrack Memory. IEEE Comput. Archit. Lett. Fazal Hameed, Asif Ali Khan, Sébastien Ollivier, Alex K. Jones, Jerónimo Castrillón
2022	J	`jnl`	DNA Pre-alignment Filter using Processing Near Racetrack Memory. CoRR Fazal Hameed, Asif Ali Khan, Sébastien Ollivier, Alex K. Jones, Jerónimo Castrillón
2022	J	`jnl`	Energy-Efficient Instruction Delivery in Embedded Systems With Domain Wall Memory. IEEE Trans. Computers Joonas Multanen, Kari Hepola, Asif Ali Khan, Jerónimo Castrillón, Pekka Jääskeläinen
2022	—	`conf`	Guard the Cache: Dispatch Optimization in a Contextual Role-oriented Language. COP@ECOOP Lars Schütze, Cornelius Kummer, Jerónimo Castrillón
2022	—	`conf`	HyCSim: A rapid design space exploration tool for emerging hybrid last-level caches. DroneSE/RAPIDO@HiPEAC Carlos Escuin, Asif Ali Khan, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, Jerónimo Castrillón
2022	J	`jnl`	Model-based autotuning of discretization methods in numerical simulations of partial differential equations. J. Comput. Sci. Nesrine Khouzami, Friedrich Michel, Pietro Incardona, Jerónimo Castrillón, Ivo F. Sbalzarini
2022	J	`jnl`	OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Adam Siemieniuk, Lorenzo Chelini, Asif Ali Khan, Jerónimo Castrillón, Andi Drebes, Henk Corporaal, Tobias Grosser, Martin Kong
2022	—	`conf`	Parameterizable mobile workloads for adaptable base station optimizations. MCSoC Julian Robledo, Jerónimo Castrillón
2022	—	`conf`	STAMP-Rust: Language and Performance Comparison to C on Transactional Benchmarks. Bench Felix Suchert, Jerónimo Castrillón
2022	—	`conf`	Shisha: Online Scheduling of CNN Pipelines on Heterogeneous Architectures. PPAM (1) Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs
2022	J	`jnl`	Shisha: Online scheduling of CNN pipelines on heterogeneous architectures. CoRR Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs
2022	J	`jnl`	mAPN: Modeling, Analysis, and Exploration of Algorithmic and Parallelism Adaptivity. CoRR Hasna Bouraoui, Chadlia Jerad, Omar Romdhani, Jerónimo Castrillón
2022	J	`jnl`	mpsym: Improving Design-Space Exploration of Clustered Manycores With Arbitrary Topologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Andres Goens, Timo Nicolai, Jerónimo Castrillón
2021	J	`jnl`	A Reinforcement Learning Environment for Polyhedral Optimizations. CoRR Alexander Brauckmann, Andrés Goens, Jerónimo Castrillón
2021	—	`conf`	An online guided tuning approach to run CNN pipelines on edge devices. CF Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs
2021	A*	`conf`	BLOwing Trees to the Ground: Layout Optimization of Decision Trees on Racetrack Memory. DAC Christian Hakert, Asif Ali Khan, Kuan-Hsun Chen, Fazal Hameed, Jerónimo Castrillón, Jian-Jia Chen
2021	J	`jnl`	Brain-inspired Cognition in Next Generation Racetrack Memories. CoRR Asif Ali Khan, Sébastien Ollivier, Stephen Longofono, Gerald Hempel, Jerónimo Castrillón, Alex K. Jones
2021	J	`jnl`	Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing in Wireless Networks. ACM Trans. Embed. Comput. Syst. Robert Khasanov, Julian Robledo, Christian Menard, Andrés Goens, Jerónimo Castrillón
2021	A	`conf`	EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. DATE Christian Pilato, Stanislav Böhm, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Vojtech Cima, Radim Cmar, Dionysios Diamantopoulos, Fabrizio Ferrandi, Jan Martinovic, Gianluca Palermo, Michele Paolino, Antonio Parodi, Lorenzo Pittaluga, Daniel Raho, Francesco Regazzoni, Katerina Slaninová, Christoph Hagleitner
2021	J	`jnl`	EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. CoRR Christian Pilato, Stanislav Böhm, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Vojtech Cima, Radim Cmar, Dionysios Diamantopoulos, Fabrizio Ferrandi, Jan Martinovic, Gianluca Palermo, Michele Paolino, Antonio Parodi, Lorenzo Pittaluga, Daniel Raho, Francesco Regazzoni, Katerina Slaninová, Christoph Hagleitner
2021	—	`conf`	Embeddings of Task Mappings to Multicore Systems. SAMOS Andrés Goens, Jerónimo Castrillón
2021	C	`conf`	From Domain-Specific Languages to Memory-Optimized Accelerators for Fluid Dynamics. CLUSTER Karl F. A. Friebel, Stephanie Soldavini, Gerald Hempel, Christian Pilato, Jerónimo Castrillón
2021	J	`jnl`	From Domain-Specific Languages to Memory-Optimized Accelerators for Fluid Dynamics. CoRR Karl F. A. Friebel, Stephanie Soldavini, Gerald Hempel, Christian Pilato, Jerónimo Castrillón
2021	J	`jnl`	Improving the Performance of Block-based DRAM Caches Via Tag-Data Decoupling. IEEE Trans. Computers Fazal Hameed, Asif Ali Khan, Jerónimo Castrillón
2021	—	`conf`	Mocasin - Rapid Prototyping of Rapid Prototyping Tools: A Framework for Exploring New Approaches in Mapping Software to Heterogeneous Multi-cores. DroneSE/RAPIDO@HiPEAC Christian Menard, Andrés Goens, Gerald Hempel, Robert Khasanov, Julian Robledo, Felix Teweleitt, Jerónimo Castrillón
2021	B	`conf`	PolyGym: Polyhedral Optimizations as an Environment for Reinforcement Learning. PACT Alexander Brauckmann, Andrés Goens, Jerónimo Castrillón
2021	—	`conf`	The OpenPME Problem Solving Environment for Numerical Simulations. ICCS (1) Nesrine Khouzami, Lars Schütze, Pietro Incardona, Landfried Kraatz, Tina Subic, Jerónimo Castrillón, Ivo F. Sbalzarini
2021	—	`conf`	Towards Adaptive Multi-Alternative Process Network. PARMA-DITAM@HiPEAC Hasna Bouraoui, Chadlia Jerad, Jerónimo Castrillón
2020	C	`conf`	A Language for Deterministic Coordination Across Multiple Timelines. FDL Marten Lohstroh, Christian Menard, Alexander Schulz-Rosengarten, Matthew Weber, Jerónimo Castrillón, Edward A. Lee
2020	A	`conf`	Achieving Determinism in Adaptive AUTOSAR. DATE Christian Menard, Andrés Goens, Marten Lohstroh, Jerónimo Castrillón
2020	C	`conf`	ComPy-Learn: A toolbox for exploring machine learning representations for compilers. FDL Alexander Brauckmann, Andrés Goens, Jerónimo Castrillón
2020	B	`conf`	Compiler-based graph representations for deep learning models of code. CC Alexander Brauckmann, Andrés Goens, Sebastian Ertel, Jerónimo Castrillón
2020	C	`conf`	Efficient dispatch of multi-object polymorphic call sites in contextual role-oriented programming languages. MPLR Lars Schütze, Jerónimo Castrillón
2020	A	`conf`	Energy-efficient Runtime Resource Management for Adaptable Multi-application Mapping. DATE Robert Khasanov, Jerónimo Castrillón
2020	J	`jnl`	Energy-efficient Runtime Resource Management for Adaptable Multi-application Mapping. CoRR Robert Khasanov, Jerónimo Castrillón
2020	A	`conf`	Generalized Data Placement Strategies for Racetrack Memories. DATE Asif Ali Khan, Andrés Goens, Fazal Hameed, Jerónimo Castrillón
2020	J	`jnl`	Magnetic Racetrack Memory: From Physics to the Cusp of Applications Within a Decade. Proc. IEEE Robin Bläsing, Asif Ali Khan, Panagiotis Ch. Filippou, Chirag Garg, Fazal Hameed, Jerónimo Castrillón, Stuart S. P. Parkin
2020	—	`conf`	Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach. ICT Robert Wittig, Andrés Goens, Christian Menard, Emil Matús, Gerhard P. Fettweis, Jerónimo Castrillón
2020	J	`jnl`	Optimizing Tensor Contractions for Embedded Devices with Racetrack and DRAM Memories. ACM Trans. Embed. Comput. Syst. Asif Ali Khan, Norman A. Rink, Fazal Hameed, Jerónimo Castrillón
2020	J	`jnl`	Polyhedral Compilation for Racetrack Memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Asif Ali Khan, Hauke Mewes, Tobias Grosser, Torsten Hoefler, Jerónimo Castrillón
2020	J	`jnl`	ShiftsReduce: Minimizing Shifts in Racetrack Memory 4.0. ACM Trans. Archit. Code Optim. Asif Ali Khan, Fazal Hameed, Robin Bläsing, Stuart S. P. Parkin, Jerónimo Castrillón
2020	J	`jnl`	The gem5 Simulator: Version 20.0+. CoRR Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian
2019	J	`jnl`	A Novel Hybrid DRAM/STT-RAM Last-Level-Cache Architecture for Performance, Energy, and Endurance Enhancement. IEEE Trans. Very Large Scale Integr. Syst. Fazal Hameed, Jerónimo Castrillón
2019	—	`conf`	A case study on machine learning for synthesizing benchmarks. MAPL@PLDI Andrés Goens, Alexander Brauckmann, Sebastian Ertel, Chris Cummins, Hugh Leather, Jerónimo Castrillón
2019	J	`jnl`	Achieving Determinism in Adaptive AUTOSAR. CoRR Christian Menard, Andres Goens, Marten Lohstroh, Jerónimo Castrillón
2019	J	`jnl`	Architecture and Advanced Electronics Pathways Toward Highly Adaptive Energy- Efficient Computing. Proc. IEEE Gerhard P. Fettweis, Meik Dorpinghaus, Jerónimo Castrillón, Akash Kumar, Christel Baier, Karlheinz Bock, Frank Ellinger, Andreas Fery, Frank H. P. Fitzek, Hermann Härtig, Kambiz Jamshidi, Thomas Kissinger, Wolfgang Lehner, Michael Mertig, Wolfgang E. Nagel, Giang T. Nguyen, Dirk Plettemeier, Michael Schröter, Thorsten Strufe
2019	J	`jnl`	Category-Theoretic Foundations of "STCLang: State Thread Composition as a Foundation for Monadic Dataflow Parallelism". CoRR Sebastian Ertel, Justus Adam, Norman A. Rink, Andrés Goens, Jerónimo Castrillón
2019	B	`conf`	Efficient late binding of dynamic function compositions. SLE Lars Schütze, Jerónimo Castrillón
2019	J	`jnl`	Generalized Data Placement Strategies for Racetrack Memories. CoRR Asif Ali Khan, Andres Goens, Fazal Hameed, Jerónimo Castrillón
2019	—	`conf`	On Compact Mappings for Multicore Systems. SAMOS Andrés Goens, Christian Menard, Jerónimo Castrillón
2019	B	`conf`	Optimizing tensor contractions for embedded devices with racetrack memory scratch-pads. LCTES Asif Ali Khan, Norman A. Rink, Fazal Hameed, Jerónimo Castrillón
2019	J	`jnl`	RTSim: A Cycle-Accurate Simulator for Racetrack Memories. IEEE Comput. Archit. Lett. Asif Ali Khan, Fazal Hameed, Robin Bläsing, Stuart S. P. Parkin, Jerónimo Castrillón
2019	—	`conf`	Reactors: A Deterministic Model for Composable Reactive Systems. CyPhy/WESE Marten Lohstroh, Íñigo Íncer Romeo, Andrés Goens, Patricia Derler, Jerónimo Castrillón, Edward A. Lee, Alberto L. Sangiovanni-Vincentelli
2019	—	`conf`	RecordFlux: Formal Message Specification and Generation of Verifiable Binary Parsers. FACS Tobias Reiher, Alexander Senier, Jerónimo Castrillón, Thorsten Strufe
2019	J	`jnl`	RecordFlux: Formal Message Specification and Generation of Verifiable Binary Parsers. CoRR Tobias Reiher, Alexander Senier, Jerónimo Castrillón, Thorsten Strufe
2019	A	`conf`	SHRIMP: Efficient Instruction Delivery with Domain Wall Memory. ISLPED Joonas Multanen, Pekka Jääskeläinen, Asif Ali Khan, Fazal Hameed, Jerónimo Castrillón
2019	—	`conf`	STCLang: state thread composition as a foundation for monadic dataflow parallelism. Haskell@ICFP Sebastian Ertel, Justus Adam, Norman A. Rink, Andrés Goens, Jerónimo Castrillón
2019	J	`jnl`	ShiftsReduce: Minimizing Shifts in Racetrack Memory 4.0. CoRR Asif Ali Khan, Fazal Hameed, Robin Bläsing, Stuart S. P. Parkin, Jerónimo Castrillón
2019	—	`conf`	TeIL: a type-safe imperative tensor intermediate language. ARRAY@PLDI Norman A. Rink, Jerónimo Castrillón
2018	J	`jnl`	A Domain-Specific Language and Editor for Parallel Particle Methods. ACM Trans. Math. Softw. Sven Karol, Tobias Nett, Jerónimo Castrillón, Ivo F. Sbalzarini
2018	J	`jnl`	A Hardware/Software Stack for Heterogeneous Systems. IEEE Trans. Multi Scale Comput. Syst. Jerónimo Castrillón, Matthias Lieber, Sascha Klüppelholz, Marcus Völp, Nils Asmussen, Uwe Aßmann, Franz Baader, Christel Baier, Gerhard P. Fettweis, Jochen Fröhlich, Andrés Goens, Sebastian Haas, Dirk Habich, Hermann Härtig, Mattis Hasler, Immo Huismann, Tomas Karnagel, Sven Karol, Akash Kumar, Wolfgang Lehner, Linda Leuschner, Siqi Ling, Steffen Märcker, Christian Menard, Johannes Mey, Wolfgang E. Nagel, Benedikt Nöthen, Rafael Peñaloza, Michael Raitza, Jörg Stiller, Annett Ungethüm, Axel Voigt, Sascha Wunderlich
2018	—	`conf`	CFDlang: High-level code generation for high-order methods in fluid dynamics. RWDSL@CGO Norman A. Rink, Adilla Susungi, Jerónimo Castrillón, Jörg Stiller, Claude Tadonki
2018	B	`conf`	Compiling for concise code and efficient I/O. CC Sebastian Ertel, Andrés Goens, Justus Adam, Jerónimo Castrillón
2018	—	`conf`	Implicit Data-Parallelism in Kahn Process Networks: Bridging the MacQueen Gap. PARMA-DITAM@HiPEAC Robert Khasanov, Andrés Goens, Jerónimo Castrillón
2018	B	`conf`	Meta-programming for cross-domain tensor optimizations. GPCE Adilla Susungi, Norman A. Rink, Albert Cohen, Jerónimo Castrillón, Claude Tadonki
2018	—	`conf`	NVMain Extension for Multi-Level Cache Systems. RAPIDO Asif Ali Khan, Fazal Hameed, Jerónimo Castrillón
2018	—	`conf`	On the Representation of Mappings to Multicores. MCSoC Andres Goens, Christian Menard, Jerónimo Castrillón
2018	J	`jnl`	Performance and Energy-Efficient Design of STT-RAM Last-Level Cache. IEEE Trans. Very Large Scale Integr. Syst. Fazal Hameed, Asif Ali Khan, Jerónimo Castrillón
2018	—	`conf`	Supporting Fine-grained Dataflow Parallelism in Big Data Systems. PMAM@PPoPP Sebastian Ertel, Justus Adam, Jerónimo Castrillón
2017	J	`jnl`	A Domain-Specific Language and Editor for Parallel Particle Methods. CoRR Tobias Nett, Sven Karol, Jerónimo Castrillón, Ivo F. Sbalzarini
2017	—	`conf`	Analyzing State-of-the-Art Role-based Programming Languages. Programming Lars Schütze, Jerónimo Castrillón
2017	—	`conf`	Application interference analysis: Towards energy-efficient workload management on heterogeneous micro-server architectures. INFOCOM Workshops Markus Hähnel, Frehiwot Melak Arega, Waltenegus Dargie, Robert Khasanov, Jerónimo Castrillón
2017	Misc	`conf`	Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY): Preface. ICCS Johanna Sepúlveda, Vania Marangozova-Martin, Jerónimo Castrillón
2017	—	`conf`	Efficient STT-RAM last-level-cache architecture to replace DRAM cache. MEMSYS Fazal Hameed, Christian Menard, Jerónimo Castrillón
2017	—	`conf`	Extending a Compiler Backend for Complete Memory Error Detection. Automotive - Safety & Security Norman A. Rink, Jerónimo Castrillón
2017	—	`ch.`	MAPS: A Software Development Environment for Embedded Multicore Applications. Handbook of Hardware/Software Codesign Rainer Leupers, Miguel Angel Aguilar, Juan Fernando Eusse, Jerónimo Castrillón, Weihua Sheng
2017	Misc	`conf`	Multi-grained performance estimation for MPSoC compilers: work-in-progress. CASES Miguel Angel Aguilar, Abhishek Aggarwal, Awaid Shaheen, Rainer Leupers, Gerd Ascheid, Jerónimo Castrillón, Liam Fitzpatrick
2017	A	`conf`	Rethinking on-chip DRAM cache for simultaneous performance and energy optimization. DATE Fazal Hameed, Jerónimo Castrillón
2017	C	`conf`	Robust Mapping of Process Networks to Many-Core Systems using Bio-Inspired Design Centering. SCOPES Gerald Hempel, Andrés Goens, Jerónimo Castrillón, Josefine Asmus, Ivo F. Sbalzarini
2017	J	`jnl`	Symmetry in Software Synthesis. CoRR Andrés Goens, Sergio Siccha, Jerónimo Castrillón
2017	J	`jnl`	Symmetry in Software Synthesis. ACM Trans. Archit. Code Optim. Andrés Goens, Sergio Siccha, Jerónimo Castrillón
2017	—	`conf`	System simulation with gem5 and SystemC: The keystone for full interoperability. SAMOS Christian Menard, Jerónimo Castrillón, Matthias Jung, Norbert Wehn
2017	C	`conf`	TETRiS: a Multi-Application Run-Time System for Predictable Execution of Static Mappings. SCOPES Andrés Goens, Robert Khasanov, Jerónimo Castrillón, Marcus Hähnel, Till Smejkal, Hermann Härtig
2017	B	`conf`	Towards compositional and generative tensor optimizations. GPCE Adilla Susungi, Norman A. Rink, Jerónimo Castrillón, Immo Huismann, Albert Cohen, Claude Tadonki, Jörg Stiller, Jochen Fröhlich
2017	—	`conf`	Trading Fault Tolerance for Performance in AN Encoding. Conf. Computing Frontiers Norman A. Rink, Jerónimo Castrillón
2016	J	`jnl`	An optimal allocation of memory buffers for complex multicore platforms. J. Syst. Archit. Andres Goens, Jerónimo Castrillón, Maximilian Odendahl, Rainer Leupers
2016	J	`jnl`	Compile- and run-time approaches for the selection of efficient data structures for dynamic graph analysis. Appl. Netw. Sci. Benjamin Schiller, Clemens Deusser, Jerónimo Castrillón, Thorsten Strufe
2016	—	`conf`	Fault tolerance with aspects: a feasibility study. MODULARITY Sven Karol, Norman A. Rink, Bálint Gyapjas, Jerónimo Castrillón
2016	—	`conf`	High-level NoC model for MPSoC compilers. NORCAS Christian Menard, Andres Goens, Jerónimo Castrillón
2016	—	`ed.`	Proceedings of the 1st International Workshop on RESource Awareness and Application Auto-tuning in Adaptive and heterogeNeous compuTing co-located with 19th International Conference on Design, Automation And Test In Europe (DATE 2016), Dresden, Germany, March 18th, 2016. RES4ANT@DATE Cristina Silvano, Walter Stechele, Stephan Wong, Jerónimo Castrillón, Michael Hübner, Amir Hossein Ashouri
2016	—	`conf`	Why Comparing System-Level MPSoC Mapping Approaches is Difficult: A Case Study. MCSoC Andres Goens, Robert Khasanov, Jerónimo Castrillón, Simon Polstra, Andy D. Pimentel
2015	—	`conf`	Analysis of Process Traces for Mapping Dynamic KPN Applications to MPSoCs. IESS Andrés Goens, Jerónimo Castrillón
2015	—	`conf`	Compiling for Resilience: the Performance Gap. PARCO Norman A. Rink, Dmitrii Kuvaiskii, Jerónimo Castrillón, Christof Fetzer
2015	—	`conf`	Efficient Data Structures for Dynamic Graph Analysis. SITIS Benjamin Schiller, Jerónimo Castrillón, Thorsten Strufe
2015	J	`jnl`	GCC-Plugin for Automated Accelerator Generation and Integration on Hybrid FPGA-SoCs. CoRR Markus Vogt, Gerald Hempel, Jerónimo Castrillón, Christian Hochberger
2015	A	`conf`	Multi/many-core programming: where are we standing? DATE Jerónimo Castrillón, Lothar Thiele, Lars Schor, Weihua Sheng, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Angela Pohl, Ralph Jessenberger, Victor Reyes, Rainer Leupers
2015	—	`conf`	ViPES 2015 - Preface. SAMOS Diana Göhringer, Michael Hübner, Jerónimo Castrillón, Cristina Silvano
2014	A	`conf`	Automatic detection of concurrency bugs through event ordering constraints. DATE Luis Gabriel Murillo, Simon Wawroschek, Jerónimo Castrillón, Rainer Leupers, Gerd Ascheid
2013	J	`jnl`	Efficient Implementation of Application-Aware Spinlock Control in MPSoCs. Int. J. Embed. Real Time Commun. Syst. Diandian Zhang, Li Lu, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout
2013	J	`jnl`	MAPS: Mapping Concurrent Dataflow Applications to Heterogeneous MPSoCs. IEEE Trans. Ind. Informatics Jerónimo Castrillón, Rainer Leupers, Gerd Ascheid
2013	—	`ch.`	Software Compilation Techniques for MPSoCs. Handbook of Signal Processing Systems Rainer Leupers, Weihua Sheng, Jerónimo Castrillón
2013	—	`conf`	Split-cost communication model for improved MPSoC application mapping. ISSoC Maximilian Odendahl, Jerónimo Castrillón, Vitaliy Volevach, Rainer Leupers, Gerd Ascheid
2012	—	`conf`	Application-aware spinlock control using a hardware scheduler in MPSoC platforms. ISSoC Diandian Zhang, Li Lu, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout
2012	A*	`conf`	Communication-aware mapping of KPN applications onto heterogeneous MPSoCs. DAC Jerónimo Castrillón, Andreas Tretter, Rainer Leupers, Gerd Ascheid
2011	J	`jnl`	Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis. Int. J. Embed. Real Time Commun. Syst. Diandian Zhang, Han Zhang, Jerónimo Castrillón, Torsten Kempf, Bart Vanthournout, Gerd Ascheid, Rainer Leupers
2011	—	`conf`	Trends in embedded software synthesis. ICSAMOS Jerónimo Castrillón, Weihua Sheng, Rainer Leupers
2010	—	`conf`	MPSoC programming using the MAPS compiler. ASP-DAC Rainer Leupers, Jerónimo Castrillón
2010	—	`conf`	Optimized communication architecture of MPSoCs with a hardware scheduler: A system view. SoC Diandian Zhang, Han Zhang, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout
2010	—	`ch.`	Software Compilation Techniques for MPSoCs. Handbook of Signal Processing Systems Rainer Leupers, Weihua Sheng, Jerónimo Castrillón
2010	A	`conf`	Trace-based KPN composability analysis for mapping simultaneous applications to MPSoC platforms. DATE Jerónimo Castrillón, Ricardo Velasquez, Anastasia Stulova, Weihua Sheng, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2009	Misc	`conf`	A high-level virtual platform for early MPSoC software development. CODES+ISSS Jianjiang Ceng, Weihua Sheng, Jerónimo Castrillón, Anastasia Stulova, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2009	A	`conf`	Task management in MPSoCs: An ASIP approach. ICCAD Jerónimo Castrillón, Diandian Zhang, Torsten Kempf, Bart Vanthournout, Rainer Leupers, Gerd Ascheid
2008	A*	`conf`	MAPS: an integrated framework for MPSoC application parallelization. DAC Jianjiang Ceng, Jerónimo Castrillón, Weihua Sheng, Hanno Scharwächter, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tsuyoshi Isshiki, Hiroaki Kunieda
2005	—	`conf`	Reinforcement Learning with Kohonen-based State Aggregation for Obstacle Avoidance of a Mobile Robot. CIIC Jerónimo Castrillón, Jorge A. Peña