Jeroen van Straten

19 papers A* 1B 2Journal 8Unranked 8
YearRankTypeTitle / Venue / Authors
2023 — conf
An Intermediate Representation for Composable Typed Streaming Dataflow Designs.
VLDB Workshops
Matthijs A. Reukers, Yongding Tian, Zaid Al-Ars, H. Peter Hofstee, Matthijs Brobbel, Johan Peltenburg, Jeroen van Straten
2023 J jnl
An Intermediate Representation for Composable Typed Streaming Dataflow Designs.
CoRR
Matthijs A. Reukers, Yongding Tian, Zaid Al-Ars, H. Peter Hofstee, Matthijs Brobbel, Johan Peltenburg, Jeroen van Straten
2023 — conf
Tydi-lang: A Language for Typed Streaming Hardware.
SC Workshops
Yongding Tian, Matthijs A. Reukers, Zaid Al-Ars, H. Peter Hofstee, Matthijs Brobbel, Johan Peltenburg, Jeroen van Straten
2022 J jnl
Tydi-lang: A Language for Typed Streaming Hardware.
CoRR
Yongding Tian, Matthijs A. Reukers, Zaid Al-Ars, H. Peter Hofstee, Matthijs Brobbel, Johan Peltenburg, Jeroen van Straten
2021 J jnl
Generating High-Performance FPGA Accelerator Designs for Big Data Analytics with Fletcher and Apache Arrow.
J. Signal Process. Syst.
Johan Peltenburg, Jeroen van Straten, Matthijs Brobbel, Zaid Al-Ars, H. Peter Hofstee
2020 J jnl
Tydi: An Open Specification for Complex Data Structures Over Hardware Streams.
IEEE Micro
Johan Peltenburg, Jeroen van Straten, Matthijs Brobbel, Zaid Al-Ars, H. Peter Hofstee
2019 J jnl
ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA.
J. Signal Process. Syst.
Joost Hoozemans, Jeroen van Straten, Timo Viitanen, Aleksi Tervo, Jiri Kadlec, Zaid Al-Ars
2019 B conf
Fletcher: A Framework to Efficiently Integrate FPGA Accelerators with Apache Arrow.
FPL
Johan Peltenburg, Jeroen van Straten, Lars Wijtemans, Lars van Leeuwen, Zaid Al-Ars, H. Peter Hofstee
2019 J jnl
Frame-based Programming, Stream-Based Processing for Medical Image Processing Applications.
J. Signal Process. Syst.
Joost Hoozemans, Rob de Jong, Steven van der Vlugt, Jeroen van Straten, Uttam Kumar Elango, Zaid Al-Ars
2019 — conf
Supporting Columnar In-memory Formats on FPGA: The Hardware Design of Fletcher for Apache Arrow.
ARC
Johan Peltenburg, Jeroen van Straten, Matthijs Brobbel, H. Peter Hofstee, Zaid Al-Ars
2019 A* conf
eQASM: An Executable Quantum Instruction Set Architecture.
HPCA
Xiang Fu, Leon Riesebos, M. A. Rol, Jeroen van Straten, J. van Someren, Nader Khammassi, Imran Ashraf, R. F. L. Vermeulen, V. Newsum, K. K. L. Loh, J. C. de Sterke, W. J. Vlothuizen, R. N. Schouten, Carmen G. Almudéver, Leonardo DiCarlo, Koen Bertels
2018 — conf
Evaluating Auto-adaptation Methods for Fine-Grained Adaptable Processors.
ARCS
Joost Hoozemans, Jeroen van Straten, Zaid Al-Ars, Stephan Wong
2018 J jnl
Increasing resource utilization in mixed-criticality systems using a polymorphic VLIW processor.
J. Syst. Archit.
Joost Hoozemans, Jeroen van Straten, Stephan Wong
2018 J jnl
eQASM: An Executable Quantum Instruction Set Architecture.
CoRR
Xiang Fu, Leon Riesebos, M. A. Rol, Jeroen van Straten, J. van Someren, Nader Khammassi, Imran Ashraf, R. F. L. Vermeulen, V. Newsum, K. K. L. Loh, J. C. de Sterke, W. J. Vlothuizen, R. N. Schouten, Carmen G. Almudéver, Leonardo DiCarlo, Koen Bertels
2017 — conf
Exploring ILP and TLP on a Polymorphic VLIW Processor.
ARCS
Anthony Brandon, Joost Hoozemans, Jeroen van Straten, Stephan Wong
2017 B conf
Using a polymorphic VLIW processor to improve schedulability and performance for mixed-criticality systems.
RTCSA
Joost Hoozemans, Jeroen van Straten, Stephan Wong
2017 — conf
VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications.
ARC
Joost Hoozemans, Rolf Heij, Jeroen van Straten, Zaid Al-Ars
2015 — conf
A sparse VLIW instruction encoding scheme compatible with generic binaries.
ReConFig
Anthony Brandon, Joost Hoozemans, Jeroen van Straten, Arthur Francisco Lorenzon, Anderson Luiz Sartor, Antonio Carlos Schneider Beck, Stephan Wong
2015 — conf
Multiple contexts in a multi-ported VLIW register file implementation.
ReConFig
Joost Hoozemans, Jens Johansen, Jeroen van Straten, Anthony Brandon, Stephan Wong