Jens Lienig - RankMe

79 papers A* 1A 10C 3Misc 3Journal 13Unranked 45

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	Invited: Layout Design Automation: From Academia to Industry and Back. ISPD Jens Lienig
2025	—	`conf`	Automatic Lens Identification for Thermographic Cameras. ICCMA Robin Paul Swoboda, Robert Bergmann, Frank Reifegerste, Jens Lienig
2025	—	`conf`	Thermal Modeling of Silicon Photonic Waveguides. SMACD Matthias Thiele, Jens Lienig, Menglong He, Kambiz Jamshidi
2024	—	`conf`	Layout Verification Using Open-Source Software. ISPD Andreas Krinke, Robert Fischbach, Jens Lienig
2024	—	`conf`	Stress-based Electromigration Modeling in IC Design: Moving from Theory to Practice. SMACD Susann Rothe, Jens Lienig, Sachin S. Sapatnekar
2023	—	`conf`	Combined Modeling of Electromigration, Thermal and Stress Migration in AC Interconnect Lines. ISPD Susann Rothe, Jens Lienig
2023	J	`jnl`	Introduction to the Special Section on Advances in Physical Design Automation. ACM Trans. Design Autom. Electr. Syst. Iris Hui-Ru Jiang, David G. Chinnery, Gracieli Posser, Jens Lienig
2022	—	`conf`	A Multi-level Analog IC Design Flow for Fast Performance Estimation Using Template-based Layout Generators and Structural Models. SMACD Benjamin Prautsch, Thomas Markwirth, Frank Schenkel, Reimund Wittmann, Uwe Eichler, Jens Lienig
2022	J	`jnl`	Non-occlusive pumping principle for blood pump application. Autom. Sebastian Pech, René Richter, Jens Lienig
2022	—	`conf`	Reliability by Design: Avoiding Migration-Induced Failure in IC Interconnects. SBCCI Susann Rothe, Jens Lienig
2021	A	`conf`	Exploring Physical Synthesis for Circuits based on Emerging Reconfigurable Nanotechnologies. ICCAD Andreas Krinke, Shubham Rai, Akash Kumar, Jens Lienig
2021	—	`ed.`	ISPD '21: International Symposium on Physical Design, Virtual Event, USA, March 22-24, 2021 ISPD Jens Lienig, Laleh Behjat, Stephen Yang
2021	A	`conf`	Toward Security Closure in the Face of Reliability Effects ICCAD Special Session Paper. ICCAD Jens Lienig, Susann Rothe, Matthias Thiele, Nikhil Rangarajan, Mohammed Ashraf, Mohammed Nabeel, Hussam Amrouch, Ozgur Sinanoglu, Johann Knechtel
2020	—	`conf`	A Globally-optimized Co-design Approach for Heterogeneous Systems Using Convex Optimization. ECCTD Tilman Horst, Robert Fischbach, Jens Lienig
2020	J	`jnl`	Avoidance vs. repair: New approaches to increasing electromigration robustness in VLSI routing. Integr. Steve Bigalke, Jens Lienig
2020	—	`ed.`	ISPD 2020: International Symposium on Physical Design, Taipei, Taiwan, March 29 - April 1, 2020, delayed to September 20-23, 2020. ISPD William Swartz, Jens Lienig
2019	—	`conf`	A Graph-Based Model of Micro-Transfer Printing for Cost-Optimized Heterogeneous 2.5D Systems. 3DIC Robert Fischbach, Tilman Horst, Jens Lienig
2019	A	`conf`	Assembly-Related Chip/Package Co-Design of Heterogeneous Systems Manufactured by Micro-Transfer Printing. DATE Robert Fischbach, Tilman Horst, Jens Lienig
2019	C	`conf`	From Constraints to Tape-Out: Towards a Continuous AMS Design Flow. DDECS Andreas Krinke, Tilman Horst, Georg Gläser, Martin Grabmann, Tobias Markus, Benjamin Prautsch, Uwe Hatnik, Jens Lienig
2019	—	`conf`	Parasitic Extraction Methodology for MEMS Sensors with Active Devices. SMACD Axel Hald, Robert Wolf, Johannes Seelhorst, Jürgen Scheible, Jens Lienig, Stefan Tibus, Mike Schwarz
2018	C	`conf`	FLUTE-EM: Electromigration-Optimized Net Considering Topology Currents and Mechanical Stress. VLSI-SoC Steve Bigalke, Jens Lienig
2018	J	`jnl`	Full custom MEMS design: A new method for the analysis of motion-dependent parasitics. Integr. Axel Hald, Pekka Herzogenrath, Jürgen Scheible, Jens Lienig, Johannes Seelhorst, Peter Brandl
2018	—	`conf`	Increasing EM Robustness of Placement and Routing Solutions based on Layout-Driven Discretization. PRIME Steve Bigalke, Jens Lienig, Thorben Casper, Sebastian Schöps
2018	J	`jnl`	Multi-Objective 3D Floorplanning with Integrated Voltage Assignment. ACM Trans. Design Autom. Electr. Syst. Johann Knechtel, Jens Lienig, Ibrahim Abe M. Elfadel
2018	—	`conf`	Optimal die placement for interposer-based 3D ICs. ASP-DAC Sergii Osmolovskyi, Johann Knechtel, Igor L. Markov, Jens Lienig
2018	—	`conf`	The Pressing Need for Electromigration-Aware Physical Design. ISPD Jens Lienig, Matthias Thiele
2018	A	`conf`	The need and opportunities of electromigration-aware integrated circuit design. ICCAD Steve Bigalke, Jens Lienig, Göran Jerke, Jürgen Scheible, Roland Jancke
2017	—	`conf`	A new method for the analysis of movement dependent parasitics in full custom designed MEMS sensors. SMACD Axel Hald, Johannes Seelhorst, Pekka Herzogenrath, Jürgen Scheible, Jens Lienig
2017	—	`conf`	Electromigration Analysis of VLSI Circuits Using the Finite Element Method. VLSI-SoC (Selected Papers) Matthias Thiele, Steve Bigalke, Jens Lienig
2017	C	`conf`	Exploring the use of the finite element method for electromigration analysis in future physical design. VLSI-SoC Matthias Thiele, Steve Bigalke, Jens Lienig
2017	J	`jnl`	Large-Scale 3D Chips: Challenges and Solutions for Design Automation, Testing, and Trustworthy Integration. IPSJ Trans. Syst. LSI Des. Methodol. Johann Knechtel, Ozgur Sinanoglu, Ibrahim Abe M. Elfadel, Jens Lienig, Cliff C. N. Sze
2017	—	`conf`	MESH: Explicit and flexible generation of analog arrays. SMACD Benjamin Prautsch, Uwe Eichler, Torsten Reich, Jens Lienig
2016	—	`conf`	A novel polygon-based circuit extraction algorithm for full custom designed MEMS sensors. SMACD Axel Hald, Johannes Seelhorst, Mathias Reimann, Jürgen Scheible, Jens Lienig
2016	—	`conf`	IIP framework: A tool for reuse-centric analog circuit design. SMACD Benjamin Prautsch, Uwe Eichler, Sunil Satish Rao, Bjorn Zeugmann, Ajith Puppala, Torsten Reich, Jens Lienig
2016	—	`conf`	Load-Aware Redundant Via Insertion for Electromigration Avoidance. ISPD Steve Bigalke, Jens Lienig
2016	—	`conf`	Physical Design Automation for 3D Chip Stacks: Challenges and Solutions. ISPD Johann Knechtel, Jens Lienig
2015	—	`conf`	Automation of Analog IC Layout: Challenges and Solutions. ISPD Jürgen Scheible, Jens Lienig
2015	J	`jnl`	Planning Massive Interconnects in 3-D Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Johann Knechtel, Evangeline F. Y. Young, Jens Lienig
2014	—	`conf`	Structural planning of 3D-IC interconnects by block alignment. ASP-DAC Johann Knechtel, Evangeline F. Y. Young, Jens Lienig
2013	—	`conf`	Adaptive data model for efficient constraint handling in AMS IC design. ICECS Andreas Krinke, Goeran Jerke, Jens Lienig
2013	—	`conf`	Electromigration and its impact on physical design in future technologies. ISPD Jens Lienig
2013	—	`conf`	Extended constraint management for analog and mixed-signal IC design. ECCTD Andreas Krinke, Maximilian Mittag, Göran Jerke, Jens Lienig
2013	J	`jnl`	Novel moving-magnet electrodynamic feed units for small machine tools. Prod. Eng. Thomas Bödrich, Fabian Ehle, Michael Süßenbecker, Jens Lienig
2013	—	`conf`	Utilizing 2D and 3D rectilinear blocks for efficient IP reuse and floorplanning of 3D-integrated systems. ISPD Robert Fischbach, Johann Knechtel, Jens Lienig
2012	J	`jnl`	Assembling 2-D Blocks Into 3-D Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Johann Knechtel, Igor L. Markov, Jens Lienig
2012	A	`conf`	Multiobjective optimization of deadspace, a critical resource for 3D-IC integration. ICCAD Johann Knechtel, Igor L. Markov, Jens Lienig, Matthias Thiele
2011	—	`conf`	An ontology for constraints in custom IC design. ECCTD Andreas Krinke, Jens Lienig
2011	—	`conf`	Assembling 2D blocks into 3D chips. ISPD Johann Knechtel, Igor L. Markov, Jens Lienig
2011	—	`conf`	Interface optimization for improved routability in chip-package-board co-design. SLIP Tilo Meister, Jens Lienig, Gisbert Thomke
2011	—	`conf`	Investigating modern layout representations for improved 3d design automation. ACM Great Lakes Symposium on VLSI Robert Fischbach, Jens Lienig, Johann Knechtel
2011	—	`book`	VLSI Physical Design - From Graph Partitioning to Timing Closure. Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu
2010	—	`conf`	Early-stage determination of current-density criticality in interconnects. ISQED Göran Jerke, Jens Lienig
2010	—	`conf`	Integration of multi physics modeling of 3D stacks into modern 3D data structures. 3DIC Peter Schneider, Andy Heinig, Robert Fischbach, Jens Lienig, Sven Reitz, Jörn Stolle, Andreas Wilde
2010	—	`conf`	Solution space investigation and comparison of modern data structures for heterogeneous 3D designs. 3DIC Robert Fischbach, Jens Lienig, Matthias Thiele
2009	—	`conf`	A new methodology for constraint-driven layout design of analog circuits. ICECS Ammar Nassaj, Jens Lienig, Goeran Jerke
2009	—	`conf`	Constraint-driven design: the next step towards analog design automation. ISPD Göran Jerke, Jens Lienig
2009	—	`conf`	From 3D circuit technologies and data structures to interconnect prediction. SLIP Robert Fischbach, Jens Lienig, Tilo Meister
2008	—	`conf`	A constraint-driven methodology for placement of analog and mixed-signal integrated circuits. ICECS Ammar Nassaj, Jens Lienig, Göran Jerke
2008	A	`conf`	Novel Pin Assignment Algorithms for Components with Very High Pin Counts. DATE Tilo Meister, Jens Lienig, Gisbert Thomke
2008	—	`conf`	Universal Methodology to Handle Differential Pairs during Pin Assignment. VLSI-SoC (Selected Papers) Tilo Meister, Jens Lienig, Gisbert Thomke
2006	—	`conf`	introduction to electromigration-aware physical design. ISPD Jens Lienig
2005	Misc	`conf`	Electromigration-Aware Physical Design of Integrated Circuits. VLSI Design Jens Lienig, Göran Jerke
2005	—	`conf`	Interconnect and current density stress: an introduction to electromigration-aware design. SLIP Jens Lienig
2004	J	`jnl`	Hierarchical current-density verification in arbitrarily shaped metallization patterns of analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Göran Jerke, Jens Lienig
2004	A*	`conf`	Reliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs. DAC Goeran Jerke, Jens Lienig, Jürgen Scheible
2003	—	`conf`	Current-driven wire planning for electromigration avoidance in analog circuits. ASP-DAC Jens Lienig, Göran Jerke
2002	—	`conf`	Electromigration Avoidance in Analog Circuits: Two Methodologies for Current-Driven Routing. ASP-DAC/VLSI Design Jens Lienig, Goeran Jerke, Thorsten Adler
2002	A	`conf`	Hierarchical Current Density Verification for Electromigration Analysis in Arbitrary Shaped Metallization Patterns of Analog Circuits. DATE Goeran Jerke, Jens Lienig
2001	A	`conf`	AnalogRouter: a new approach of current-driven routing for analog circuits. DATE Jens Lienig, Goeran Jerke, Thorsten Adler
1997	J	`jnl`	A parallel genetic algorithm for performance-driven VLSI routing. IEEE Trans. Evol. Comput. Jens Lienig
1997	Misc	`conf`	Channel and Switchbox Routing with Minimized Crosstalk - A Parallel Genetic Algorithm Approach. VLSI Design Jens Lienig
1996	J	`jnl`	Gasbor: a Genetic Algorithm Approach for Solving the switchbox Routing Problem. J. Circuits Syst. Comput. Jens Lienig, Krishnaiyan Thulasiraman
1996	A	`conf`	Genetic Algorithms Applied to the Physical Design of VLSI Circuits: A Survey. PPSN Jens Lienig, James P. Cohoon
1994	Misc	`conf`	A New Genetic Algorithm for the Channel Routing Problem. VLSI Design Jens Lienig, Krishnaiyan Thulasiraman
1994	A	`conf`	An Evolutionary Algorithm for the Routing of Multi-Chip Modules. PPSN Jens Lienig, Holger Brandt
1994	—	`conf`	GASBOR: A Genetic Algorithm for Switchbox Routing in Integrated Circuits. Evo Workshops Jens Lienig, Krishnaiyan Thulasiraman
1993	J	`jnl`	A Genetic Algorithm for Channel Routing in VLSI Circuits. Evol. Comput. Jens Lienig, Krishnaiyan Thulasiraman
1992	—	`conf`	Routing algorithms for multi-chip modules. EURO-DAC Jens Lienig, Krishnaiyan Thulasiraman, M. N. S. Swamy
1991	—	`—`	Ein Verdrahtungssystem für den rechnergestützten Layoutentwurf von Multichipträgern. Jens Lienig