Jeanine E. Cook

45 papers A* 2B 3C 8Journal 12Unranked 20

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Beyond Guess and Check: Quantifying the Fidelity of Proxy Applications. SC Workshops Si Chen, Simon Garcia De Gonzalo, Omar Aaziz, Jeanine E. Cook, Avani Wildani
2022	J	`jnl`	Scalable Energy-Efficient Microarchitectures With Computational Error Tolerance Via Redundant Residue Number Systems. IEEE Trans. Computers Bobin Deng, Sriseshan Srikanth, Anirudh Jain, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook
2021	J	`jnl`	A Performance Analysis of Phantom-Cell Adaptive Mesh Refinement on CPUs and GPUs. J. Comput. Inf. Sci. Eng. Daniel Dunning, Robert W. Robey, Jeffery Kuehn, Jeanine E. Cook
2021	J	`jnl`	SortCache: Intelligent Cache Management for Accelerating Sparse Data Workloads. ACM Trans. Archit. Code Optim. Sriseshan Srikanth, Anirudh Jain, Thomas M. Conte, Erik P. DeBenedictis, Jeanine E. Cook
2020	—	`conf`	Exploring Chapel Productivity Using Some Graph Algorithms. IPDPS Workshops Richard F. Barrett, Jeanine E. Cook, Stephen L. Olivier, Omar Aaziz, Christipher D. Jenkins, Courtenay T. Vaughan
2020	J	`jnl`	MetaStrider: Architectures for Scalable Memory-centric Reduction of Sparse Data Streams. ACM Trans. Archit. Code Optim. Sriseshan Srikanth, Anirudh Jain, Joseph M. Lennon, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook
2019	—	`conf`	Fine-Grained Analysis of Communication Similarity between Real and Proxy Applications. PMBS@SC Omar Aaziz, Courtenay Vaughan, Jonathan E. Cook, Jeanine E. Cook, Jeffery Kuehn, David Richards
2019	C	`conf`	Proxy or Imposter? A Method and Case Study to Determine the Answer. CLUSTER Omar Aaziz, Jeanine E. Cook, Courtenay Vaughan, David Richards
2018	C	`conf`	A Methodology for Characterizing the Correspondence Between Real and Proxy Applications. CLUSTER Omar Aaziz, Jeanine E. Cook, Jonathan Cook, Tanner Juedeman, David Richards, Courtenay Vaughan
2018	J	`jnl`	A performance study of the time-varying cache behavior: a study on APEX, Mantevo, NAS, and PARSEC. J. Supercomput. Nafiul Alam Siddique, Patricia Grubel, Abdel-Hameed A. Badawy, Jeanine E. Cook
2018	—	`conf`	Exploring and Quantifying How Communication Behaviors in Proxies Relate to Real Applications. PMBS@SC Omar Aaziz, Jeanine E. Cook, Jonathan E. Cook, Courtenay Vaughan
2018	J	`jnl`	Extending Moore's Law via Computationally Error-Tolerant Computing. ACM Trans. Archit. Code Optim. Bobin Deng, Sriseshan Srikanth, Eric R. Hein, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook, Michael P. Frank
2018	A*	`conf`	Memory System Design for Ultra Low Power, Computationally Error Resilient Processor Microarchitectures. HPCA Sriseshan Srikanth, Paul G. Rabbat, Eric R. Hein, Bobin Deng, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook, Michael P. Frank
2017	C	`conf`	Analyzing Hybrid Transactional Memory Performance Using Intel SDE. CLUSTER Mohammad A. Qayum, Abdel-Hameed A. Badawy, Jeanine E. Cook
2017	—	`conf`	DAdHTM: Low overhead dynamically adaptive hardware transactional memory for large graphs a scalability study. SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI Mohammad Qayum, Abdel-Hameed A. Badawy, Jeanine E. Cook
2017	J	`jnl`	DyAdHyTM: A Low Overhead Dynamically Adaptive Hybrid Transactional Memory on Big Data Graphs. CoRR Mohammad Qayum, Abdel-Hameed A. Badawy, Jeanine E. Cook
2017	—	`conf`	DyAdHyTM: a low overhead dynamically adaptive hybrid transactional memory with application to large graphs. MEMSYS Mohammad A. Qayum, Abdel-Hameed A. Badawy, Jeanine E. Cook
2017	—	`conf`	LMStr: exploring shared hardware controlled scratchpad memory for multicores. MEMSYS Nafiul Alam Siddique, Abdel-Hameed A. Badawy, Jeanine E. Cook, David Resnick
2017	—	`conf`	Local memory store (LMStr): A hardware controlled shared scratchpad for multicores. SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI Nafiul Alam Siddique, Abdel-Hameed A. Badawy, Jeanine E. Cook, David Resnick
2017	J	`jnl`	PeaPaw: Performance and Energy-Aware Partitioning of Workload on Heterogeneous Platforms. ACM Trans. Design Autom. Electr. Syst. Li Tang, Richard F. Barrett, Jeanine E. Cook, Xiaobo Sharon Hu
2017	—	`conf`	Performance and Power Characteristics and Optimizations of Hybrid MPI/OpenMP LULESH Miniapps under Various Workloads. E2SC@SC Xingfu Wu, Valerie E. Taylor, Jeanine E. Cook, Tanner Juedeman
2017	—	`conf`	StAdHyTM: A Statically Adaptive Hybrid Transactional Memory: A scalability study on large parallel graphs. CCWC Mohammad A. Qayum, Abdel-Hameed A. Badawy, Jeanine E. Cook
2017	—	`conf`	Superstrider associative array architecture: Approved for unlimited unclassified release: SAND2017-7089 C. HPEC Erik P. DeBenedictis, Jeanine E. Cook, Sriseshan Srikanth, Thomas M. Conte
2017	—	`conf`	The Superstrider Architecture: Integrating Logic and Memory Towards Non-Von Neumann Computing. ICRC Sriseshan Srikanth, Thomas M. Conte, Erik P. DeBenedictis, Jeanine E. Cook
2016	—	`conf`	Computationally-redundant energy-efficient processing for y'all (CREEPY). ICRC Bobin Deng, Sriseshan Srikanth, Eric R. Hein, Paul G. Rabbat, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook
2016	—	`conf`	Energy efficiency limits of logic and memory. ICRC Sapan Agarwal, Jeanine E. Cook, Erik DeBenedictis, Michael P. Frank, Gert Cauwenberghs, Sriseshan Srikanth, Bobin Deng, Eric R. Hein, Paul G. Rabbat, Thomas M. Conte
2016	C	`conf`	LMStr: Local memory store the case for hardware controlled scratchpad memory for general purpose processors. IPCCC Nafiul Alam Siddique, Abdel-Hameed A. Badawy, Jeanine E. Cook, David Resnick
2016	—	`conf`	Using Intrinsic Performance Counters to Assess Efficiency in Task-Based Parallel Applications. IPDPS Workshops Patricia Grubel, Hartmut Kaiser, Kevin A. Huck, Jeanine E. Cook
2016	J	`jnl`	Using Performance-Power Modeling to Improve Energy Efficiency of HPC Applications. Computer Xingfu Wu, Valerie E. Taylor, Jeanine E. Cook, Philip J. Mucci
2015	—	`conf`	Optimal adiabatic scaling and the processor-in-memory-and-storage architecture (OAS+PIMS). NANOARCH Erik P. DeBenedictis, Jeanine E. Cook, Mark Hoemmen, Tzevetan S. Metodi
2015	C	`conf`	The Performance Implication of Task Size for Applications on the HPX Runtime System. CLUSTER Patricia Grubel, Hartmut Kaiser, Jeanine E. Cook, Adrian Serio
2014	—	`conf`	Abstract machine models and proxy architectures for exascale computing. Co-HPC@SC James A. Ang, Richard F. Barrett, R. E. Benner, D. Burke, C. Chan, Jeanine E. Cook, David Donofrio, Simon D. Hammond, Karl S. Hemmert, Suzanne M. Kelly, H. Le, Vitus J. Leung, David R. Resnick, Arun F. Rodrigues, John Shalf, Dylan T. Stark, Didem Unat, Nicholas J. Wright
2014	C	`conf`	Accurate statistical performance modeling and validation of out-of-order processors using Monte Carlo methods. IPCCC Waleed Alkohlani, Jeanine E. Cook, Jonathan E. Cook
2014	—	`conf`	Insight into Application Performance Using Application-Dependent Characteristics. PMBS@SC Waleed Alkohlani, Jeanine E. Cook, Nafiul Siddique
2013	—	`conf`	Binary instrumentation support for measuring performance in OpenMP programs. SE-CSE@ICSE Mustafa Elfituri, Jeanine E. Cook, Jonathan Cook
2012	—	`conf`	Towards Performance Predictive Application-Dependent Workload Characterization. SC Companion Waleed Alkohlani, Jeanine E. Cook
2011	J	`jnl`	A statistical performance model of the opteron processor. SIGMETRICS Perform. Evaluation Rev. Jeanine E. Cook, Jonathan E. Cook, Waleed Alkohlani
2010	B	`conf`	Extending the Monte Carlo Processor Modeling Technique: Statistical Performance Models of the Niagara 2 Processor. ICPP Waleed Alkohlani, Jeanine E. Cook, Ram Srinivasan
2007	J	`jnl`	An Idealistic Neuro-PPM Branch Predictor. J. Instr. Level Parallelism Ram Srinivasan, Eitan Frachtenberg, Olaf M. Lubeck, Scott Pakin, Jeanine E. Cook
2007	C	`conf`	Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization. IPCCC Santosh Talli, Ram Srinivasan, Jeanine E. Cook
2006	J	`jnl`	Performance modeling using Monte Carlo simulation. IEEE Comput. Archit. Lett. Ram Srinivasan, Jeanine E. Cook, Olaf M. Lubeck
2006	C	`conf`	Ultra-Fast CPU Performance Prediction: Extending the Monte Carlo Approach. SBAC-PAD Ram Srinivasan, Jeanine E. Cook, Olaf M. Lubeck
2005	B	`conf`	Fast, Accurate Microarchitecture Simulation Using Statistical Phase Detection. ISPASS Ram Srinivasan, Jeanine E. Cook, Shaun Cooper
2005	B	`conf`	Improved Estimation for Software Multiplexing of Performance Counters. MASCOTS Wiplove Mathur, Jeanine E. Cook
2002	A*	`conf`	Toward reducing processor simulation time via dynamic reduction of microarchitecture complexity. SIGMETRICS Jeanine E. Cook, Richard L. Oliver, Eric E. Johnson