Jean-Luc Nagel

22 papers A 4Journal 4Unranked 14

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Multi-Electroanalytical Method Capable, Duty-Cycled, 0.36 mm CICC Amrith Sukumaran, Francesco Caruso, Régis Cattenoz, B. Putter, Jean-Luc Nagel, R. Ravanilla, I. Stergiou, G. Bouilly, P. Nussbaum, Stéphane Emery
2019	—	`conf`	A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS. CICC Marc Pons, Christoph Thomas Müller, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi
2019	A	`conf`	Energy-Autonomous MCU Operating in sub-VT Regime with Tightly-Integrated Energy-Harvester : A SoC for IoT smart nodes containing a MCU with minimum-energy point of 2.9pJ/cycle and a harvester with output power range from sub-µW to 4.32mW. ISLPED Jian Deng, Jean-Luc Nagel, Loïc Zahnd, Marc Pons, David Ruffieux, Claude Arm, Pascal Persechini, Stéphane Emery
2019	—	`conf`	Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC. PRIME Christoph Thomas Müller, Marc Pons, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi
2017	A	`conf`	Ultra low power microelectronics for wearable and medical devices. DATE Pierre-François Rüedi, A. Bishof, Marcin K. Augustyniak, Pascal Persechini, Jean-Luc Nagel, Marc Pons, Stéphane Emery, Olivier Chételat
2016	—	`conf`	Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation. ESSCIRC Marc Pons, Thanh-Chau Le, Claude Arm, Daniel Séverac, Jean-Luc Nagel, Marc-Nicolas Morgan, Stéphane Emery
2013	—	`conf`	Ultra low-power standard cell design using planar bulk CMOS in subthreshold operation. PATMOS Marc Pons, Jean-Luc Nagel, Daniel Séverac, Marc-Nicolas Morgan, Daniel Sigg, Pierre-François Rüedi, Christian Piguet
2012	—	`conf`	Maximum delay variation temperature-aware standard cell design. ICECS Marc Pons, Jean-Luc Nagel, Christian Piguet
2011	A	`conf`	Energy parsimonious circuit design through probabilistic pruning. DATE Lingamneni Avinash, Christian C. Enz, Jean-Luc Nagel, Krishna V. Palem, Christian Piguet
2010	J	`jnl`	A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits. J. Low Power Electron. Luca Benini, Alberto Bocca, Alberto Bonanno, Alberto Macii, Enrico Macii, Jean-Luc Nagel, Christian Piguet, Massimo Poncino
2009	—	`conf`	An SoC combining a 132dB QVGA pixel array and a 32b DSP/MCU processor for vision applications. ISSCC Pierre-François Rüedi, Pascal Heim, Steve Gyger, François Kaess, Claude Arm, Ricardo Caseiro, Jean-Luc Nagel, Silvio Todeschini
2009	J	`jnl`	Low-Power 32-bit Dual-MAC 120 µW/MHz 1.0 V icyflex1 DSP/MCU Core. IEEE J. Solid State Circuits Claude Arm, Steve Gyger, Jean-Marc Masgonty, Marc-Nicolas Morgan, Jean-Luc Nagel, Christian Piguet, Flavio Rampogna, Patrick Volet
2008	J	`jnl`	Low-Power Heterogeneous Systems-on-Chips. J. Low Power Electron. Christian Piguet, Jean-Luc Nagel, Vincent Peiris, Steve Gyger, Daniel Séverac, Marc-Nicolas Morgan, Jean-Marc Masgonty
2008	—	`conf`	Low-power 32-bit dual-MAC 120 μW/MHz 1.0 V icyflex DSP/MCU core. ESSCIRC Claude Arm, Steve Gyger, Jean-Marc Masgonty, Marc Morgan, Jean-Luc Nagel, Christian Piguet, Flavio Rampogna, Patrick Volet
2006	A	`conf`	Architectural and technology influence on the optimal total power consumption. DATE Christian Schuster, Jean-Luc Nagel, Christian Piguet, Pierre-André Farine
2006	—	`conf`	Static and Dynamic Power Reduction by Architecture Selection. PATMOS Christian Piguet, Christian Schuster, Jean-Luc Nagel
2005	J	`jnl`	An Architecture Design Methodology for Minimal Total Power Consumption at Fixed Vdd and Vth. J. Low Power Electron. Christian Schuster, Christian Piguet, Jean-Luc Nagel, Pierre-André Farine
2004	—	`conf`	Leakage Reduction at the Architectural Level and Its Application to 16 Bit Multiplier Architectures. PATMOS Christian Schuster, Jean-Luc Nagel, Christian Piguet, Pierre-André Farine
2003	—	`conf`	Optimized filterbank fingerprint recognition. Image Processing: Algorithms and Systems Erian Bezhani, Dequn Sun, Jean-Luc Nagel, Sergio Carrato
2002	—	`conf`	A low-power VLSI architecture for face verification using elastic graph matching. EUSIPCO Jean-Luc Nagel, Patrick Stadelmann, Michael Ansorge, Fausto Pellandini
2002	—	`conf`	A multiscale morphological coprocessor for low-power face authentication. EUSIPCO Patrick Stadelmann, Jean-Luc Nagel, Michael Ansorge, Fausto Pellandini
2000	—	`conf`	A low-complexity video coder based on the Discrete Walsh Hadamard Transform. EUSIPCO Roberto Costantini, Javier Bracamonte, G. Ramponi, Jean-Luc Nagel, Michael Ansorge, Fausto Pellandini