Jean-Luc Danger

273 papers A* 2A 19B 17C 39Misc 10Journal 84Unranked 95

Year	Rank	Type	Title / Venue / Authors
2025	B	`conf`	BISSEL: Built-In Self Security via Embedded Sensors for Reproducible Side-Channel Leakage Assessment. ETS Md Toufiq Hasan Anik, Hasin Ishraq Reefat, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2025	J	`jnl`	Defeating AutoLock: From Simulation to Real-World Cache-Timing Exploits against TrustZone. IACR Cryptol. ePrint Arch. Quentin Forcioli, Sumanta Chaudhuri, Jean-Luc Danger
2025	A	`conf`	Multi-Sensor Data Fusion for Enhanced Detection of Laser Fault Injection Attacks in Cryptographic Hardware: Practical Results. DATE Mohammad Ebrahimabadi, Raphael Viera, Sylvain Guilley, Jean-Luc Danger, Jean-Max Dutertre, Naghmeh Karimi
2025	—	`conf`	Robust and Reliable PUF Protocol Exploiting Non-monotonic Quantization and Neyman-Pearson Lemma. CASCADE Neelam Nasir, Julien Béguinot, Wei Cheng, Ulrich Kühne, Jean-Luc Danger
2025	C	`conf`	TIGER: TrIaGing KEy Refreshing Frequency via Digital Sensors. SECRYPT Md Toufiq Hasan Anik, Hasin Ishraq Reefat, Mohammad Ebrahimabadi, Javad Bahrami, Hossein Pourmehrani, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2024	—	`conf`	Attacking Multi-Tenant FPGAs Without Manual Placement and Routing. ISVLSI Md Toufiq Hasan Anik, Hasin Ishraq Reefat, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2024	J	`jnl`	DELFINES: Detecting Laser Fault Injection Attacks via Digital Sensors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mohammad Ebrahimabadi, Suhee Sanjana Mehjabin, Raphael Viera, Sylvain Guilley, Jean-Luc Danger, Jean-Max Dutertre, Naghmeh Karimi
2024	C	`conf`	EM Fault Injection-Induced Clock Glitches: From Mechanism Analysis to Novel Sensor Design. IOLTS Roukoz Nabhan, Jean-Max Dutertre, Jean-Baptiste Rigaud, Jean-Luc Danger, Laurent Sauvage
2024	—	`conf`	Impact of Process Mismatch and Device Aging on SR-Latch Based True Random Number Generators. COSADE Javad Bahrami, Mohammad Ebrahimabadi, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi
2024	J	`jnl`	Multi-modal Pre-silicon Evaluation of Hardware Masking Styles. J. Electron. Test. Md Toufiq Hasan Anik, Hasin Ishraq Reefat, Wei Cheng, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2024	J	`jnl`	On the Resiliency of Protected Masked S-Boxes Against Template Attack in the Presence of Temperature and Aging Misalignments. IEEE Trans. Very Large Scale Integr. Syst. Md Toufiq Hasan Anik, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2024	J	`jnl`	Statistical Higher-Order Correlation Attacks Against Code-Based Masking. IEEE Trans. Computers Wei Cheng, Jingdian Ming, Sylvain Guilley, Jean-Luc Danger
2024	—	`conf`	TEE-Time: A Dynamic Cache Timing Analysis Tool for Trusted Execution Environments. ISQED Quentin Forcioli, Sumanta Chaudhuri, Jean-Luc Danger
2023	C	`conf`	A Tale of Two Models: Discussing the Timing and Sampling EM Fault Injection Models. FDTC Roukoz Nabhan, Jean-Max Dutertre, Jean-Baptiste Rigaud, Jean-Luc Danger, Laurent Sauvage
2023	—	`conf`	A gem5 based Platform for Micro-Architectural Security Analysis. HASP@MICRO Quentin Forcioli, Jean-Luc Danger, Sumanta Chaudhuri
2023	—	`conf`	Aging-Induced Failure Prognosis via Digital Sensors. ACM Great Lakes Symposium on VLSI Md Toufiq Hasan Anik, Hasin Ishraq Reefat, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2023	—	`conf`	Challenges in Generating True Random Numbers Considering the Variety of Corners, Aging, and Intentional Attacks. ICICDT Javad Bahrami, Jean-Luc Danger, Mohammad Ebrahimabadi, Sylvain Guilley, Naghmeh Karimi
2023	—	`conf`	Here comes SAID: A SOME/IP Attention-based mechanism for Intrusion Detection. ICUFN Natasha Alkhatib, Maria Mushtaq, Hadi Ghauch, Jean-Luc Danger
2023	—	`conf`	High-Order Collision Attack Vulnerabilities in Montgomery Ladder Implementations of RSA. SPACE Arnaud Varillon, Laurent Sauvage, Jean-Luc Danger
2023	A	`conf`	Highlighting Two EM Fault Models While Analyzing a Digital Sensor Limitations. DATE Roukoz Nabhan, Jean-Max Dutertre, Jean-Baptiste Rigaud, Jean-Luc Danger, Laurent Sauvage
2023	J	`jnl`	Quasi-linear Masking to Protect Kyber against both SCA and FIA. IACR Cryptol. ePrint Arch. Pierre-Augustin Berthet, Cédric Tavernier, Jean-Luc Danger, Laurent Sauvage
2023	Misc	`conf`	Reliability of Ring Oscillator PUFs with Reduced Helper Data. IWSEC Julien Béguinot, Wei Cheng, Jean-Luc Danger, Sylvain Guilley, Olivier Rioul, Ville Yli-Mäyry
2023	Misc	`conf`	Special Session: Security Verification & Testing for SR-Latch TRNGs. VTS Javad Bahrami, Mohammad Ebrahimabadi, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2023	—	`conf`	WIP: AMICA: Attention-based Multi-Identifier model for asynchronous intrusion detection on Controller Area networks. VehicleSec Natasha Alkhatib, Lina Achaji, Maria Mushtaq, Hadi Ghauch, Jean-Luc Danger
2022	J	`jnl`	AVTPnet: Convolutional Autoencoder for AVTP anomaly detection in Automotive Ethernet Networks. CoRR Natasha Alkhatib, Maria Mushtaq, Hadi Ghauch, Jean-Luc Danger
2022	J	`jnl`	Aging Effects on Template Attacks Launched on Dual-Rail Protected Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Farzad Niknia, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2022	J	`jnl`	Assessment and Mitigation of Power Side-Channel-Based Cross-PUF Attacks on Arbiter-PUFs and Their Derivatives. IEEE Trans. Very Large Scale Integr. Syst. Trevor Kroeger, Wei Cheng, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi
2022	C	`conf`	CAN-BERT do it? Controller Area Network Intrusion Detection System based on BERT Language Model. AICCSA Natasha Alkhatib, Maria Mushtaq, Hadi Ghauch, Jean-Luc Danger
2022	J	`jnl`	CAN-BERT do it? Controller Area Network Intrusion Detection System based on BERT Language Model. CoRR Natasha Alkhatib, Maria Mushtaq, Hadi Ghauch, Jean-Luc Danger
2022	J	`jnl`	Cross-PUF Attacks: Targeting FPGA Implementation of Arbiter-PUFs. J. Electron. Test. Trevor Kroeger, Wei Cheng, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2022	—	`conf`	Detecting Laser Fault Injection Attacks via Time-to-Digital Converter Sensors. HOST Mohammad Ebrahimabadi, Suhee Sanjana Mehjabin, Raphael Viera, Sylvain Guilley, Jean-Luc Danger, Jean-Max Dutertre, Naghmeh Karimi
2022	J	`jnl`	Information Leakage in Code-Based Masking: A Systematic Evaluation by Higher-Order Attacks. IEEE Trans. Inf. Forensics Secur. Wei Cheng, Sylvain Guilley, Jean-Luc Danger
2022	J	`jnl`	Information Leakage in Code-based Masking: A Systematic Evaluation by Higher-Order Attacks. IACR Cryptol. ePrint Arch. Wei Cheng, Sylvain Guilley, Jean-Luc Danger
2022	J	`jnl`	Interleaved Challenge Loop PUF: A Highly Side-Channel Protected Oscillator-Based PUF. IEEE Trans. Circuits Syst. I Regul. Pap. Lars Tebelmann, Jean-Luc Danger, Michael Pehl
2022	A	`conf`	Leakage Power Analysis in Different S-Box Masking Protection Schemes. DATE Javad Bahrami, Mohammad Ebrahimabadi, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2022	C	`conf`	On the Practicality of Relying on Simulations in Different Abstraction Levels for Pre-silicon Side-Channel Analysis. SECRYPT Javad Bahrami, Mohammad Ebrahimabadi, Sofiane Takarabt, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2022	C	`conf`	Unsupervised Network Intrusion Detection System for AVTP in Automotive Ethernet Networks. IV Natasha Alkhatib, Maria Mushtaq, Hadi Ghauch, Jean-Luc Danger
2021	—	`conf`	Analysis and Protection of the Two-Metric Helper Data Scheme. COSADE Lars Tebelmann, Ulrich Kühne, Jean-Luc Danger, Michael Pehl
2021	J	`jnl`	Analysis and Protection of the Two-metric Helper Data Scheme. IACR Cryptol. ePrint Arch. Lars Tebelmann, Ulrich Kühne, Jean-Luc Danger, Michael Pehl
2021	C	`conf`	Analysis of a Laser-induced Instructions Replay Fault Model in a 32-bit Microcontroller. DSD Vanthanh Khuat, Jean-Max Dutertre, Jean-Luc Danger
2021	J	`jnl`	Categorizing all linear codes of IPM over ${\mathbb {F}}_{2^{8}}$. Cryptogr. Commun. Wei Cheng, Sylvain Guilley, Jean-Luc Danger
2021	J	`jnl`	Detecting Failures and Attacks via Digital Sensors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Md Toufiq Hasan Anik, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2021	J	`jnl`	Detecting faults in inner product masking scheme. J. Cryptogr. Eng. Wei Cheng, Claude Carlet, Kouassi Goli, Jean-Luc Danger, Sylvain Guilley
2021	J	`jnl`	Diffusional Side-Channel Leakage From Unrolled Lightweight Block Ciphers: A Case Study of Power Analysis on PRINCE. IEEE Trans. Inf. Forensics Secur. Ville Yli-Mäyry, Rei Ueno, Noriyuki Miura, Makoto Nagata, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger, Naofumi Homma
2021	—	`conf`	Enhancing the Resiliency of Multi-bit Parallel Arbiter-PUF and Its Derivatives Against Power Attacks. COSADE Trevor Kroeger, Wei Cheng, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi
2021	J	`jnl`	Information Leakages in Code-based Masking: A Unified Quantification Approach. IACR Cryptol. ePrint Arch. Wei Cheng, Sylvain Guilley, Claude Carlet, Jean-Luc Danger, Sihem Mesnager
2021	J	`jnl`	Information Leakages in Code-based Masking: A Unified Quantification Approach. IACR Trans. Cryptogr. Hardw. Embed. Syst. Wei Cheng, Sylvain Guilley, Claude Carlet, Jean-Luc Danger, Sihem Mesnager
2021	C	`conf`	Laser Fault Injection in a 32-bit Microcontroller: from the Flash Interface to the Execution Pipeline. FDTC Vanthanh Khuat, Jean-Luc Danger, Jean-Max Dutertre
2021	A	`conf`	Making Obfuscated PUFs Secure Against Power Side-Channel Based Modeling Attacks. DATE Trevor Kroeger, Wei Cheng, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi
2021	J	`jnl`	Optimizing Inner Product Masking Scheme by a Coding Theory Approach. IEEE Trans. Inf. Forensics Secur. Wei Cheng, Sylvain Guilley, Claude Carlet, Sihem Mesnager, Jean-Luc Danger
2021	—	`conf`	Parasite: Mitigating Physical Side-Channel Attacks Against Neural Networks. SPACE Hervé Chabanne, Jean-Luc Danger, Linda Guiga, Ulrich Kühne
2021	C	`conf`	RSM Protection of the PRESENT Lightweight Cipher as a RISC-V Extension. DSD Etienne Tehrani, Tarik Graba, Abdelmalek Si-Merabet, Jean-Luc Danger
2021	J	`jnl`	Reducing Aging Impacts in Digital Sensors via Run-Time Calibration. J. Electron. Test. Md Toufiq Hasan Anik, Mohammad Ebrahimabadi, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2021	J	`jnl`	SOME/IP Intrusion Detection using Deep Learning-based Sequential Models in Automotive Ethernet Networks. CoRR Natasha Alkhatib, Hadi Ghauch, Jean-Luc Danger
2021	J	`jnl`	Security evaluation against side-channel analysis at compilation time. IACR Cryptol. ePrint Arch. Nicolas Bruneau, Charles Christen, Jean-Luc Danger, Adrien Facon, Sylvain Guilley
2021	J	`jnl`	Side channel attacks for architecture extraction of neural networks. CAAI Trans. Intell. Technol. Hervé Chabanne, Jean-Luc Danger, Linda Guiga, Ulrich Kühne
2021	—	`conf`	Telepathic Headache: Mitigating Cache Side-Channel Attacks on Convolutional Neural Networks. ACNS (1) Hervé Chabanne, Jean-Luc Danger, Linda Guiga, Ulrich Kühne
2021	—	`conf`	Testing and Reliability Enhancement of Security Primitives. DFT Md Toufiq Hasan Anik, Jean-Luc Danger, Omar Diankha, Mohammad Ebrahimabadi, Christoph Frisch, Sylvain Guilley, Naghmeh Karimi, Michael Pehl, Sofiane Takarabt
2021	—	`conf`	Virtual Platform to Analyze the Security of a System on Chip at Microarchitectural Level. EuroS&P Workshops Quentin Forcioli, Jean-Luc Danger, Clémentine Maurice, Lilian Bossuet, Florent Bruguier, Maria Mushtaq, David Novo, Loïc France, Pascal Benoit, Sylvain Guilley, Thomas Perianin
2021	B	`conf`	Water- PUF: An Insider Threat Resistant PUF Enrollment Protocol Based on Machine Learning Watermarking. NCA Sameh Khalfaoui, Jean Leneutre, Arthur Villard, Ivan Gazeau, Jingxuan Ma, Jean-Luc Danger, Pascal Urien
2020	J	`jnl`	Challenge codes for physically unclonable functions with Gaussian delays: A maximum entropy problem. Adv. Math. Commun. Alexander Schaub, Olivier Rioul, Jean-Luc Danger, Sylvain Guilley, Joseph Boutros
2020	—	`conf`	Characterization of Electromagnetic Fault Injection on a 32-bit Microcontroller Instruction Buffer. AsianHOST Oualid Trabelsi, Laurent Sauvage, Jean-Luc Danger
2020	A	`conf`	Cross-PUF Attacks on Arbiter-PUFs through their Power Side-Channel. ITC Trevor Kroeger, Wei Cheng, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi
2020	A	`conf`	Effect of Aging on PUF Modeling Attacks based on Power Side-Channel Observations. DATE Trevor Kroeger, Wei Cheng, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi
2020	—	`conf`	Experimental Analysis of the Electromagnetic Instruction Skip Fault Model. DTIS Alexandre Menu, Jean-Max Dutertre, Olivier Potin, Jean-Baptiste Rigaud, Jean-Luc Danger
2020	B	`conf`	Failure and Attack Detection by Digital Sensors. ETS Md Toufiq Hasan Anik, Rachit Saini, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2020	J	`jnl`	High Throughput/Gate AES Hardware Architectures Based on Datapath Compression. IEEE Trans. Computers Rei Ueno, Naofumi Homma, Sumio Morioka, Noriyuki Miura, Kohei Matsuda, Makoto Nagata, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger
2020	Misc	`conf`	On the Effect of Aging on Digital Sensors. VLSID Md Toufiq Hasan Anik, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi
2020	C	`conf`	On-Chip Voltage and Temperature Digital Sensor for Security, Reliability, and Portability. ICCD Md Toufiq Hasan Anik, Mohammad Ebrahimabadi, Hamed Pirsiavash, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2020	J	`jnl`	Optimizing Inner Product Masking Scheme by A Coding Theory Approach. IACR Cryptol. ePrint Arch. Wei Cheng, Sylvain Guilley, Claude Carlet, Sihem Mesnager, Jean-Luc Danger
2020	B	`conf`	PUF Enrollment and Life Cycle Management: Solutions and Perspectives for the Test Community. ETS Amir Alipour, Vincent Beroulle, Bertrand Cambou, Jean-Luc Danger, Giorgio Di Natale, David Hély, Sylvain Guilley, Naghmeh Karimi
2020	—	`conf`	Processor Anchor to Increase the Robustness Against Fault Injection and Cyber Attacks. COSADE Jean-Luc Danger, Adrien Facon, Sylvain Guilley, Karine Heydemann, Ulrich Kühne, Abdelmalek Si-Merabet, Michaël Timbert, Baptiste Pecatte
2020	C	`conf`	RISC-V Extension for Lightweight Cryptography. DSD Etienne Tehrani, Tarik Graba, Abdelmalek Si-Merabet, Jean-Luc Danger
2020	J	`jnl`	Self-Secured PUF: Protecting the Loop PUF by Masking. IACR Cryptol. ePrint Arch. Lars Tebelmann, Jean-Luc Danger, Michael Pehl
2020	—	`conf`	Self-secured PUF: Protecting the Loop PUF by Masking. COSADE Lars Tebelmann, Jean-Luc Danger, Michael Pehl
2020	C	`conf`	Single-bit Laser Fault Model in NOR Flash Memories: Analysis and Exploitation. FDTC Alexandre Menu, Jean-Max Dutertre, Jean-Baptiste Rigaud, Brice Colombier, Pierre-Alain Moëllic, Jean-Luc Danger
2020	—	`conf`	The Big Picture of Delay-PUF Dependability. ECCTD Alexander Schaub, Jean-Luc Danger, Olivier Rioul, Sylvain Guilley
2019	—	`conf`	Classification of Lightweight Block Ciphers for Specific Processor Accelerated Implementations. ICECS Etienne Tehrani, Tarik Graba, Abdelmalek Si-Merabet, Sylvain Guilley, Jean-Luc Danger
2019	J	`jnl`	Detecting Faults in Inner Product Masking Scheme - IPM-FD: IPM with Fault Detection. IACR Cryptol. ePrint Arch. Wei Cheng, Claude Carlet, Kouassi Goli, Sylvain Guilley, Jean-Luc Danger
2019	—	`conf`	Detecting Faults in Inner-Product Masking Scheme - IPM-FD: IPM with Fault Detection. PROOFS Wei Cheng, Claude Carlet, Kouassi Goli, Jean-Luc Danger, Sylvain Guilley
2019	C	`conf`	LAOCOÖN: A Run-Time Monitoring and Verification Approach for Hardware Trojan Detection. DSD Jean-Luc Danger, Laurent Fribourg, Ulrich Kühne, Maha Naceur
2019	—	`conf`	Laser-induced Single-bit Faults in Flash Memory: Instructions Corruption on a 32-bit Microcontroller. HOST Brice Colombier, Alexandre Menu, Jean-Max Dutertre, Pierre-Alain Moëllic, Jean-Baptiste Rigaud, Jean-Luc Danger
2019	C	`conf`	Precise Spatio-Temporal Electromagnetic Fault Injections on Data Transfers. FDTC Alexandre Menu, Shivam Bhasin, Jean-Max Dutertre, Jean-Baptiste Rigaud, Jean-Luc Danger
2019	—	`conf`	Two-Metric Helper Data for Highly Robust and Secure Delay PUFs. IWASI Jean-Luc Danger, Sylvain Guilley, Alexander Schaub
2018	J	`jnl`	An Efficient SCA Leakage Model Construction Method Under Predictable Evaluation. IEEE Trans. Inf. Forensics Secur. Ming Tang, Pengbo Wang, Xiaoqi Ma, Wenjie Chang, Huanguo Zhang, Guojun Peng, Jean-Luc Danger
2018	C	`conf`	An Improved Analysis of Reliability and Entropy for Delay PUFs. DSD Alexander Schaub, Jean-Luc Danger, Sylvain Guilley, Olivier Rioul
2018	C	`conf`	Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology. DSD Jean-Luc Danger, Risa Yashiro, Tarik Graba, Yves Mathieu, Abdelmalek Si-Merabet, Kazuo Sakiyama, Noriyuki Miura, Makoto Nagata
2018	—	`ch.`	Attack Tree Construction and Its Application to the Connected Vehicle. Cyber-Physical Systems Security Khaled Karray, Jean-Luc Danger, Sylvain Guilley, M. Abdelaziz Elaabid
2018	C	`conf`	CCFI-Cache: A Transparent and Flexible Hardware Protection for Code and Control-Flow Integrity. DSD Jean-Luc Danger, Adrien Facon, Sylvain Guilley, Karine Heydemann, Ulrich Kühne, Abdelmalek Si-Merabet, Michaël Timbert
2018	—	`conf`	Development of the Unified Security Requirements of PUFs During the Standardization Process. SecITC Nicolas Bruneau, Jean-Luc Danger, Adrien Facon, Sylvain Guilley, Soshi Hamaguchi, Yohei Hori, Yousung Kang, Alexander Schaub
2018	C	`conf`	Generic Architecture for Lightweight Block Ciphers: A First Step Towards Agile Implementation of Multiple Ciphers. WISTP Etienne Tehrani, Jean-Luc Danger, Tarik Graba
2018	—	`ch.`	Identifier Randomization: An Efficient Protection Against CAN-Bus Attacks. Cyber-Physical Systems Security Khaled Karray, Jean-Luc Danger, Sylvain Guilley, M. Abdelaziz Elaabid
2018	—	`conf`	Impact of Aging on Template Attacks. ACM Great Lakes Symposium on VLSI Naghmeh Karimi, Sylvain Guilley, Jean-Luc Danger
2018	J	`jnl`	Impact of Aging on the Reliability of Delay PUFs. J. Electron. Test. Naghmeh Karimi, Jean-Luc Danger, Sylvain Guilley
2018	J	`jnl`	Laser-induced Single-bit Faults in Flash Memory: Instructions Corruption on a 32-bit Microcontroller. IACR Cryptol. ePrint Arch. Brice Colombier, Alexandre Menu, Jean-Max Dutertre, Pierre-Alain Moëllic, Jean-Baptiste Rigaud, Jean-Luc Danger
2018	C	`conf`	On the Effect of Aging in Detecting Hardware Trojan Horses with Template Analysis. IOLTS Naghmeh Karimi, Jean-Luc Danger, Sylvain Guilley
2018	J	`jnl`	On the Performance and Security of Multiplication in Cryptogr. Jean-Luc Danger, Youssef El Housni, Adrien Facon, Cheikh Thiecoumba Gueye, Sylvain Guilley, Sylvie Herbel, Ousmane Ndiaye, Edoardo Persichetti, Alexander Schaub
2018	—	`ch.`	Physical Security Versus Masking Schemes. Cyber-Physical Systems Security Jean-Luc Danger, Sylvain Guilley, Annelie Heuser, Axel Legay, Ming Tang
2018	C	`conf`	Prediction-Based Intrusion Detection System for In-Vehicle Networks Using Supervised Learning and Outlier-Detection. WISTP Khaled Karray, Jean-Luc Danger, Sylvain Guilley, Moulay Abdelaziz Elaabid
2018	J	`jnl`	The Conflicted Usage of RLUTs for Security-Critical Applications on FPGA. J. Hardw. Syst. Secur. Debapriya Basu Roy, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Wei He, Debdeep Mukhopadhyay, Zakaria Najm, Xuan Thuy Ngo
2017	J	`jnl`	A Generic Table Recomputation-Based Higher-Order Masking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ming Tang, Zhenlong Qiu, Zhipeng Guo, Yi Mu, Xinyi Huang, Jean-Luc Danger
2017	A	`conf`	Analyzing security breaches of countermeasures throughout the refinement process in hardware design flow. DATE Jean-Luc Danger, Sylvain Guilley, Philippe Nguyen, Robert Nguyen, Youssef Souissi
2017	J	`jnl`	Cryptographically Secure Shield for Security IPs Protection. IEEE Trans. Computers Xuan Thuy Ngo, Jean-Luc Danger, Sylvain Guilley, Tarik Graba, Yves Mathieu, Zakaria Najm, Shivam Bhasin
2017	B	`conf`	Impact of the switching activity on the aging of delay-PUFs. ETS Naghmeh Karimi, Jean-Luc Danger, Mariem Slimani, Sylvain Guilley
2017	J	`jnl`	PFD - A Flexible Higher-Order Masking Scheme. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ming Tang, Zhipeng Guo, Annelie Heuser, Yanzhen Ren, Jie Li, Jean-Luc Danger
2017	—	`ed.`	PROOFS 2017, 6th International Workshop on Security Proofs for Embedded Systems, Taipei, Taiwan, September 29th, 2017 PROOFS Ulrich Kühne, Jean-Luc Danger, Sylvain Guilley
2017	J	`jnl`	Predictive Aging of Reliability of two Delay PUFs. IACR Cryptol. ePrint Arch. Naghmeh Karimi, Jean-Luc Danger, Florent Lozach, Sylvain Guilley
2017	—	`ed.`	Security, Privacy, and Applied Cryptography Engineering - 7th International Conference, SPACE 2017, Goa, India, December 13-17, 2017, Proceedings SPACE Sk Subidh Ali, Jean-Luc Danger, Thomas Eisenbarth
2016	J	`jnl`	A Novel Methodology for Testing Hardware Security and Trust Exploiting On-Chip Power Noise Measurements (Extended Version). IACR Cryptol. ePrint Arch. Daisuke Fujimoto, Shivam Bhasin, Makoto Nagata, Jean-Luc Danger
2016	J	`jnl`	Correlated Extra-Reductions Defeat Blinded Regular Exponentiation - Extended Version. IACR Cryptol. ePrint Arch. Margaux Dugardin, Sylvain Guilley, Jean-Luc Danger, Zakaria Najm, Olivier Rioul
2016	A	`conf`	Correlated Extra-Reductions Defeat Blinded Regular Exponentiation. CHES Margaux Dugardin, Sylvain Guilley, Jean-Luc Danger, Zakaria Najm, Olivier Rioul
2016	—	`conf`	Delay PUF Assessment Method Based on Side-Channel and Modeling Analyzes: The Final Piece of All-in-One Assessment Methodology. Trustcom/BigDataSE/ISPA Kazuhide Fukushima, Youssef Souissi, Seira Hidano, Robert Nguyen, Jean-Luc Danger, Sylvain Guilley, Yuto Nakano, Shinsaku Kiyomoto, Laurent Sauvage
2016	—	`conf`	Dismantling Real-World ECC with Horizontal and Vertical Template Attacks. COSADE Margaux Dugardin, Louiza Papachristodoulou, Zakaria Najm, Lejla Batina, Jean-Luc Danger, Sylvain Guilley
2016	—	`conf`	Hardware-Enforced Protection Against Buffer Overflow Using Masked Program Counter. The New Codebreakers Jean-Luc Danger, Sylvain Guilley, Thibault Porteboeuf, Florian Praden, Michaël Timbert
2016	—	`conf`	Improving the Big Mac Attack on Elliptic Curve Cryptography. The New Codebreakers Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
2016	B	`conf`	Inter-class vs. mutual information as side-channel distinguishers. ISIT Olivier Rioul, Annelie Heuser, Sylvain Guilley, Jean-Luc Danger
2016	J	`jnl`	Method taking into account process dispersion to detect hardware Trojan Horse by side-channel analysis. J. Cryptogr. Eng. Xuan Thuy Ngo, Zakaria Najm, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger
2016	B	`conf`	On the entropy of Physically Unclonable Functions. ISIT Olivier Rioul, Patrick Solé, Sylvain Guilley, Jean-Luc Danger
2016	A*	`conf`	PLL to the rescue: a novel EM fault countermeasure. DAC Noriyuki Miura, Zakaria Najm, Wei He, Shivam Bhasin, Xuan Thuy Ngo, Makoto Nagata, Jean-Luc Danger
2016	—	`conf`	Predictive Aging of Reliability of Two Delay PUFs. SPACE Naghmeh Karimi, Jean-Luc Danger, Florent Lozach, Sylvain Guilley
2016	J	`jnl`	Time-Frequency Analysis for Second-Order Attacks. IACR Cryptol. ePrint Arch. Pierre Belgarric, Shivam Bhasin, Nicolas Bruneau, Jean-Luc Danger, Nicolas Debande, Sylvain Guilley, Annelie Heuser, Zakaria Najm, Olivier Rioul
2015	J	`jnl`	A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation. IEEE Trans. Very Large Scale Integr. Syst. Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Jean-Luc Danger, Takafumi Aoki
2015	—	`conf`	A novel methodology for testing hardware security and trust exploiting On-Chip Power noise Measurement. ASP-DAC Daisuke Fujimoto, Makoto Nagata, Shivam Bhasin, Jean-Luc Danger
2015	—	`conf`	Countering early propagation and routing imbalance of DPL designs in a tree-based FPGA. ICICDT Emna Amouri, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger
2015	J	`jnl`	Dismantling real-world ECC with Horizontal and Vertical Template Attacks. IACR Cryptol. ePrint Arch. Margaux Dugardin, Louiza Papachristodoulou, Zakaria Najm, Lejla Batina, Jean-Luc Danger, Sylvain Guilley, Jean-Christophe Courrège, Carine Therond
2015	J	`jnl`	Exploiting FPGA Block Memories for Protected Cryptographic Implementations. ACM Trans. Reconfigurable Technol. Syst. Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Wei He
2015	C	`conf`	From theory to practice of private circuit: A cautionary note. ICCD Debapriya Basu Roy, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger, Debdeep Mukhopadhyay
2015	—	`conf`	Hardware property checker for run-time Hardware Trojan detection. ECCTD Xuan Thuy Ngo, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm, Olivier Emery
2015	A	`conf`	Hardware trojan detection by delay and electromagnetic measurements. DATE Xuan Thuy Ngo, Ingrid Exurville, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm, Jean-Baptiste Rigaud, Bruno Robisson
2015	J	`jnl`	High Precision Fault Injections on the Instruction Cache of ARMv7-M Architectures. CoRR Lionel Rivière, Zakaria Najm, Pablo Rauzy, Jean-Luc Danger, Julien Bringer, Laurent Sauvage
2015	J	`jnl`	High Precision Fault Injections on the Instruction Cache of ARMv7-M Architectures. IACR Cryptol. ePrint Arch. Lionel Rivière, Zakaria Najm, Pablo Rauzy, Jean-Luc Danger, Julien Bringer, Laurent Sauvage
2015	—	`conf`	High precision fault injections on the instruction cache of ARMv7-M architectures. HOST Lionel Rivière, Zakaria Najm, Pablo Rauzy, Jean-Luc Danger, Julien Bringer, Laurent Sauvage
2015	J	`jnl`	Improving the Big Mac Attack on Elliptic Curve Cryptography. IACR Cryptol. ePrint Arch. Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
2015	C	`conf`	Integrated Sensor: A Backdoor for Hardware Trojan Insertions? DSD Xuan Thuy Ngo, Zakaria Najm, Shivam Bhasin, Debapriya Basu Roy, Jean-Luc Danger, Sylvain Guilley
2015	—	`conf`	Linear complementary dual code improvement to strengthen encoded circuit against hardware Trojan horses. HOST Xuan Thuy Ngo, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm
2015	—	`conf`	Optimized linear complementary codes implementation for hardware trojan prevention. ECCTD Claude Carlet, Abderrahman Daif, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm, Xuan Thuy Ngo, Thibault Porteboeuf, Cédric Tavernier
2015	—	`conf`	Private circuits II versus fault injection attacks. ReConFig Henitsoa Rakotomalala, Xuan Thuy Ngo, Zakaria Najm, Jean-Luc Danger, Sylvain Guilley
2015	—	`conf`	Reconfigurable LUT: A Double Edged Sword for Security-Critical Applications. SPACE Debapriya Basu Roy, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger, Debdeep Mukhopadhyay, Xuan Thuy Ngo, Zakaria Najm
2015	J	`jnl`	Reconfigurable LUT: Boon or Bane for Secure Applications. IACR Cryptol. ePrint Arch. Debapriya Basu Roy, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger, Debdeep Mukhopadhyay
2015	J	`jnl`	Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis. IET Inf. Secur. Wei He, Shivam Bhasin, Andrés Otero, Tarik Graba, Eduardo de la Torre, Jean-Luc Danger
2014	C	`conf`	A Pre-processing Composition for Secret Key Recovery on Android Smartphone. WISTP Yuto Nakano, Youssef Souissi, Robert Nguyen, Laurent Sauvage, Jean-Luc Danger, Sylvain Guilley, Shinsaku Kiyomoto, Yutaka Miyake
2014	—	`conf`	A look into SIMON from a side-channel perspective. HOST Shivam Bhasin, Tarik Graba, Jean-Luc Danger, Zakaria Najm
2014	J	`jnl`	Achieving side-channel high-order correlation immunity with leakage squeezing. J. Cryptogr. Eng. Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Houssem Maghrebi, Emmanuel Prouff
2014	—	`conf`	Analysis and Improvements of the DPA Contest v4 Implementation. SPACE Shivam Bhasin, Nicolas Bruneau, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm
2014	B	`conf`	Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security. FPL Emna Amouri, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger, Habib Mehrez
2014	—	`conf`	Boosting Higher-Order Correlation Attacks by Dimensionality Reduction. SPACE Nicolas Bruneau, Jean-Luc Danger, Sylvain Guilley, Annelie Heuser, Yannick Teglia
2014	J	`jnl`	Boosting Higher-Order Correlation Attacks by Dimensionality Reduction. IACR Cryptol. ePrint Arch. Nicolas Bruneau, Jean-Luc Danger, Sylvain Guilley, Annelie Heuser, Yannick Teglia
2014	—	`conf`	Cryptographically secure shields. HOST Jean-Michel Cioranesco, Jean-Luc Danger, Tarik Graba, Sylvain Guilley, Yves Mathieu, David Naccache, Xuan Thuy Ngo
2014	—	`conf`	Encoding the state of integrated circuits: a proactive and reactive protection against hardware Trojans horses. WESS Xuan Thuy Ngo, Sylvain Guilley, Shivam Bhasin, Jean-Luc Danger, Zakaria Najm
2014	—	`ed.`	Foundations and Practice of Security - 6th International Symposium, FPS 2013, La Rochelle, France, October 21-22, 2013, Revised Selected Papers FPS Jean-Luc Danger, Mourad Debbabi, Jean-Yves Marion, Joaquín García-Alfaro, Nur Zincir-Heywood
2014	—	`conf`	HCODE: Hardware-Enhanced Real-Time CFI. PPREW@ACSAC Jean-Luc Danger, Sylvain Guilley, Thibault Porteboeuf, Florian Praden, Michaël Timbert
2014	A	`conf`	Hacking and protecting IC hardware. DATE Said Hamdioui, Jean-Luc Danger, Giorgio Di Natale, Fethulah Smailbegovic, Gerard van Battum, Mark Tehranipoor
2014	J	`jnl`	Hardware Trojan Horses in Cryptographic IP Cores. IACR Cryptol. ePrint Arch. Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Xuan Thuy Ngo, Laurent Sauvage
2014	—	`conf`	Hardware-enforced Protection against Software Reverse-Engineering based on an Instruction Set Encoding. PPREW@POPL Jean-Luc Danger, Sylvain Guilley, Florian Praden
2014	—	`conf`	High-order timing attacks. CS2@HiPEAC Jean-Luc Danger, Nicolas Debande, Sylvain Guilley, Youssef Souissi
2014	J	`jnl`	Leakage squeezing: Optimal implementation and security evaluation. J. Math. Cryptol. Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Houssem Maghrebi
2014	J	`jnl`	Multiply Constant-Weight Codes and the Reliability of Loop Physically Unclonable Functions. CoRR Yeow Meng Chee, Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Han Mao Kiah, Jon-Lark Kim, Patrick Solé, Xiande Zhang
2014	J	`jnl`	Multiply Constant-Weight Codes and the Reliability of Loop Physically Unclonable Functions. IEEE Trans. Inf. Theory Yeow Meng Chee, Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Han Mao Kiah, Jon-Lark Kim, Patrick Solé, Xiande Zhang
2014	—	`conf`	Physical Security Evaluation at an Early Design-Phase: A Side-Channel Aware Simulation Methodology. ES4CPS@DATE Shivam Bhasin, Jean-Luc Danger, Tarik Graba, Yves Mathieu, Daisuke Fujimoto, Makoto Nagata
2014	J	`jnl`	Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage. IEICE Trans. Electron. Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, Jean-Luc Danger
2014	J	`jnl`	Practical improvements of side-channel attacks on AES: feedback from the 2nd DPA contest. J. Cryptogr. Eng. Christophe Clavier, Jean-Luc Danger, Guillaume Duc, M. Abdelaziz Elaabid, Benoît Gérard, Sylvain Guilley, Annelie Heuser, Michael Kasper, Yang Li, Victor Lomné, Daisuke Nakatsu, Kazuo Ohta, Kazuo Sakiyama, Laurent Sauvage, Werner Schindler, Marc Stöttinger, Nicolas Veyrat-Charvillon, Matthieu Walle, Antoine Wurcker
2014	—	`conf`	Side channel analysis on an embedded hardware fingerprint biometric comparator & low cost countermeasures. HASP@ISCA Taoufik Chouta, Tarik Graba, Jean-Luc Danger, Julien Bringer, Maël Berthier, Yves Bocktaels, Mélanie Favre, Hervé Chabanne
2014	J	`jnl`	Side-Channel Leakage and Trace Compression using Normalized Inter-Class Variance. IACR Cryptol. ePrint Arch. Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm
2014	—	`conf`	Side-channel leakage and trace compression using normalized inter-class variance. HASP@ISCA Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm
2014	—	`conf`	Side-channel leakage on silicon substrate of CMOS cryptographic chip. HOST Daisuke Fujimoto, Daichi Tanaka, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Shivam Bhasin, Jean-Luc Danger
2014	—	`conf`	Studying Leakages on an Embedded Biometric System Using Side Channel Analysis. COSADE Maël Berthier, Yves Bocktaels, Julien Bringer, Hervé Chabanne, Taoufik Chouta, Jean-Luc Danger, Mélanie Favre, Tarik Graba
2014	J	`jnl`	Studying Potential Side Channel Leakages on an Embedded Biometric Comparison System. IACR Cryptol. ePrint Arch. Maël Berthier, Yves Bocktaels, Julien Bringer, Hervé Chabanne, Taoufik Chouta, Jean-Luc Danger, Mélanie Favre, Tarik Graba
2013	J	`jnl`	A formal study of two physical countermeasures against side channel attacks. J. Cryptogr. Eng. Sébastien Briais, Jean-Luc Danger, Sylvain Guilley
2013	—	`conf`	A low-entropy first-degree secure provable masking scheme for resource-constrained devices. WESS Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm
2013	J	`jnl`	A synthesis of side-channel attacks on elliptic curve cryptography in smart-cards. J. Cryptogr. Eng. Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
2013	—	`conf`	Design methodology of an ASIC TRNG based on an open-loop delay chain. NEWCAS Molka Ben-Romdhane, Tarik Graba, Jean-Luc Danger, Yves Mathieu
2013	J	`jnl`	Dynamic Countermeasure Against the Zero Power Analysis. IACR Cryptol. ePrint Arch. Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
2013	—	`conf`	Dynamic countermeasure against the Zero Power Analysis. ISSPIT Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
2013	—	`conf`	Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA. HASP@ISCA Zouha Cherif, Jean-Luc Danger, Florent Lozach, Yves Mathieu, Lilian Bossuet
2013	—	`conf`	Exploiting FPGA block memories for protected cryptographic implementations. ReCoSoC Shivam Bhasin, Wei He, Sylvain Guilley, Jean-Luc Danger
2013	—	`conf`	Exploring the Relations between Fault Sensitivity and Power Consumption. COSADE Yang Li, Sho Endo, Nicolas Debande, Naofumi Homma, Takafumi Aoki, Thanh-Ha Le, Jean-Luc Danger, Kazuo Ohta, Kazuo Sakiyama
2013	C	`conf`	FPGA Design of an Open-Loop True Random Number Generator. DSD Florent Lozach, Molka Ben-Romdhane, Tarik Graba, Jean-Luc Danger
2013	J	`jnl`	From cryptography to hardware: analyzing and protecting embedded Xilinx BRAM for cryptographic applications. J. Cryptogr. Eng. Shivam Bhasin, Sylvain Guilley, Annelie Heuser, Jean-Luc Danger
2013	C	`conf`	Hardware Trojan Horses in Cryptographic IP Cores. FDTC Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Xuan Thuy Ngo, Laurent Sauvage
2013	B	`conf`	Multiply constant weight codes. ISIT Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Jon-Lark Kim, Patrick Solé
2013	J	`jnl`	NICV: Normalized Inter-Class Variance for Detection of Side-Channel Leakage. IACR Cryptol. ePrint Arch. Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm
2013	—	`conf`	Stochastic Model of a Metastability-Based True Random Number Generator. TRUST Molka Ben-Romdhane, Tarik Graba, Jean-Luc Danger
2013	C	`conf`	Time-Frequency Analysis for Second-Order Attacks. CARDIS Pierre Belgarric, Shivam Bhasin, Nicolas Bruneau, Jean-Luc Danger, Nicolas Debande, Sylvain Guilley, Annelie Heuser, Zakaria Najm, Olivier Rioul
2012	A	`conf`	3D Hardware Canaries. CHES Sébastien Briais, Stéphane Caron, Jean-Michel Cioranesco, Jean-Luc Danger, Sylvain Guilley, Jacques-Henri Jourdan, Arthur Milchior, David Naccache, Thibault Porteboeuf
2012	J	`jnl`	3D Hardware Canaries. IACR Cryptol. ePrint Arch. Sébastien Briais, Stéphane Caron, Jean-Michel Cioranesco, Jean-Luc Danger, Sylvain Guilley, Jacques-Henri Jourdan, Arthur Milchior, David Naccache, Thibault Porteboeuf
2012	B	`conf`	A First-Order Leak-Free Masking Countermeasure. CT-RSA Houssem Maghrebi, Emmanuel Prouff, Sylvain Guilley, Jean-Luc Danger
2012	J	`jnl`	A First-Order Leak-Free Masking Countermeasure. IACR Cryptol. ePrint Arch. Houssem Maghrebi, Emmanuel Prouff, Sylvain Guilley, Jean-Luc Danger
2012	C	`conf`	A Small and High-Performance Coprocessor for Fingerprint Match-on-Card. DSD Taoufik Chouta, Jean-Luc Danger, Laurent Sauvage, Tarik Graba
2012	J	`jnl`	A formal study of two physical countermeasures against side channel attacks. IACR Cryptol. ePrint Arch. Sébastien Briais, Sylvain Guilley, Jean-Luc Danger
2012	C	`conf`	An Easy-to-Design PUF Based on a Single Oscillator: The Loop PUF. DSD Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Lilian Bossuet
2012	J	`jnl`	Blind Cartography for Side Channel Attacks: Cross-Correlation Cartography. Int. J. Reconfigurable Comput. Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
2012	C	`conf`	Comparison between Side-Channel Analysis Distinguishers. ICICS Houssem Maghrebi, Olivier Rioul, Sylvain Guilley, Jean-Luc Danger
2012	—	`conf`	From Cryptography to Hardware: Analyzing Embedded Xilinx BRAM for Cryptographic Applications. MICRO Workshops Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger
2012	—	`ch.`	Global Faults on Cryptographic Circuits. Fault Analysis in Cryptography Sylvain Guilley, Jean-Luc Danger
2012	Misc	`conf`	Leakage Squeezing of Order Two. INDOCRYPT Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Houssem Maghrebi
2012	J	`jnl`	Leakage Squeezing of Order Two. IACR Cryptol. ePrint Arch. Claude Carlet, Jean-Luc Danger, Sylvain Guilley, Houssem Maghrebi
2012	C	`conf`	Low-Cost Countermeasure against RPA. CARDIS Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
2012	C	`conf`	On the Optimality of Correlation Power Attack on Embedded Cryptographic Systems. WISTP Youssef Souissi, Nicolas Debande, Sami Mekki, Sylvain Guilley, Ali Maalaoui, Jean-Luc Danger
2012	J	`jnl`	Optimal First-Order Masking with Linear and Non-Linear Bijections. IACR Cryptol. ePrint Arch. Houssem Maghrebi, Claude Carlet, Sylvain Guilley, Jean-Luc Danger
2012	—	`conf`	Optimal First-Order Masking with Linear and Non-linear Bijections. AFRICACRYPT Houssem Maghrebi, Claude Carlet, Sylvain Guilley, Jean-Luc Danger
2012	A	`conf`	RSM: A small and fast countermeasure for AES, secure against 1st and 2nd-order zero-offset SCAs. DATE Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger
2012	C	`conf`	Random Active Shield. FDTC Sébastien Briais, Jean-Michel Cioranesco, Jean-Luc Danger, Sylvain Guilley, David Naccache, Thibault Porteboeuf
2012	—	`conf`	Register leakage masking using Gray code. HOST Houssem Maghrebi, Sylvain Guilley, Emmanuel Prouff, Jean-Luc Danger
2012	—	`conf`	Same Values Power Analysis Using Special Points on Elliptic Curves. COSADE Cédric Murdica, Sylvain Guilley, Jean-Luc Danger, Philippe Hoogvorst, David Naccache
2012	—	`conf`	System-Level Methods to Prevent Reverse-Engineering, Cloning, and Trojan Insertion. ICISTM Sylvain Guilley, Jean-Luc Danger, Robert Nguyen, Philippe Nguyen
2012	B	`conf`	Towards Different Flavors of Combined Side Channel Attacks. CT-RSA Youssef Souissi, Shivam Bhasin, Sylvain Guilley, Maxime Nassar, Jean-Luc Danger
2012	—	`conf`	Wavelet transform based pre-processing for side channel analysis. MICRO Workshops Nicolas Debande, Youssef Souissi, M. Abdelaziz Elaabid, Sylvain Guilley, Jean-Luc Danger
2011	—	`conf`	"Rank Correction": A New Side-Channel Approach for Secret Key Recovery. InfoSecHiComNet Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger
2011	—	`conf`	"Re-synchronization by moments": An efficient solution to align Side-Channel traces. WIFS Nicolas Debande, Youssef Souissi, Maxime Nassar, Sylvain Guilley, Thanh-Ha Le, Jean-Luc Danger
2011	J	`jnl`	A Secure Asynchronous FPGA Architecture, Experimental Results and Some Debug Feedback CoRR Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin
2011	J	`jnl`	Classification of High-Order Boolean Masking Schemes and Improvements of their Efficiency. IACR Cryptol. ePrint Arch. Houssem Maghrebi, Sylvain Guilley, Claude Carlet, Jean-Luc Danger
2011	—	`conf`	Efficient Dual-Rail Implementations in FPGA Using Block RAMs. ReConFig Shivam Bhasin, Sylvain Guilley, Youssef Souissi, Tarik Graba, Jean-Luc Danger
2011	—	`conf`	Embedded systems security: An evaluation methodology against Side Channel Attacks. DASIP Youssef Souissi, Jean-Luc Danger, Sylvain Guilley, Shivam Bhasin, Maxime Nassar
2011	A	`conf`	Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques. DATE Olivier Meynard, Denis Réal, Florent Flament, Sylvain Guilley, Naofumi Homma, Jean-Luc Danger
2011	Misc	`conf`	Formal Analysis of the Entropy / Security Trade-off in First-Order Masking Countermeasures against Side-Channel Attacks. INDOCRYPT Maxime Nassar, Sylvain Guilley, Jean-Luc Danger
2011	J	`jnl`	Formal Analysis of the Entropy / Security Trade-off in First-Order Masking Countermeasures against Side-Channel Attacks. IACR Cryptol. ePrint Arch. Maxime Nassar, Sylvain Guilley, Jean-Luc Danger
2011	C	`conf`	Formal Framework for the Evaluation of Waveform Resynchronization Algorithms. WISTP Sylvain Guilley, Karim Khalfallah, Victor Lomné, Jean-Luc Danger
2011	—	`conf`	Formal security evaluation of hardware Boolean masking against second-order attacks. HOST Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger
2011	C	`conf`	Leakage Squeezing Countermeasure against High-Order Attacks. WISTP Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger
2011	C	`conf`	Non intrusive fault detection through electromagnetism analysis. ETFA Sébastien Thomas, Didier Regis, David Faura, Marc Gatti, Guillaume Duc, Jean-Luc Danger
2011	—	`conf`	Performance evaluation of protocols resilient to physical attacks. HOST Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane, Denis Réal
2011	J	`jnl`	Security evaluation of application-specific integrated circuits and field programmable gate arrays against setup time violation attacks. IET Inf. Secur. Nidhal Selmane, Shivam Bhasin, Sylvain Guilley, Jean-Luc Danger
2010	A	`conf`	BCDL: A high speed balanced DPL for FPGA with global precharge and no early evaluation. DATE Maxime Nassar, Shivam Bhasin, Jean-Luc Danger, Guillaume Duc, Sylvain Guilley
2010	Misc	`conf`	Characterization of the Electromagnetic Side Channel in Frequency Domain. Inscrypt Olivier Meynard, Denis Réal, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Frédéric Valette
2010	Misc	`conf`	Combined Side-Channel Attacks. WISA M. Abdelaziz Elaabid, Olivier Meynard, Sylvain Guilley, Jean-Luc Danger
2010	—	`conf`	Countering early evaluation: an approach towards robust dual-rail precharge logic. WESS Shivam Bhasin, Sylvain Guilley, Florent Flament, Nidhal Selmane, Jean-Luc Danger
2010	—	`conf`	Cross-Correlation Cartography. ReConFig Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
2010	—	`conf`	Entropy-based Power Attack. HOST Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger, Florent Flament
2010	—	`conf`	Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA. ReConFig Zouha Cherif, Florent Flament, Jean-Luc Danger, Shivam Bhasin, Sylvain Guilley, Hervé Chabanne
2010	J	`jnl`	Exploiting Dual-Output Programmable Blocks to Balance Secure Dual-Rail Logics. Int. J. Reconfigurable Comput. Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
2010	A	`conf`	Far Correlation-based EMA with a precharacterized leakage model. DATE Olivier Meynard, Sylvain Guilley, Jean-Luc Danger, Laurent Sauvage
2010	C	`conf`	Fault Injection Resilience. FDTC Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane
2010	Misc	`conf`	First Principal Components Analysis: A New Side Channel Distinguisher. ICISC Youssef Souissi, Maxime Nassar, Sylvain Guilley, Jean-Luc Danger, Florent Flament
2010	Misc	`conf`	Improvement of power analysis attacks using Kalman filter. ICASSP Youssef Souissi, Sylvain Guilley, Jean-Luc Danger, Sami Mekki, Guillaume Duc
2010	B	`conf`	Unrolling Cryptographic Circuits: A Simple Countermeasure Against Side-Channel Attacks. CT-RSA Shivam Bhasin, Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger
2009	—	`conf`	Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow. ReConFig Shivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley, Yves Mathieu, Maxime Nassar, Laurent Sauvage, Nidhal Selmane
2009	—	`conf`	DPL on Stratix II FPGA: What to Expect?. ReConFig Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
2009	J	`jnl`	High speed true random number generator based on open loop structures in FPGAs. Microelectron. J. Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst
2009	J	`jnl`	On the Implementation of a Probabilistic Equalizer for Low-Cost Impulse Radio UWB in High Data Rate. Wirel. Sens. Netw. Sami Mekki, Jean-Luc Danger, Benoit Miscopein
2009	J	`jnl`	Protecting the NOEKEON Cipher Against SCARE Attacks in FPGAs by using Dynamic Implementations. IACR Cryptol. ePrint Arch. Julien Bringer, Hervé Chabanne, Jean-Luc Danger
2009	—	`conf`	Protecting the NOEKEON Cipher against SCARE Attacks in FPGAs by Using Dynamic Implementations. ReConFig Julien Bringer, Hervé Chabanne, Jean-Luc Danger
2009	—	`conf`	Security Evaluation of Different AES Implementations Against Practical Setup Time Violation Attacks in FPGAs. HOST Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Nidhal Selmane
2009	A	`conf`	Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints. DATE Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Yves Mathieu, Maxime Nassar
2009	—	`conf`	Updates on the potential of clock-less logics to strengthen cryptographic circuits against side-channel attacks. ICECS Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet
2009	C	`conf`	WDDL is Protected against Setup Time Violation Attacks. FDTC Nidhal Selmane, Shivam Bhasin, Sylvain Guilley, Tarik Graba, Jean-Luc Danger
2008	J	`jnl`	A Reconfigurable Programmable Logic Block for a Multi-Style Asynchronous FPGA resistant to Side-Channel Attacks CoRR Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet
2008	A*	`conf`	An 8x8 run-time reconfigurable FPGA embedded in a SoC. DAC Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger
2008	B	`conf`	Area optimization of cryptographic co-processors implemented in dual-rail with precharge positive logic. FPL Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Philippe Hoogvorst
2008	—	`conf`	EM channel estimation in a low-cost UWB receiver based on energy detection. ISWCS Sami Mekki, Jean-Luc Danger, Benoit Miscopein, Joseph J. Boutros
2008	A	`conf`	Efficient tiling patterns for reconfigurable gate arrays. FPGA Sumanta Chaudhuri, Jean-Luc Danger, Philippe Hoogvorst, Sylvain Guilley
2008	—	`conf`	Efficient tiling patterns for reconfigurable gate arrays. SLIP Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger
2008	—	`conf`	Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs. SSIRI Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Tarik Graba, Yves Mathieu
2008	—	`conf`	Fault Analysis Attack on an FPGA AES Implementation. NTMS Farouk Khelil, Mohamed Hamdi, Sylvain Guilley, Jean-Luc Danger, Nidhal Selmane
2008	—	`conf`	Physical Design of FPGA Interconnect to Prevent Information Leakage. ARC Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin
2008	—	`conf`	Place-and-Route Impact on the Security of DPL Designs in FPGAs. HOST Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Laurent Sauvage, Philippe Hoogvorst, Maxime Nassar, Tarik Graba, Vinh-Nga Vong
2008	Misc	`conf`	Practical Setup Time Violation Attacks on AES. EDCC Nidhal Selmane, Sylvain Guilley, Jean-Luc Danger
2008	—	`conf`	Probabilistic Equalizer for Ultra-Wideband Energy Detection. VTC Spring Sami Mekki, Jean-Luc Danger, Benoit Miscopein, Jean Schwoerer, Joseph Jean Boutros
2008	C	`conf`	Silicon-level Solutions to Counteract Passive and Active Attacks. FDTC Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane, Renaud Pacalet
2007	—	`conf`	A Novel Asynchronous e-FPGA Architecture for Security Applications. FPT Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin, Sumanta Chaudhuri, Sylvain Guilley, Jean-Luc Danger, Philippe Hoogvorst
2007	B	`conf`	Efficient Modeling and Floorplanning of Embedded-FPGA Fabric. FPL Sumanta Chaudhuri, Jean-Luc Danger, Sylvain Guilley
2007	J	`jnl`	Generic Description and Synthesis of LDPC Decoders. IEEE Trans. Commun. Frédéric Guilloud, Emmanuel Boutillon, Jacky Tousch, Jean-Luc Danger
2007	—	`conf`	Towards Quantum Key Distribution System using Homodyne Detection with Differential Time-Multiplexed Reference. RIVF Qing Xu, M. B. C. Silva, Jean-Luc Danger, Sylvain Guilley, Patrick Bellot, Philippe Gallion, Francisco Mendieta
2006	J	`jnl`	An iterative reconfigurability approach for WCDMA high-data-rate communications. IEEE Wirel. Commun. Ioannis Krikidis, Jean-Luc Danger, Lirida A. B. Naviner
2006	—	`conf`	FASE: An Open Run-Time Reconfigurable FPGA Architecture for Tamper-Resistant and Secure Embedded Systems. ReConFig Sumanta Chaudhuri, Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst
2005	—	`conf`	Heterogeneous implementation of a rake receiver for DS-CDMA communication systems. ICECS Daniel C. de Souza, Ioannis Krikidis, Lirida A. B. Naviner, Jean-Luc Danger, M. A. de Barros, B. G. A. Neto
2005	B	`conf`	Reconfigurable Implementation Issues of a Detection Scheme for DS-CDMA High Data Rate Connections. PIMRC Ioannis Krikidis, Jean-Luc Danger, Lirida A. B. Naviner
2004	B	`conf`	A finger configuration algorithm for a reconfigurable Rake receiver. WCNC Ioannis Krikidis, Jean-Luc Danger, Lirida A. B. Naviner
2002	—	`conf`	Bit error rate calculation for a multiband non-coherent on-off keying demodulation. ICC Frédéric Guilloud, Emmanuel Boutillon, Jean-Luc Danger
2000	—	`conf`	Efficient FPGA implementation of Gaussian noise generator for communication channel emulation. ICECS Jean-Luc Danger, Adel Ghazel, Emmanuel Boutillon, Hédi Laamari
2000	A	`conf`	Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. FPGA Andrés D. García, Jean-Luc Danger, Wayne P. Burleson
2000	C	`conf`	Low power digital design in FPGAs: a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. ISCAS Andrés D. García, Wayne P. Burleson, Jean-Luc Danger
1999	A	`conf`	High-Performance Low-Cost Implementation of Two-Dimensional DCT Processor nn FPGA. FPGA Lirida A. B. Naviner, Jean-Luc Danger, C. Laurent
1999	B	`conf`	Power Modelling in Field Programmable Gate Arrays (FPGA). FPL Andrés D. García, Wayne P. Burleson, Jean-Luc Danger