Jean-Jacques Hajjar

12 papers Journal 6Unranked 6
YearRankTypeTitle / Venue / Authors
2024 — conf
Reduced RC Time Constant High Voltage Tolerant Supply Clamp for ESD Protection in 16nm FinFET Technology.
IRPS
Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum
2023 — conf
Optimization of SCR for High-Speed Digital and RF Applications in 45-nm SOI CMOS Technology.
IRPS
Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum
2022 — conf
A High Voltage Tolerant Supply Clamp for ESD Protection in a 45-nm SOI Technology.
IRPS
Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum
2019 — conf
Characterization and Modeling of the Transient Safe Operating Area in LDMOS Transistors.
IRPS
Hang Li, Kalpathy B. Sundaram, Yuanzhong Paul Zhou, Javier A. Salcedo, Jean-Jacques Hajjar
2017 J jnl
ESD protection structure with reduced capacitance and overshoot voltage for high speed interface applications.
Microelectron. Reliab.
Aihua Dong, Javier A. Salcedo, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Sirui Luo, Jean-Jacques Hajjar, Juin J. Liou
2015 J jnl
Compact failure modeling for devices subject to electrostatic discharge stresses - A review pertinent to CMOS reliability simulation.
Microelectron. Reliab.
Meng Miao, Yuanzhong Paul Zhou, Javier A. Salcedo, Jean-Jacques Hajjar, Juin J. Liou
2015 J jnl
Design and characterization of ESD solutions with EMC robustness for automotive applications.
Microelectron. Reliab.
Yunfeng Xi, Javier A. Salcedo, Yuanzhong Paul Zhou, Juin J. Liou, Jean-Jacques Hajjar
2015 — conf
ESD protection clamp with active feedback and mis-trigger immunity in 28nm CMOS process.
IRPS
Srivatsan Parthasarathy, Javier A. Salcedo, Sandro Herrera, Jean-Jacques Hajjar
2014 J jnl
Design optimization of SiGe BiCMOS Silicon Controlled Rectifier for Charged Device Model (CDM) protection applications.
Microelectron. Reliab.
Qiang Cui, Srivatsan Parthasarathy, Javier A. Salcedo, Juin J. Liou, Jean-Jacques Hajjar, Yuanzhong Paul Zhou
2013 — conf
Investigation on effectiveness of series gate resistor in CDM ESD protection designs.
ASICON
Yuanzhong Paul Zhou, Alan W. Righter, Jean-Jacques Hajjar
2013 J jnl
vfTLP-V
Microelectron. Reliab.
Yuanzhong Paul Zhou, David Ellis, Jean-Jacques Hajjar, Andrew Olney, Juin J. Liou
2012 J jnl
Modeling of high voltage devices for ESD event simulation in SPICE.
Microelectron. J.
Yuanzhong Paul Zhou, Javier A. Salcedo, Jean-Jacques Hajjar