Jayesh Gaur

20 papers A* 15B 1C 1Journal 3
YearRankTypeTitle / Venue / Authors
2024 A* conf
Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution.
ISCA
Rahul Bera, Adithya Ranganathan, Joydeep Rakshit, Sujit Mahto, Anant V. Nori, Jayesh Gaur, Ataberk Olgun, Konstantinos Kanellopoulos, Mohammad Sadrosadati, Sreenivas Subramoney, Onur Mutlu
2024 J jnl
Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution.
CoRR
Rahul Bera, Adithya Ranganathan, Joydeep Rakshit, Sujit Mahto, Anant V. Nori, Jayesh Gaur, Ataberk Olgun, Konstantinos Kanellopoulos, Mohammad Sadrosadati, Sreenivas Subramoney, Onur Mutlu
2022 A* conf
Register file prefetching.
ISCA
Sudhanshu Shukla, Sumeet Bandishte, Jayesh Gaur, Sreenivas Subramoney
2022 A* conf
Speculative Code Compaction: Eliminating Dead Code via Speculative Microcode Transformations.
MICRO
Logan Moody, Wei Qi, Abdolrasoul Sharifi, Layne Berry, Joey Rudek, Jayesh Gaur, Jeff Parkhurst, Sreenivas Subramoney, Kevin Skadron, Ashish Venkat
2021 A* conf
Cryptographic Capability Computing.
MICRO
Michael LeMay, Joydeep Rakshit, Sergej Deutsch, David M. Durham, Santosh Ghosh, Anant Nori, Jayesh Gaur, Andrew Weiler, Salmin Sultana, Karanvir Grewal, Sreenivas Subramoney
2021 A* conf
Stream Floating: Enabling Proactive and Decentralized Cache Optimizations.
HPCA
Zhengrong Wang, Jian Weng, Jason Lowe-Power, Jayesh Gaur, Tony Nowatzki
2020 A* conf
Auto-Predication of Critical Branches.
ISCA
Adarsh Chauhan, Jayesh Gaur, Zeev Sperber, Franck Sala, Lihu Rappoport, Adi Yoaz, Sreenivas Subramoney
2020 A* conf
Focused Value Prediction.
ISCA
Sumeet Bandishte, Jayesh Gaur, Zeev Sperber, Lihu Rappoport, Adi Yoaz, Sreenivas Subramoney
2019 C conf
Bandwidth-Aware Last-Level Caching: Efficiently Coordinating Off-Chip Read and Write Bandwidth.
ICCD
Mainak Chaudhuri, Jayesh Gaur, Sreenivas Subramoney
2019 A* conf
Post-silicon CPU adaptation made practical using machine learning.
ISCA
Stephen J. Tarsa, Rangeen Basu Roy Chowdhury, Julien Sebot, Gautham N. Chinya, Jayesh Gaur, Karthik Sankaranarayanan, Chit-Kwan Lin, Robert Chappell, Ronak Singhal, Hong Wang
2018 A* conf
Criticality Aware Tiered Cache Hierarchy: A Fundamental Relook at Multi-Level Cache Hierarchies.
ISCA
Anant Nori, Jayesh Gaur, Siddharth Rai, Sreenivas Subramoney, Hong Wang
2018 A* conf
Density Tradeoffs of Non-Volatile Memory as a Replacement for SRAM Based Last Level Cache.
ISCA
Kunal Korgaonkar, Ishwar Bhati, Huichu Liu, Jayesh Gaur, Sasikanth Manipatruni, Sreenivas Subramoney, Tanay Karnik, Steven Swanson, Ian Young, Hong Wang
2018 J jnl
MARS: Memory Aware Reordered Source.
CoRR
Ishwar Bhati, Udit Dhawan, Jayesh Gaur, Sreenivas Subramoney, Hong Wang
2017 J jnl
Micro-Sector Cache: Improving Space Utilization in Sectored DRAM Caches.
ACM Trans. Archit. Code Optim.
Mainak Chaudhuri, Mukesh Agrawal, Jayesh Gaur, Sreenivas Subramoney
2017 A* conf
Near-Optimal Access Partitioning for Memory Hierarchies with Multiple Heterogeneous Bandwidth Sources.
HPCA
Jayesh Gaur, Mainak Chaudhuri, Pradeep Ramachandran, Sreenivas Subramoney
2016 A* conf
Base-Victim Compression: An Opportunistic Cache Compression Architecture.
ISCA
Jayesh Gaur, Alaa R. Alameldeen, Sreenivas Subramoney
2013 A* conf
Efficient management of last-level caches in graphics processors for 3D scene rendering workloads.
MICRO
Jayesh Gaur, Raghuram Srinivasan, Sreenivas Subramoney, Mainak Chaudhuri
2012 B conf
Introducing hierarchy-awareness in replacement and bypass algorithms for last-level caches.
PACT
Mainak Chaudhuri, Jayesh Gaur, Nithiyanandan Bashyam, Sreenivas Subramoney, Joseph Nuzman
2011 A* conf
Bypass and insertion algorithms for exclusive last-level caches.
ISCA
Jayesh Gaur, Mainak Chaudhuri, Sreenivas Subramoney
2007 A* conf
Leveraging Semi-Formal and Sequential Equivalence Techniques for Multimedia SOC Performance Validation.
DAC
Lovleen Bhatia, Jayesh Gaur, Praveen Tiwari, Raj S. Mitra, Sunil H. Matange