Jawar Singh - RankMe

49 papers A 2C 4Misc 2Journal 16Unranked 24

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Best-of-Both-Worlds Multi-Dueling Bandits: Unified Algorithms for Stochastic and Adversarial Preferences under Condorcet and Borda Objectives. CoRR S. Akash, Pratik Gajane, Jawar Singh
2026	J	`jnl`	Hardware implementation of SNN-based neuromorphic computing architecture for sign language recognition. J. Supercomput. Rashi Goyal, Mohita Jaiswal, Kartik Khandelwal, Viren Sharma, Jawar Singh, Abhishek Sharma
2025	J	`jnl`	Si/SiGe superlattice-based double gate feedback field-effect transistor and its application in 1T-DRAM. Microelectron. J. Subir Das, Ashraf Maniyar, Pushp Raj, Jawar Singh, Pramod Kumar Tiwari
2024	J	`jnl`	Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications. IEEE Access V. Bharath Sreenivasulu, Aruna Kumari Neelam, Asisa Kumar Panigrahy, Lokesh Vakkalakula, Jawar Singh, Shiv Govind Singh
2024	J	`jnl`	Investigation of Silicon Aging Effects in Dopingless PUF for Reliable Security Solution. J. Electron. Test. Meena Panchore, Chithraja Rajan, Jawar Singh
2023	C	`conf`	A Steep Slope Sub-10nm Armchair Phosphorene Nanoribbon FET with Intrinsic Cold Contact. VLSI-SoC Ankit Sirohi, Jawar Singh
2023	J	`jnl`	An On-Chip Trainable and Scalable In-Memory ANN Architecture for AI/ML Applications. Circuits Syst. Signal Process. Abhash Kumar, Sai Manohar Beeraka, Jawar Singh, Bharat Gupta
2023	J	`jnl`	Design and analysis of DDoS mitigating network architecture. Int. J. Inf. Sec. Swati, Sangita Roy, Jawar Singh, Jimson Mathew
2023	J	`jnl`	Exploring the Performance of 3-D Nanosheet FET in Inversion and Junctionless Modes: Device and Circuit-Level Analysis and Comparison. IEEE Access V. Bharath Sreenivasulu, Aruna Kumari Neelam, Sekhar Reddy Kola, Jawar Singh, Yiming Li
2022	—	`conf`	A Framework for the Automation of Platform Validation for Use Cases of Wi-Fi. ICIT Kota Nikhileswar, Sudhir Kumar, Jawar Singh, Dharmendra Muthuswamy
2020	Misc	`conf`	Blockchain-based Interoperable Healthcare using Zero-Knowledge Proofs and Proxy Re-Encryption. COMSNETS Bhavye Sharma, Raju Halder, Jawar Singh
2020	J	`jnl`	In-memory Implementation of On-chip Trainable and Scalable ANN for AI/ML Applications. CoRR Abhash Kumar, Jawar Singh, Sai Manohar Beeraka, Bharat Gupta
2019	J	`jnl`	Analog/RF Performance Investigation of Dopingless FET for Ultra-Low Power Applications. IEEE Access Ankit Sirohi, Chitrakant Sahu, Jawar Singh
2019	J	`jnl`	Improvement in Retention Time of Capacitorless DRAM with Access Transistor. CoRR Md. Hasan Raza Ansari, Jawar Singh
2019	J	`jnl`	Ultra-Low Energy and High Speed LIF Neuron using Silicon Bipolar Impact Ionization MOSFET for Spiking Neural Networks. CoRR Alok Kumar Kamal, Jawar Singh
2017	—	`conf`	Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function. ISVLSI Venkata P. Yanambaka, Saraju P. Mohanty, Elias Kougianos, Prabha Sundaravadivel, Jawar Singh
2017	—	`conf`	Reconfigurable Robust Hybrid Oscillator Arbiter PUF for IoT Security Based on DL-FET. ISVLSI Venkata P. Yanambaka, Saraju P. Mohanty, Elias Kougianos, Prabha Sundaravadivel, Jawar Singh
2017	—	`conf`	SiGe Source Charge Plasma TFET for Biosensing Applications. iNIS Nawaz Shafi, Chitrakant Sahu, C. Periasamy, Jawar Singh
2016	—	`conf`	Compact Behavioral Modeling and Time Dependent Performance Degradation Analysis of Junction and Doping Free Transistors. iNIS Meena Panchore, Jawar Singh, Saraju P. Mohanty, Elias Kougianos
2016	—	`conf`	Memristor Crossbar-Based Pattern Recognition Circuit Using Perceptron Learning Rule. iNIS Muhammad Khalid, Jawar Singh
2016	—	`conf`	Proposal of Heterogate Technique for Performance Enhancement of DM-TFET. iNIS Chaitanya Maradana, Jawar Singh
2016	—	`conf`	Secure Multi-key Generation Using Ring Oscillator Based Physical Unclonable Function. iNIS Venkata P. Yanambaka, Saraju P. Mohanty, Elias Kougianos, Jawar Singh
2015	J	`jnl`	A low power and high gain CMOS LNA for UWB applications in 90 nm CMOS process. Microelectron. J. Sunil Kumar Pandey, Jawar Singh
2015	—	`conf`	Extended Base Schottky-Collector Bipolar Charge Plasma Transistor. iNIS Lokesh Kumar Bramhane, Jawar Singh
2015	—	`conf`	Performance Enhancement of Dopingless Tunnel-FET Based on Ge-Source with High-k. iNIS Kanchan Cecil, Jawar Singh
2014	—	`conf`	Dual-sided doped memristor and it's SPICE modelling for improved electrical properties. ISQED Anup Shrivastava, Jawar Singh
2014	—	`conf`	Linearly separable pattern classification using memristive crossbar circuits. ISQED Komal Singh, Chitrakant Sahu, Jawar Singh
2014	—	`conf`	Modeling and simulation of variable thickness based stepped MEMS cantilever designs for biosensing and pull-in voltage optimization. VDAT Deep Kishore Parsediya, Jawar Singh, Pavan Kumar Kankar
2014	—	`conf`	Realization of efficient RF energy harvesting circuits employing different matching technique. ISQED Sachin Agrawal, Sunil Kumar Pandey, Jawar Singh, Manoj Singh Parihar
2013	J	`jnl`	A highly reliable NBTI Resilient 6T SRAM cell. Microelectron. Reliab. Jawar Singh, Narayanan Vijaykrishnan
2013	—	`conf`	An Efficient RF Energy Harvester with Tuned Matching Circuit. VDAT Sachin Agrawal, Sunil Kumar Pandey, Jawar Singh, Pravin Neminath Kondekar
2013	—	`conf`	Dual sided doped memristor and it's mathematical modelling. ICECS Anup Shrivastava, Jawar Singh
2012	—	`conf`	Process variation tolerant 9T SRAM bitcell design. ISQED G. K. Reddy, Kapil Jainwal, Jawar Singh, Saraju P. Mohanty
2012	J	`jnl`	Statistical DOE-ILP based power-performance-process (P3) optimization of nano-CMOS SRAM. Integr. Saraju P. Mohanty, Jawar Singh, Elias Kougianos, Dhiraj K. Pradhan
2010	—	`conf`	A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead. ISQED Jawar Singh, Dilip S. Aswar, Saraju P. Mohanty, Dhiraj K. Pradhan
2010	—	`conf`	A novel si-tunnel FET based SRAM design for ultra low-power 0.3V V ASP-DAC Jawar Singh, Krishnan Ramakrishnan, Saurabh Mookerjea, Suman Datta, Narayanan Vijaykrishnan, Dhiraj K. Pradhan
2010	A	`conf`	Investigating the impact of NBTI on different power saving cache strategies. DATE Andrew J. Ricketts, Jawar Singh, Krishnan Ramakrishnan, Narayanan Vijaykrishnan, Dhiraj K. Pradhan
2009	—	`—`	Robust power aware SRAM bitcell designs. Jawar Singh
2009	Misc	`conf`	Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems. VLSI Design Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan
2009	A	`conf`	Single ended 6T SRAM with isolated read-port for low-power embedded systems. DATE Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Saraju P. Mohanty, Jimson Mathew
2008	C	`conf`	A nano-CMOS process variation induced read failure tolerant SRAM cell. ISCAS Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan
2008	J	`jnl`	A single ended 6T SRAM cell design for ultra-low-voltage applications. IEICE Electron. Express Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Saraju P. Mohanty
2008	—	`conf`	A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies. SoCC Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty
2008	—	`conf`	Failure analysis for ultra low power nano-CMOS SRAM under process variations. SoCC Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty
2008	C	`conf`	Fault Tolerant Reversible Finite Field Arithmetic Circuits. IOLTS Jimson Mathew, Jawar Singh, Anas Abu Taleb, Dhiraj K. Pradhan
2008	C	`conf`	Fault tolerant bit parallel finite field multipliers using LDPC codes. ISCAS Jimson Mathew, Jawar Singh, Abusaleh M. Jabir, Mohammad Hosseinabady, Dhiraj K. Pradhan
2008	—	`conf`	Pseudo parallel architecture for AES with error correction. SoCC Yi Xin Su, Jimson Mathew, Jawar Singh, Dhiraj K. Pradhan
2007	—	`conf`	A Triple-Mode Sigma-Delta Modulator Design for Wireless Standards. ICIT Babita R. Jose, P. Mythili, Jawar Singh, Jimson Mathew
2007	—	`conf`	Single Event Upset Detection and Correction. ICIT Jawar Singh, Jimson Mathew, Mohammad Hosseinabady, Dhiraj K. Pradhan