Javier Díaz - RankMe

77 papers A* 1B 3Misc 1Journal 49Unranked 23

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Minimizing Cuckoo Hashing Insertion Time for Networking Applications in FPGAs. IEEE Access Carlos Megías, Alex Forencich, Eduardo Ros, Javier Díaz
2025	J	`jnl`	Open Science and Artificial Intelligence for supporting the sustainability of the SRC Network: The espSRC case. CoRR Julián Garrido, Susana Sánchez-Expósito, Antonio Ruiz Falcó, J. Ruedas, Maria Ángeles Mendoza, Víctor Vázquez, Manuel Parra, J. Sánchez, I. Labadie, Laura Darriba, Javier Moldón, M. Rodriguez-Álvarez, Javier Díaz, Lourdes Verdes-Montenegro
2025	J	`jnl`	PTP Over Wide Area Networks With Offset Measurement Outlier Filtering. IEEE Access Víctor Vázquez, Carlos Megías, Carmen Vélez, Héctor Esteban, Javier Díaz, Eduardo Ros
2024	—	`conf`	Time Transfer and Clock Synchronization Analysis over Spine-Leaf Networks. ISPCS Alberto Ortega, Víctor Vázquez, Carlos Megías, Jesús González, Manuel Rodríguez-Álvarez, Javier Díaz, Eduardo Ros
2023	J	`jnl`	Ethernet-based timing system for accelerator facilities: The IFMIF-DONES case. Comput. Networks Carlos Megías, Víctor Vázquez, Eduardo Ros, Mauro Cappelli, Javier Díaz
2021	J	`jnl`	A White Rabbit-Synchronized Accurate Time-Stamping Solution for the Small-Sized Cameras of the Cherenkov Telescope Array. IEEE Trans. Instrum. Meas. Jorge Sanchez-Garrido, Antonio Jurado, Miguel Jimenez-Lopez, Arnim Balzer, Heike Prokoph, Maurice Stephan, David Berge, Manuel Rodríguez-Álvarez, Javier Díaz
2021	J	`jnl`	Enhancing White Rabbit Synchronization Stability and Scalability Using P2P Transparent and Hybrid Clocks. IEEE Trans. Ind. Informatics José Luis Gutiérrez Rivas, Felipe Torres-Gonzalez, Eduardo Ros, Javier Díaz
2021	J	`jnl`	Implementation of a Time-Sensitive Networking (TSN) Ethernet Bus for Microlaunchers. IEEE Trans. Aerosp. Electron. Syst. Jorge Sanchez-Garrido, Beatriz Aparicio, José Gabriel Ramírez, Rafael Rodríguez, Mariasole Melara, Lorenzo Cercós, Eduardo Ros, Javier Díaz
2021	J	`jnl`	Precise Network Time Monitoring: Picosecond-Level Packet Timestamping for Fintech Networks. IEEE Access Francisco Girela-Lopez, Eduardo Ros, Javier Díaz
2020	J	`jnl`	10 Gigabit White Rabbit: Sub-Nanosecond Timing and Data Distribution. IEEE Access Miguel Jimenez-Lopez, Francisco Girela-Lopez, Jose Lopez-Jimenez, Emilio Marin-Lopez, Rafael Rodríguez, Javier Díaz
2020	J	`jnl`	Digital Electrical Substation Communications Based on Deterministic Time-Sensitive Networking Over Ethernet. IEEE Access Jorge Sanchez-Garrido, Antonio Jurado, Luis Medina, Rafael Rodríguez, Eduardo Ros, Javier Díaz
2020	J	`jnl`	IEEE 1588 High Accuracy Default Profile: Applications and Challenges. IEEE Access Francisco Girela-Lopez, Jose Lopez-Jimenez, Miguel Jimenez-Lopez, Rafael Rodríguez, Eduardo Ros, Javier Díaz
2020	J	`jnl`	Time as a Service Based on White Rabbit for Finance Applications. IEEE Commun. Mag. Jose Lopez-Jimenez, José Luis Gutiérrez Rivas, Emilio Marin-Lopez, Manuel Rodriguez-Alvarez, Javier Díaz
2019	J	`jnl`	A Fully Programmable White-Rabbit Node for the SKA Telescope PPS Distribution System. IEEE Trans. Instrum. Meas. Miguel Jimenez-Lopez, Felipe Torres-Gonzalez, José Luis Gutiérrez Rivas, Manuel Rodriguez-Alvarez, Javier Díaz
2018	—	`conf`	A hardware assisted implementation of Time Varying Encryption System. ISPCS Fidel Rodriguez-Lopez, Francisco Girela-Lopez, Javier Díaz
2018	J	`jnl`	Accurate Timing Networks for Dependable Smart Grid Applications. IEEE Trans. Ind. Informatics Francisco Ramos, José Luis Gutiérrez Rivas, Jose Lopez-Jimenez, Benito Caracuel, Javier Díaz
2018	—	`conf`	Impact of network component temperature variation on long haul White Rabbit links. ISPCS Jose Lopez-Jimenez, Javier Díaz, Manuel Rodriguez-Alvarez
2018	J	`jnl`	White Rabbit HSR: A Seamless Subnanosecond Redundant Timing System With Low-Latency Data Capabilities for the Smart Grid. IEEE Trans. Ind. Informatics José Luis Gutiérrez Rivas, Jose Lopez-Jimenez, Eduardo Ros, Javier Díaz
2017	—	`conf`	CLONETS - clock network services: Strategy and innovation for clock services over optical-fibre networks. ICTON Przemyslaw Krehlik, Lukasz Sliwczynski, Jirí Dostál, Jan Radil, Vladimír Smotlacha, Radek Velc, Josef Vojtech, Mauro Campanella, Davide Calonico, Cecilia Clivati, Filippo Levi, Ondrej Cíp, Simon Rerucha, onald Holzwarth, Maurice Lessing, Fabiola Camargo, Bruno Desruelle, Jean Lautier-Gaud, Elizabeth Laier English, Jochen Kronjäger, Peter Whibberley, Paul-Eric Pottie, Richard Tavares, Philip Tuckey, Frantisek John, Milan Snajder, Jiri Stefl, Pawel Nogas, Robert Urbaniak, Artur Binczewski, Wojbor Bogacki, Krzysztof Turza, Gesine Grosche, Harald Schnatz, Emilie Camisard, Nicolas Quintin, Javier Díaz, Eduardo Ros, Alessandro Galardini, Alwyn J. Seeds, Zhen Yang, Anne Amy-Klein
2017	—	`conf`	Sub-nanosecond Synchronization over 1G ethernet data links using white rabbit technologies on the WR-ZEN board. TSP Jorge Sanchez-Garrido, Antonio Miguel Lopez-Antequera, Miguel Jimenez-Lopez, Javier Díaz
2015	J	`jnl`	Codebook hardware implementation on FPGA for background subtraction. J. Real Time Image Process. Rafael Rodríguez-Gómez, Enrique J. Fernandez-Sanchez, Javier Díaz, Eduardo Ros Vidal
2015	J	`jnl`	Hierarchical architecture for motion and depth estimations based on color cues. J. Real Time Image Process. Francisco Barranco, Matteo Tomasi, Mauricio Vanegas, Javier Díaz, Sara Granados, Eduardo Ros Vidal
2014	J	`jnl`	Background subtraction model based on color and depth cues. Mach. Vis. Appl. Enrique J. Fernandez-Sanchez, Leonardo Rubio, Javier Díaz, Eduardo Ros
2014	J	`jnl`	Low-cost sensor to detect overtaking based on optical flow. Mach. Vis. Appl. Pablo Guzmán, Javier Díaz, Jarno Ralli, Rodrigo Agís, Eduardo Ros
2014	J	`jnl`	On-chip semidense representation map for dense visual features driven by attention processes. J. Real Time Image Process. Sara Granados, Francisco Barranco, Sonia Mota, Javier Díaz, Eduardo Ros
2014	J	`jnl`	Real-Time Visual Saliency Architecture for FPGA With Top-Down Attention Modulation. IEEE Trans. Ind. Informatics Francisco Barranco, Javier Díaz, Begoña del Pino, Eduardo Ros
2013	J	`jnl`	Background Subtraction Based on Color and Depth Using Active Sensors. Sensors Enrique J. Fernandez-Sanchez, Javier Díaz, Eduardo Ros
2013	J	`jnl`	Pipelined architecture for real-time cost-optimized extraction of visual primitives based on FPGAs. Digit. Signal Process. Francisco Barranco, Matteo Tomasi, Javier Díaz, Mauricio Vanegas, Eduardo Ros
2013	A*	`conf`	Real-Time Model-Based Rigid Object Pose Estimation and Tracking Combining Dense and Sparse Visual Cues. CVPR Karl Pauwels, Leonardo Rubio, Javier Díaz, Eduardo Ros
2013	J	`jnl`	Spatial and temporal constraints in variational correspondence methods. Mach. Vis. Appl. Jarno Ralli, Javier Díaz, Eduardo Ros
2012	J	`jnl`	A multi-resolution approach for massively-parallel hardware-friendly optical flow estimation. J. Vis. Commun. Image Represent. Francisco Barranco, Javier Díaz, Begoña del Pino, Eduardo Ros
2012	—	`conf`	Bottom-up visual attention model based on FPGA. ICECS Francisco Barranco, Javier Díaz, Begoña del Pino, Eduardo Ros
2012	J	`jnl`	Disparity disambiguation by fusion of signal- and symbolic-level information. Mach. Vis. Appl. Jarno Ralli, Javier Díaz, Sinan Kalkan, Norbert Krüger, Eduardo Ros
2012	J	`jnl`	Experimental Study of Image Representation Spaces in Variational Disparity Calculation. EURASIP J. Adv. Signal Process. Jarno Ralli, Javier Díaz, Pablo Guzmán, Eduardo Ros
2012	J	`jnl`	FPGA Implementation for Real-Time Background Subtraction Based on Horprasert Model. Sensors Rafael Rodríguez-Gómez, Enrique J. Fernandez-Sanchez, Javier Díaz, Eduardo Ros
2012	J	`jnl`	Massive Parallel-Hardware Architecture for Multiscale Stereo, Optical Flow and Image-Structure Computation. IEEE Trans. Circuits Syst. Video Technol. Matteo Tomasi, Mauricio Vanegas, Francisco Barranco, Javier Díaz, Eduardo Ros
2012	J	`jnl`	Parallel Architecture for Hierarchical Optical Flow Estimation Based on FPGA. IEEE Trans. Very Large Scale Integr. Syst. Francisco Barranco, Matteo Tomasi, Javier Díaz, Mauricio Vanegas, Eduardo Ros
2012	J	`jnl`	Real-Time Architecture for a Robust Multi-Scale Stereo Engine on FPGA. IEEE Trans. Very Large Scale Integr. Syst. Matteo Tomasi, Mauricio Vanegas, Francisco Barranco, Javier Díaz, Eduardo Ros
2012	J	`jnl`	Vector Disparity Sensor with Vergence Control for Active Vision Systems. Sensors Francisco Barranco, Javier Díaz, Agostino Gibaldi, Silvio P. Sabatini, Eduardo Ros
2011	—	`conf`	Hierarchical Optical Flow Estimation Architecture Using Color Cues. ARC Francisco Barranco, Matteo Tomasi, Javier Díaz, Eduardo Ros
2011	—	`conf`	On-Chip Ego-Motion Estimation Based on Optical Flow. ARC Mauricio Vanegas, Leonardo Rubio, Matteo Tomasi, Javier Díaz, Eduardo Ros
2011	—	`conf`	Optical Flow Reliability Model Approximated with RBF. IWANN (2) Rodrigo Agís, Javier Díaz, Pilar Martínez Ortigosa, Pablo Guzmán, Eduardo Ros
2011	J	`jnl`	Preface to the special issue on: Emerging Applications of Embedded Systems Research. J. Syst. Archit. Jesús González, Miguel Damas, Javier Díaz, Pedro A. Castillo
2010	J	`jnl`	A compact harmonic code for early vision based on anisotropic frequency channels. Comput. Vis. Image Underst. Silvio P. Sabatini, Giulia Gastaldi, Fabio Solari, Karl Pauwels, Marc M. Van Hulle, Javier Díaz, Eduardo Ros, Nicolas Pugeault, Norbert Krüger
2010	J	`jnl`	A method for sparse disparity densification using voting mask propagation. J. Vis. Commun. Image Represent. Jarno Ralli, Javier Díaz, Eduardo Ros
2010	J	`jnl`	Fine grain pipeline architecture for high performance phase-based optical flow computation. J. Syst. Archit. Matteo Tomasi, Francisco Barranco, Mauricio Vanegas, Javier Díaz, Eduardo Ros Vidal
2010	J	`jnl`	High-Performance Optical-Flow Architecture Based on a Multi-Scale, Multi-Orientation Phase-Based Model. IEEE Trans. Circuits Syst. Video Technol. Matteo Tomasi, Mauricio Vanegas, Francisco Barranco, Javier Díaz, Eduardo Ros
2010	J	`jnl`	Multi-port abstraction layer for FPGA intensive memory exploitation applications. J. Syst. Archit. Mauricio Vanegas, Matteo Tomasi, Javier Díaz, Eduardo Ros Vidal
2010	J	`jnl`	Optical Flow in a Smart Sensor Based on Hybrid Analog-Digital Architecture. Sensors Pablo Guzmán, Javier Díaz, Rodrigo Agís, Eduardo Ros
2009	J	`jnl`	Optimization Strategies for High-Performance Computing of Optical-Flow in General-Purpose Processors. IEEE Trans. Circuits Syst. Video Technol. Mancia Anguita, Javier Díaz, Eduardo Ros, F. J. Fernandez-Baldomero
2009	J	`jnl`	Visual System Based on Artificial Retina for Motion Detection. IEEE Trans. Syst. Man Cybern. Part B Francisco Barranco, Javier Díaz, Eduardo Ros, Begoña del Pino
2008	J	`jnl`	Superpipelined high-performance optical-flow computation architecture. Comput. Vis. Image Underst. Javier Díaz, Eduardo Ros, Rodrigo Agís, José Luis Bernier
2007	—	`conf`	A Space Variant Mapping Architecture for Reliable Car Segmentation. ARC Sonia Mota, Eduardo Ros, Javier Díaz, Rafael Rodríguez-Gómez, Richard R. Carrillo
2007	J	`jnl`	A phase-based stereo vision system-on-a-chip. Biosyst. Javier Díaz, Eduardo Ros, Silvio P. Sabatini, Fabio Solari, Sonia Mota
2007	—	`conf`	Compact (and accurate) early vision processing in the harmonic space. VISAPP (1) Silvio P. Sabatini, Giulia Gastaldi, Fabio Solari, Karl Pauwels, Marc M. Van Hulle, Javier Díaz, Eduardo Ros, Nicolas Pugeault, Norbert Krüger
2007	—	`conf`	Dealing with the Perspective Distortion to Detect Overtaking Cars for Driving Assistance. IbPRIA (1) Sonia Mota, Eduardo Ros, Javier Díaz, Rodrigo Agís, Rafael Rodríguez-Gómez, Richard R. Carrillo
2007	J	`jnl`	Fine grain pipeline systems for real-time motion and stereo-vision computation. Int. J. High Perform. Syst. Archit. Javier Díaz, Eduardo Ros, Alberto Prieto, Francisco J. Pelayo
2007	—	`conf`	Image Processing Architecture for Local Features Computation. ARC Javier Díaz, Eduardo Ros, Sonia Mota, Richard R. Carrillo
2007	—	`conf`	Increasing Efficiency in Disparity Calculation. BVAI Jarno Ralli, Francisco J. Pelayo, Javier Díaz
2007	—	`conf`	Real Time Architectures for Moving-Objects Tracking. ARC Matteo Tomasi, Javier Díaz, Eduardo Ros
2007	J	`jnl`	Real-Time System for High-Image Resolution Disparity Estimation. IEEE Trans. Image Process. Javier Díaz, Eduardo Ros, Richard R. Carrillo, Alberto Prieto
2007	J	`jnl`	Real-time Architecture for Robust Motion Estimation under Varying Illumination Conditions. J. Univers. Comput. Sci. Javier Díaz, Eduardo Ros, Rafael Rodríguez-Gómez, Begoña del Pino
2007	Misc	`conf`	Visual Processing Platform Based on Artificial Retinas. IWANN Sara Granados, Eduardo Ros Vidal, Rafael Rodríguez-Gómez, Javier Díaz
2006	—	`conf`	Bio-inspired Motion-Based Object Segmentation. ICIAR (1) Sonia Mota, Eduardo Ros, Javier Díaz, Rodrigo Agís, Francisco de Toro
2006	—	`conf`	Event-Driven Simulation Engine for Spiking Neural Networks on a Chip. ARC Rodrigo Agís, Javier Díaz, Eduardo Ros, Richard R. Carrillo, Eva M. Ortigosa
2006	J	`jnl`	FPGA-based real-time optical-flow system. IEEE Trans. Circuits Syst. Video Technol. Javier Díaz, Eduardo Ros, Francisco J. Pelayo, Eva M. Ortigosa, Sonia Mota
2006	—	`conf`	General Purpose Real-Time Image Segmentation System. ARC Sonia Mota, Eduardo Ros Vidal, Javier Díaz, Francisco de Toro
2006	J	`jnl`	Hardware description of multi-layer perceptrons with different abstraction levels. Microprocess. Microsystems Eva M. Ortigosa, Antonio Cañas, Eduardo Ros, Pilar Martínez Ortigosa, Sonia Mota, Javier Díaz
2006	—	`conf`	Highly Paralellized Architecture for Image Motion Estimation. ARC Javier Díaz, Eduardo Ros Vidal, Sonia Mota, Rafael Rodríguez-Gómez
2006	—	`conf`	Real Time Image Processing on a Portable Aid Device for Low Vision Patients. ARC Eduardo Ros Vidal, Javier Díaz, Sonia Mota, F. Vargas-Martín, Maria Dolores Peláez-Coca
2006	—	`conf`	Real-Time Embedded System for Rear-View Mirror Overtaking Car Monitoring. SAMOS Javier Díaz, Eduardo Ros, Sonia Mota, Rodrigo Agís
2006	—	`conf`	Towards an Optimal Implementation of MLP in FPGA. ARC Eva M. Ortigosa, Antonio Cañas, Rafael Rodríguez-Gómez, Javier Díaz, Sonia Mota
2005	B	`conf`	High Performance Stereo Computation Architecture. FPL Javier Díaz, Eduardo Ros, Sonia Mota, Eva M. Ortigosa, Begoña del Pino
2005	J	`jnl`	Motion-Driven Segmentation by Competitive Neural Processing. Neural Process. Lett. Sonia Mota, Eduardo Ros Vidal, Javier Díaz, Eva M. Ortigosa, Alberto Prieto
2004	B	`conf`	Real Time Optical Flow Processing System. FPL Javier Díaz, Eduardo Ros, Sonia Mota, Richard R. Carrillo, Rodrigo Agís
2004	B	`conf`	Real-Time Visual Motion Detection of Overtaking Cars for Driving Assistance Using FPGAs. FPL Sonia Mota, Eduardo Ros, Javier Díaz, Eva M. Ortigosa, Rodrigo Agís, Richard R. Carrillo
2003	—	`conf`	Neural Competitive Structures for Segmentation Based on Motion Features. IWANN (1) Javier Díaz, Sonia Mota, Eduardo Ros, Guillermo Botella Juan