Jarkko Niittylahti

31 papers A 1B 4C 1Misc 1Journal 9Unranked 15
YearRankTypeTitle / Venue / Authors
2011 — conf
Corento - SIMD Parallelism from Portable High-Level Code.
PARCO
Juhana Helovuo, Jarkko Niittylahti, Heikki Berg
2005 J jnl
On Design of Parallel Memory Access Schemes for Video Coding.
J. VLSI Signal Process.
Jarno K. Tanskanen, Reiner Creutzburg, Jarkko Niittylahti
2004 J jnl
Byte and modulo addressable parallel memory architecture for video coding.
IEEE Trans. Circuits Syst. Video Technol.
Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti
2004 J jnl
DRAM performance as a function of its structure and memory stream locality.
Microprocess. Microsystems
Juha Alakarhu, Jarkko Niittylahti
2004 J jnl
Scalable Parallel Memory Architectures for Video Coding.
J. VLSI Signal Process.
Jarno K. Tanskanen, Jarkko Niittylahti
2004 A conf
Scalar Metric for Temporal Locality and Estimation of Cache Performance.
DATE
Juha Alakarhu, Jarkko Niittylahti
2003 — conf
A low-power, memoryless direct digital frequency synthesizer architecture.
ISCAS (2)
K. I. Palomaki, Jarkko Niittylahti
2003 J jnl
An Approach to Adaptive Enhancement of Diagnostic X-Ray Images.
EURASIP J. Adv. Signal Process.
Hakan Öktem, Karen O. Egiazarian, Jarkko Niittylahti, Juha Lemmetti
2003 — conf
Quadrature direct digital frequency synthesizer using an angle rotation algorithm.
ISCAS (2)
Florean Curticapean, K. I. Palomaki, Jarkko Niittylahti
2003 — conf
TraceAnalyzer - an open framework for memory stream analysis.
ICECS
Juha Alakarhu, Jarkko Niittylahti
2003 — conf
Wireless technologies for data acquisition systems.
ISICT
Sakari Junnila, Jarkko Niittylahti
2002 — conf
A comparison of precharge policies with modern DRAM architectures.
ICECS
Juha Alakarhu, Jarkko Niittylahti
2002 — conf
Adaptive FIR filter architectures for run-time reconfigurable FPGAs.
FPT
Tero Rissa, Riku Uusikartano, Jarkko Niittylahti
2002 J jnl
Configurable parallel memory architecture for multimedia computers.
J. Syst. Archit.
Kimmo Kuusilinna, Jarno K. Tanskanen, Timo Hämäläinen, Jarkko Niittylahti
2002 J jnl
DRAM simulator for design and analysis of digital systems.
Microprocess. Microsystems
Juha Alakarhu, Jarkko Niittylahti
2002 — conf
Direct digital frequency synthesizers of high spectral purity based on quadratic approximation.
ICECS
Florean Curticapean, Jarkko Niittylahti
2002 J jnl
High-performance implementation of wavelet algorithms on a standard PC.
Microprocess. Microsystems
Jarkko Niittylahti, Juha Lemmetti, Juhana Helovuo
2002 — conf
Medical isolation of universal serial bus data signals.
ICECS
Sakari Junnila, Jarkko Ruoho, Jarkko Niittylahti
2002 Misc conf
System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems.
FCCM
Tero Rissa, Milan Vasilko, Jarkko Niittylahti
2001 — conf
A hardware efficient direct digital frequency synthesizer.
ICECS
Florean Curticapean, Jarkko Niittylahti
2000 B conf
A Hybrid Prototyping Platform for Dynamically Reconfigurable Designs.
FPL
Tero Rissa, Jarkko Niittylahti
2000 — conf
Complex digital oscillator with absolute periodicity.
EUSIPCO
Florean Curticapean, Jarkko Niittylahti
2000 — conf
Evaluation of RSSI-based human tracking.
EUSIPCO
Julia Latvala, Jan Syrjarinne, Hannu Ikonen, Jarkko Niittylahti
2000 C conf
Parallel, memory access schemes for H.263 encoder.
ISCAS
Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti, Jarmo Takala, Reiner Creutzburg
2000 — conf
Verifying external data memory interface for H.263 video DSP with memory simulator.
EUSIPCO
Juha Alakarhu, Jarkko Niittylahti, Tero Sihvo, Jarno K. Tanskanen
1999 — conf
Area-optimized FPGA implementation of a digital FM modulator.
ISCAS (4)
Riku Uusikartano, Jarkko Niittylahti, Markku Renfors
1999 — conf
Numerical sine and cosine synthesis using a complex multiplier.
ISCAS (4)
K. Palomaki, Jarkko Niittylahti, Markku Renfors
1999 B conf
Parallel Memories in Video Encoding.
Data Compression Conference
Jarno K. Tanskanen, Jarkko Niittylahti
1998 B conf
Fast Prototyping Using System Emulators.
FPL
Tero Rissa, Tommi Mäkeläinen, Jarkko Niittylahti, Jouni Siirtola
1996 J jnl
Hardware Prototypes of a Boolean Neural Network and the Simulated Annealing Optimization Method.
Int. J. Neural Syst.
Jarkko Niittylahti
1993 B conf
Dynamically Configurable Combinatory Logic Array as Boolean Neural Network.
ICTAI
Jarkko Niittylahti, Harri Raittinen, Kimmo Kaski